Commit Graph

677809 Commits

Author SHA1 Message Date
Lyude
4cd096dde9 drm/radeon: Cleanup display interrupt handling for evergreen, si
The current code here is really, really bad. A huge amount of it looks
to be copy pasted, it has some weird hatred of arrays and code sharing,
switch cases everywhere for things that really don't need them, and it
makes the file seem immensely more complex then it actually is. This is
a pain for maintanence, and is vulnerable to more weird irq handling
bugs.

So, let's start cleaning this up a bit. Modify all of the IRQ handlers
for evergreen/si so that they just use for loops. As well, we add a
helper function radeon_irq_kms_set_irq_n_enabled(), whose purpose is
just to update the state of registers that enable/disable interrupts
while printing any changes to the set of enabled interrupts to the
kernel log.

Note in this commit, since vblank/vline irq acking is intertwined with
page flip irq acking, we can't cut out all of the copy paste in
evergreen/si_irq_ack() just yet.

Changes since v1:
- Preserve order we write back all registers

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Lyude <lyude@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:33:57 -04:00
Alex Deucher
e30a52232c drm/amdgpu/gfx9: Switch baremetal to use KIQ for compute ring management. (v4)
KIQ is the Kernel Interface Queue for managing the MEC.  Rather than setting
up rings via direct MMIO of ring registers, the rings are configured via
special packets sent to the KIQ.  The allows the MEC to better manage shared
resources and certain power events. It also reduces the code paths in the
driver to support and is required for MEC powergating.

v2: drop gfx_v9_0_cp_compute_fini() as well
v3: rebase on latest changes derived from gfx8, add unmap queues on
hw_fini
v4: fix copy/paste typo in error message (Rex)

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:33:46 -04:00
Alex Deucher
ba0c19f5f0 drm/amdgpu/gfx9: fix resume of KIQ and KCQs (v2)
No need to reset the wptr and clear the rings.  The UNMAP_QUEUES
packet writes the current MQD state back the MQD on suspend,
so there is no need to reset it as well.

v2: fix from gfx8 (Rex)

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:33:36 -04:00
Alex Deucher
0f1dfd520f drm/amdgpu/gfx9: move SET_RESOURCES into the same command stream
As the KCQ setup.  This way we only have to wait once for the
entire MEC.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:33:25 -04:00
Alex Deucher
bd3402ea87 drm/amdgpu/gfx9: wait once for all KCQs to be created
Rather than waiting for each queue.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:33:13 -04:00
Alex Deucher
898b7893e4 drm/amdgpu: split gfx_v9_0_kiq_init_queue into two
One for KIQ and one for the KCQ. This simplifies the logic and
allows for future optimizations.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:33:02 -04:00
Alex Deucher
b5ab16bf64 drm/amdgpu: properly byteswap gpu_info firmware
It's stored in LE format.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:32:51 -04:00
Rex Zhu
cd70f3d6e3 drm/amd/powerplay: PP/DAL interface changes for dynamic clock switch
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:31:55 -04:00
Rex Zhu
8f5508617b drm/amd/powerplay: add function set_clock_limit for Rv.
Sets floors for various clocks depending on current
requirements.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:31:01 -04:00
Rex Zhu
96cda84a67 drm/amd/powerplay: add new clock type in struct gfx_arbit.
Add the new clock type to the gfx arbitor so we can determine
the proper clock floors for it.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:29:39 -04:00
Rex Zhu
746eb864a2 drm/amd/powerplay: add new clock type for Rv
New clock type on RV.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:27:59 -04:00
Rex Zhu
5140a749a2 drm/amd/powerplay: print msg id when smu failed.
Print the failed msg when it fails.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:25:52 -04:00
Rex Zhu
e5432ebd0d drm/amd/powerplay: add new smu message for Rv
Add additional smu messages.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:25:14 -04:00
Rex Zhu
781e263bff drm/amd/powerplay: delete duplicated code in vega10_hwmgr.c
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:24:57 -04:00
Marek Olšák
68e2c5ffeb drm/amdgpu: add an INFO query for monitoring VRAM CPU page faults
v2: bump the DRM version

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:24:38 -04:00
Tom St Denis
9156e72330 drm/amd/amdgpu: Return error if initiating read out of range on vram
If you initiate a read that is out of the VRAM address space return
ENXIO instead of 0.

Reads that begin below that point will read upto the VRAM limit as
before.

Cc: stable@vger.kernel.org
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:23:55 -04:00
Felix Kuehling
e7f78b69ab drm/radeon: Add module param to control CIK support
If AMDGPU supports CIK, add a module parameter to control CIK
support in radeon. It's off by default in radeon, while it will be
on by default in AMDGPU.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:22:50 -04:00
Tom St Denis
9c2e1ae3ae drm/amd/amdgpu: Clean up gmc6 wait_for_idle
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:22:40 -04:00
Tom St Denis
c990b718f9 drm/amd/amdgpu: Tidy up static int dce_v6_0_get_num_crtc()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:22:30 -04:00
Tom St Denis
e44143e31c drm/amd/amdgpu: Drop commented out stub function
Drop the function gmc_v6_0_init_compute_vmid() since it wasn't
implemented and commented out.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:22:17 -04:00
Tom St Denis
2de3aac91b drm/amd/amdgpu: Tidy up of gfx_v6_0_setup_rb()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:22:07 -04:00
Tom St Denis
5a7bfded78 drm/amd/amdgpu: gfx6 tidy up raster config
Clean up coding style in gfx_v6_0_write_harvested_raster_configs()

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:21:57 -04:00
Tom St Denis
167327d6e7 drm/amd/amdgpu: Clean up GFX6 tilemode programming
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:21:46 -04:00
Christian König
f5f3b16aae drm/amdgpu: fix merge of vcn_v1_0.c v2
That line got missed during the merge.

v2: fix vcn_v1_0_enc_ring_emit_vm_flush as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:21:29 -04:00
Christian König
9a94f5a593 drm/amdgpu: move adjust adjust_mc_addr into the GFX9 vm_flush functions
That GFX9 needs a PDE in the registers is entirely GFX9 specific.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:19:49 -04:00
Christian König
60bfcd313c drm/amdgpu: change default of amdgpu_vram_page_split to 512
512 is enough for one PD entry on Vega10.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:19:31 -04:00
Flora Cui
de37e68a3d drm/amdgpu: fix ocl test performance drop
partial revert commit <6971d3d> - drm/amdgpu: cleanup logic in
amdgpu_vm_flush

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:18:49 -04:00
Yintian Tao
78cb9083d9 drm/amdgpu/sdma3: correct wptr initialization for sdma
If doorbell is used for wptr update, we also need to use it
to initialize wptr to 0.

Signed-off-by: Yintian Tao <yttao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:18:15 -04:00
Christian König
05ec3eda8b drm/amdgpu: cleanup VM manager init/fini
VM is mandatory for all hw amdgpu supports. So remove the leftovers
to make it optionally.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:17:58 -04:00
Chunming Zhou
a340c7bcf1 drm/amdgpu: add dep_sync for amdgpu job
The fence in dep_sync cannot be optimized.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Tested and Reviewed-by: Roger.He <Hongbo.He@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:14:49 -04:00
Ken Wang
f8af933206 drm/amdgpu/gfx9: update golden settings
Update gfx9 golden settings.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:14:07 -04:00
Chunming Zhou
15d73ce6f9 drm/amdgpu: skip all jobs of guilty vm
If the vm is guilty of a GPU reset, skips all its jobs.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:13:17 -04:00
Chunming Zhou
f1892138ab drm/amdgpu: return -ENODEV to user space when vram is lost v2
below ioctl will return -ENODEV:
amdgpu_cs_ioctl
amdgpu_cs_wait_ioctl
amdgpu_cs_wait_fences_ioctl
amdgpu_gem_va_ioctl
amdgpu_info_ioctl

v2: only for map and replace cases in amdgpu_gem_va_ioctl

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:11:52 -04:00
Chunming Zhou
0c49e0b8a4 drm/amdgpu: check if vram is lost v2
backup first 64 byte of gart table as reset magic, check if magic is same
after gpu hw reset.
v2: use memcmp instead of manual innovation.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:10:06 -04:00
Felix Kuehling
e0ec450636 drm/amd/powerplay: Fix Vega10 power profile switching
Clock index 0 is a valid index that is needed to restore the default
graphics power profile. Use ~0 to indicate a failure to find a clock
index. This fixes the clocks getting stuck in the compute power
profile after running a compute application on Vega10.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:09:48 -04:00
Alex Deucher
2d2e5e7e53 drm/amdgpu: add raven gpu_info support
Add support for parsing the gpu info table on raven.
This is required to get the gpu config data for raven.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:09:19 -04:00
Hawking Zhang
fbf09b6935 drm/amdgpu: correct emit frame size for vcn dec/enc ring
only mmhub will be invalidated during vcn dec/enc vm flush

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:08:59 -04:00
Hawking Zhang
04e5f2a635 drm/amdgpu: correct vmhub for vcn dec/enc ring
This got missed due to differences in the trees
when raven support was merged.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: ken wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 18:07:59 -04:00
kbuild test robot
c651fd7c11 drm/amd/powerplay: fix array_size.cocci warnings
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:75:42-43: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:466:22-23: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:468:22-23: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:470:20-21: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:473:22-23: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:475:21-22: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:477:21-22: WARNING: Use ARRAY_SIZE

 Use ARRAY_SIZE instead of dividing sizeof array with sizeof an element

Semantic patch information:
 This makes an effort to find cases where ARRAY_SIZE can be used such as
 where there is a division of sizeof the array by the sizeof its first
 element or by any indexed element or the element type. It replaces the
 division of the two sizeofs by ARRAY_SIZE.

Generated by: scripts/coccinelle/misc/array_size.cocci

CC: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:41:58 -04:00
Alex Deucher
0dfafa225d drm/amdgpu/vcn: remove duplicate mask
Looks like a copy past issue.

Reported-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:41:57 -04:00
Chunming Zhou
df515052ed drm/amdgpu: add RAVEN pci id (v2)
Add the RAVEN pci id.

v2: add exp flag for now (Alex)

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:41:56 -04:00
Andrey Grodzovsky
a6ca5ac746 drm/amd: Add DCN ivsrcids (v2)
v2: squash in some updates (Alex)

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:41:55 -04:00
Hawking Zhang
30db095f51 drm/amdgpu/powerplay/raven: add smu block and enable powerplay
Add the ip block and enable powerplay on raven.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:41:55 -04:00
Alex Deucher
380cc70439 drm/amdgpu/raven: power up/down VCN via the SMU (v2)
By default VCN is powered down like SDMA, power it up/down
on driver load/unload.

[Rui: Fix to add the parameter 0 to un-gate VCN] v2

Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:41:54 -04:00
Chunming Zhou
401b58ceb5 drm/amd/powerplay/rv: power up/down sdma via the SMU
sdma is powered down by default in vbios,
need to power up in driver init.  Power it down
again on driver tear down.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:41:53 -04:00
Rex Zhu
a960d61cbd drm/amd/powerplay: add raven support in hwmgr. (v2)
hwmgr handles the GPU power state management.

v2: squash in updates (Alex)

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:41:52 -04:00
Rex Zhu
4fa483e5b3 drm/amd/powerplay: add raven support in smumgr. (v2)
smumgr provides the interface for interacting with the
smu firmware which handles power management.

v2: squash in updates (Alex)

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:41:51 -04:00
Rex Zhu
adfc7f077d drm/amd/powerplay: add ppt_v3 define
defines clock dependencies for raven.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:41:51 -04:00
Rex Zhu
f4afe799cf drm/amdgpu: add raven related define in pptable.h.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:41:50 -04:00
Rex Zhu
07c5b4ed21 drm/amdgpu/powerplay: add header file for smu10. (v2)
Headers define the driver/fw interface for smu10.

v2: squash in updates (Alex)

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-24 17:41:49 -04:00