- dual license for optee_msg.h and optee_smc.h
Generic
- add cancellation support to client interface
-----BEGIN PGP SIGNATURE-----
iQJOBAABCgA4FiEEcK3MsDvGvFp6zV9ztbC4QZeP7NMFAlx32w8aHGplbnMud2lr
bGFuZGVyQGxpbmFyby5vcmcACgkQtbC4QZeP7NNr9g//czpqt3B7e2pUF46+rjLF
MZZAQwJw1KGjAH8YcUXXWlRI6HRIWKRMohZp4ixC4Xe/OQOpl7grwcWg6j69yI+k
EWdV/SJf6yKmxf9MwgMmh7U2bijIvQAYNd11ODZL+PZfetDLJ6U8kcNlrAGLFTAP
MtxM+wXcmnIT/CHD0wz8hH2B8ApYTCv4E5vkPXSfZEQ2mUU7Lns0MeUzXs74zPQU
yJgCMZnLA2JFJ3xhdi1e2gdyI4NGtAomHAQ9oIzD6rO1OU1H51L2+yFHK1G+eu6I
uMy/bSF0RBJfM0NN9k1XPssHtgg7JrJ6kHZh9Z2knuCi0KUf75bdZE1qC+9N9uu9
9+Qpt6IyxsRPwCgtVuKNl4KEIsxwGALG0oUwe9sBPIL1dOqZtc/bPDNME7LTAoN5
0JWxbz0YLgNKPpkIUfs48vzVrRqHhVBbZ/SuXmOLx9w+3wY/V1xH8pHmsqKJ/0b6
rdWXByt4Vv4YTYXVUz7ChS0ax+ZrDqocxvPFATRYXCNVlE/in/GHmR+QJkpEZnN9
IXhvvYyv582NVYBRAVf7DZBrUIgKT8SnT66PWhiCiP2z0rK5a3CFohV6Vdl/aqyE
1hppXuREuCbxdRTRu563yJL+v4MBfzItRp7v5xW/R8dAMPVtUMIlUyn11a4DGeWz
WYgNf9Po3M2JT7GEvNA2VKA=
=h0Es
-----END PGP SIGNATURE-----
Merge tag 'tee-misc-for-v5.1' of https://git.linaro.org/people/jens.wiklander/linux-tee into arm/drivers
OP-TEE driver
- dual license for optee_msg.h and optee_smc.h
Generic
- add cancellation support to client interface
* tag 'tee-misc-for-v5.1' of https://git.linaro.org/people/jens.wiklander/linux-tee:
tee: optee: update optee_msg.h and optee_smc.h to dual license
tee: add cancellation support to client interface
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add support of cancellation request to the TEE kernel internal
client interface. Can be used by software TPM drivers, that leverage
TEE under the hood (for instance TPM2.0 mobile profile), for requesting
cancellation of time-consuming operations (RSA key-pair generation etc.).
Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Fixes the following sparse warning:
drivers/char/hw_random/optee-rng.c:265:35: warning:
symbol 'optee_rng_id_table' was not declared. Should it be static?
Fixes: 5fe8b1cc6a ("hwrng: add OP-TEE based rng driver")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The return from the call to tee_client_invoke_func can be a
negative error code however this is being assigned to an
unsigned variable 'ret' hence the check is always false.
Fix this by making 'ret' an int.
Detected by Coccinelle ("Unsigned expression compared with zero:
ret < 0")
Fixes: c3fa24af92 ("tee: optee: add TEE bus device enumeration support")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The return from the call to tee_client_invoke_func can be a
negative error code however this is being assigned to an
unsigned variable 'ret' hence the check is always false.
Fix this by making 'ret' an int.
Detected by Coccinelle ("Unsigned expression compared with zero:
ret < 0")
Fixes: 5fe8b1cc6a ("hwrng: add OP-TEE based rng driver")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add check for valid ctx pointer and then only dereference ctx to
configure supp_nowait flag.
Fixes: 42bf4152d8 ("tee: add supp_nowait flag in tee_context struct")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Clang warns:
drivers/char/hw_random/optee-rng.c:80:31: warning: suggest braces around
initialization of subobject [-Wmissing-braces]
struct tee_param param[4] = {0};
^
{}
drivers/char/hw_random/optee-rng.c:177:31: warning: suggest braces
around initialization of subobject [-Wmissing-braces]
struct tee_param param[4] = {0};
^
{}
drivers/char/hw_random/optee-rng.c:212:48: warning: suggest braces
around initialization of subobject [-Wmissing-braces]
struct tee_ioctl_open_session_arg sess_arg = {0};
^
{}
3 warnings generated.
One way to fix these warnings is to add additional braces like Clang
suggests; however, there has been a bit of push back from some
maintainers, who just prefer memset as it is unambiguous, doesn't
depend on a particular compiler version, and properly initializes all
subobjects [1][2]. Do that here so there are no more warnings.
[1]: https://lore.kernel.org/lkml/022e41c0-8465-dc7a-a45c-64187ecd9684@amd.com/
[2]: https://lore.kernel.org/lkml/20181128.215241.702406654469517539.davem@davemloft.net/
Fixes: 5fe8b1cc6a ("hwrng: add OP-TEE based rng driver")
Link: https://github.com/ClangBuiltLinux/linux/issues/369
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Clang warns:
drivers/tee/optee/device.c:39:31: warning: suggest braces around
initialization of subobject [-Wmissing-braces]
struct tee_param param[4] = {0};
^
{}
drivers/tee/optee/device.c:92:48: warning: suggest braces around
initialization of subobject [-Wmissing-braces]
struct tee_ioctl_open_session_arg sess_arg = {0};
^
{}
2 warnings generated.
One way to fix these warnings is to add additional braces like Clang
suggests; however, there has been a bit of push back from some
maintainers, who just prefer memset as it is unambiguous, doesn't
depend on a particular compiler version, and properly initializes all
subobjects [1][2]. Do that here so there are no more warnings.
[1]: https://lore.kernel.org/lkml/022e41c0-8465-dc7a-a45c-64187ecd9684@amd.com/
[2]: https://lore.kernel.org/lkml/20181128.215241.702406654469517539.davem@davemloft.net/
Fixes: c3fa24af92 ("tee: optee: add TEE bus device enumeration support")
Link: https://github.com/ClangBuiltLinux/linux/issues/370
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
DPIO driver
- fixed a use after free problem
- fixed a memory leak on error path
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAlxsbpsACgkQhtxQDvus
FVTLjBAAtoB2WjG6f8QPPsUi+qsnxW3WoIyZoVvhy+epc9yfhvnXTH5d63sWdlZU
ZfCtDwtRSaeac/uTq7ph1aqz4N5o/XS0/oLsvAKfKOlc3acTszMlF/oQe9nHpEZB
dStyU0ZYmJD2DIQYQc1565FaN4Zik4dKZvj78hK2uR8mzHD+MlphV0aXG1MXFWgA
1VuGCQ8BXF6AiGd24wGqEjXHFSZngpcf9Wa7qU12BtUB0VEL7vrkHaabsLpVdcmN
oOp3P8O0EJzew1cSxwfXOd+X8usXFvUC6WDTUHB7yraJlpC5AteDURdhldOiueEp
9Qi+f46txjvFklA/L+Ji2gagR4bxy55XNaWZcppmuLPRD1GmisTM/9oAL3UO6cDB
uadMZCkw/QpBMVH8Ng/rXqNpy3r8tVc6/xZIt+hFHkizpXmqpGSwpNWAsRH9aM8m
5XV1CxHIied0WiK54ZIdcHbxE5R06Eq6jaB2VlZlnusPwuFmh+GolNlvj87QBvkZ
J6dMIJE9/xCfoyp5p1KfYJ713IAAfeSpeoks134dkhDApYRZlDoRNyJBQaBQCMRc
YImTFw1sECCfH2UsQgDXKAHQm0KSFotFKodM/YOeeQpjXTJxDMTQrfMjiMhcsgn5
BZLXivkHpPfcGKAYVV6l026Vib5m1Ton39DN3KcKB8wrEfjE9tw=
=GogM
-----END PGP SIGNATURE-----
Merge tag 'soc-fsl-next-v5.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers
NXP/FSL SoC driver updates for v5.1 take3
DPIO driver
- fixed a use after free problem
- fixed a memory leak on error path
* tag 'soc-fsl-next-v5.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
soc: fsl: dpio: fix memory leak of a struct qbman on error exit path
soc: fsl: dpio: Use after free in dpaa2_dpio_remove()
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Currently the error check for a null reg leaks a struct qbman
that was allocated earlier. Fix this by kfree'ing p on the error exit
path.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Fixes the following sparse warning:
drivers/clk/tegra/clk-tegra124-dfll-fcpu.c:244:18: warning:
symbol 'tegra210_cpu_cvb_tables' was not declared. Should it be static?
Fixes: 2b2dbc2f94 ("clk: tegra: dfll: add CVB tables for Tegra210")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch fixes typos in the llcc-slice driver.
Fixes: 72d1cd0331 ("qcom: soc: llcc-slice: Clear the global drv_data pointer on error")
Signed-off-by: Andy Gross <andy.gross@linaro.org>
* Fixups/Cleanup for Qualcomm LLCC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJcZxHLAAoJEFKiBbHx2RXV6cwP/jCRdTI6gXaUcbrSoDdN5LZt
SffUYjYdde/ppYAK+XucjFCzL9+D9G+NYXP9lsRZMDPBcEWf1xlRqxQA29PMIJt1
c70etrr9zeq0EGFxtfAZIYo5cHRKORDDv7ZfwWhHMwCjEdqKzRYN+CMxTsLBgP1a
zIPDTZ3WbKUboB/XPcedRAfHStgn7DiF6Xbi3MOxsGW/zprBejPAQyKaOPvMdHuV
4jU8zdI0RvjXDrjHFcJ01L18cUMiWX6jFhjyR/hcBir41cR8WCD70X+zviH5KtoX
b9pnDjFRlfSiXbB9lxCWPycPrpy2DJ9rNVypn7Me37ZpLkdUCV5BZAY7WntniZlw
MoMn+DZSwwYjIg532w84bY2oDHDwhqm+cW3iu6O+hLTlZ+djCDV2P4d2dQJ/6jzC
dZyugSwwkjLLE7V4VfZdTCIDdjOthqocBc7cOAPke3F4dsQmeODBHcbAm22pFtVu
TeLLhllrC+Ou4Xho/53jP7VNMkaDiRyxFdQuXOoLX8MRAWg9OvFgubR/XdVHK1Pa
u52joTwGXLqTVfEKZnA2Kb4QZ6rg9CdfFh1YpLPJr00Uwd91DpVrRPMRMFRtWhQk
4um3qYIkSnWNHQoPC2XndwvWbUYmDhnGBTXnHA6SR/u6OmFdgpIF0OnKmCX6Ts6L
LsA1hID91DzsYXsqu3eb
=URKt
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/drivers
Qualcomm ARM Based Driver Updates for v5.1 - Part 2
* Fixups/Cleanup for Qualcomm LLCC
* tag 'qcom-drivers-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
qcom: soc: llcc-slice: Consolidate some code
qcom: soc: llcc-slice: Clear the global drv_data pointer on error
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix the Clang warning for enum in Navigator dma
- Simplify code in ti_sci with DEFINE_SHOW_ATTRIBUTE macro
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJcVIjTAAoJEHJsHOdBp5c/xWQP+QFHtLYwGlX1hlcoNksh4TuE
fkR3J6XaslJTHQmMfhDJjWiM5xCbMLW2WO86rfTDb32kXzoG4iZAvgCptbMiFUmr
E6tJDzvR72fJjPyYK7LPxY9Ke9pl4fiiowV+vk87nl4ikfjp8OCHLok0aYXYBOXj
MQjd3AEc3tO6FE/LBPH/q96qg90psgYzj8F6BLrVZjXKhF57vjdAw6Fe+tavn4bz
jXnC6WbpwFccfkkoDAHE3A31HlKSR9c9Llrp/emHpVd78vD5fjWwv2SMcJcRVF8s
yGEnZ7z3SHVpnqnMFzceXjaHVo4pVIOGGm7GvNNgP0VEUMYjCL2Z++2bobT1//5I
EO1KAiyAWebqmi5nqYfktI4HBPN4gH83htN44GDG6X/Us5SAh399aBeZgkrLE4F8
tdiZO4ubLRmkhUER4sa1v80hxGYO5sKOoMnhGwHmapyzhC7nQgd/BpYCAXsFvZWO
CvJcYpCiw5JfIvua9gvbBc3jHtfu1/Ct22vClEzkAu0DJso0dYpzqz0SE1ZxrFLg
iDXrsmJPpPDqCxQl66jY5NgMDmaUTpTzNES28mC/K1wzlMHQFAKvR8BdFG5d9Usa
CSbyZ8QVt8dCo+r6eu6GAFpSS0bg0/yTwlpsdDTIbzXklA45P8TjW40FCCRQcSuh
keLDFnJPUTcfck07+XKI
=h0cu
-----END PGP SIGNATURE-----
Merge tag 'drivers_soc_for_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers
soc: ti: couple of non critical fixes for v5.1
- Fix the Clang warning for enum in Navigator dma
- Simplify code in ti_sci with DEFINE_SHOW_ATTRIBUTE macro
* tag 'drivers_soc_for_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
soc: ti: knav_dma: Use proper enum in pktdma_init_chan
firmware: ti_sci: Change to use DEFINE_SHOW_ATTRIBUTE macro
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for 5.1, please pull the following:
- Stefan updates the BCM2835 SoC driver with downstream properties and
uses that to implement a reboot notifier to tell the VC4 firmware when
Linux on the ARM CPU is rebooting
- Eric adds a proper power domain driver for the BCM283x SoCs and
updates a bunch of drivers to have a better and clearer Device Tree
definition to support power domains/breaking up of functionality. This
requires converting the existing watchdog driver into a MFD and then
breaking up the functionality into separate drivers and finally
updating the DTS files to leverage the power domains information.
- Wei provides a fix for making a symbol static
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlxV0IYACgkQh9CWnEQH
BwQIHA//TL12EfHws6C64EKspqsg9NE5/+K3HRRJbgwtuBQ/n6oYBMyJx+6x6Nwc
7QjuCkZ/VWKxy0Fn+ToGnX0JgrQL5kND3Cm0d8cyZ0VJ6juppizyAa1YkFplShSr
l0XlYaJo1HrB3hBd/+YbGZnLp9flbii5d3MIcy8ZoWmN7zLeHnQbHaf8jcbJC+Iw
Mal8ojk2ru0rMimMQieTiPzWwiec08wtSIYs2590rOVWFyhGIn/KmHqpG6iYjdwj
oQbr86R0jMPCb/g3SXRttxW8wFbtYdmILdkzhOaEd4JyJEwUCNDciM3E04OyE9VN
fNMc1l0zh7dfyo9bFRpgS6AAxYQVj3led+B1NGtpnjDPybVWU10gipGdgFt9UPRE
pJnS1LcPbAJ1FdbcYFU0TsiViWLZehm2cbc4rPYvqKp1Y+82FJZTYyu0GmBOUwB6
jpM5ZVvET8k3nw6ImeE3jjT3kBfF31u552+iO4RQvKHRm/GBMtyTDrFZVUwgqMFE
NEKnj3/VLSCxP3dnQImw1ro2493piZNdlBEs6mAugFUGqcb+40KOtOOpWiGMFH7h
BZN0kj128ryG/YCVKDOnZSbYRLhpxc1VcVYJ3rYJgn8mrFFmNo/fjDgaRogrJN/s
LmCiSIqsmuy8f36/IWd+aHk6ex5yskJe7x5M/7tlmz03oXg1viQ=
=t5+u
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux into arm/drivers
This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes
for 5.1, please pull the following:
- Stefan updates the BCM2835 SoC driver with downstream properties and
uses that to implement a reboot notifier to tell the VC4 firmware when
Linux on the ARM CPU is rebooting
- Eric adds a proper power domain driver for the BCM283x SoCs and
updates a bunch of drivers to have a better and clearer Device Tree
definition to support power domains/breaking up of functionality. This
requires converting the existing watchdog driver into a MFD and then
breaking up the functionality into separate drivers and finally
updating the DTS files to leverage the power domains information.
- Wei provides a fix for making a symbol static
* tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux:
ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware.
ARM: bcm283x: Extend the WDT DT node out to cover the whole PM block. (v4)
soc: bcm: bcm2835-pm: Make local symbol static
soc: bcm: Make PM driver default for BCM2835
soc: bcm: bcm2835-pm: Add support for power domains under a new binding.
bcm2835-pm: Move bcm2835-watchdog's DT probe to an MFD.
dt-bindings: soc: Add a new binding for the BCM2835 PM node. (v4)
firmware: raspberrypi: notify VC4 firmware of a reboot
soc: bcm2835: sync firmware properties with downstream
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Add Qualcomm RPMh power domain driver and related changes
* Fix issues with sleep/wake sets and batch API in RPMh
* Update MAINTAINERS Qualcomm entry
* Fixup RMTFS-mem sysfs and uevents
* Fix error handling in GSBI
* Add SMD-RPM compatible entry for SDM660
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJcV75tAAoJEFKiBbHx2RXV3ZcQAJ4xdmg0eVXrzu4ltl/ZbF7m
walu7pGtLF7lIXJoJZWgpzS6SAmDQAMG++pp6zP6+3t6fB8heSNVBImgo2l6fHzr
KEHoH1PFhrdZwyOhswE/5n5CZBOb4xrL+m94NufDh7Yv8h5ukC8DH3xE9PFsoh4A
GnDc6qkHByNJKuNxlKKASq6VRMqzpnys2Ibzs6G5/6UDzvnEAYj5VoHLLCjsh6r+
+bKusJPUZKujyLU85rbtpEjO1HxHiOq7TJI5FZ8dta+iXSyIc/2nM9InTgr68ATq
VN7mOtclMEiVN8uQaXN0D/FWK3JYBIY5Mvd8zYzzkE+NDj0tnZDZoLjK2VnTX9o+
nORX7vQc/JmBayLcMaBZ/ZB+i2lsg37ziFCZaZiP9GYR1DAvm3yLfaxbWmkVKbGq
lhf/dR7qyXKjIP8rPO2qp4sCKww2RbkDa2p+xnQ2/psjvpgkmy4lcfIhw5HWonQR
eJ1UgoLsdQf/Xi6cKKmuzbdQsmZGr95sTHh06Gw1yeMRGuoXTHSNYx5epLdwJmD5
OWcIwh+sfZdmKUhMB/895EFpRuK/+L07N+n48DYaaU4CHXcowp80Ng5V6FnEnEWm
tI9oKt3N2kAYQAPlgpb3azTtAmB+yAcaYGrNQXzd7nYLnLma40qCR0Nx8bMXCjeq
sgRdF06ATCQDbBruztw3
=CcrU
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/drivers
Qualcomm ARM Based Driver Updates for v5.1
* Add Qualcomm RPMh power domain driver and related changes
* Fix issues with sleep/wake sets and batch API in RPMh
* Update MAINTAINERS Qualcomm entry
* Fixup RMTFS-mem sysfs and uevents
* Fix error handling in GSBI
* Add SMD-RPM compatible entry for SDM660
* tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
soc: qcom: smd-rpm: Add sdm660 compatible
soc: qcom: gsbi: Fix error handling in gsbi_probe()
soc: qcom: rpmh: Avoid accessing freed memory from batch API
drivers: qcom: rpmh: avoid sending sleep/wake sets immediately
soc: qcom: rmtfs-mem: Make sysfs attributes world-readable
soc: qcom: rmtfs-mem: Add class to enable uevents
soc: qcom: update config dependencies for QCOM_RPMPD
soc: qcom: rpmpd: Drop family A RPM dependency
MAINTAINERS: update list of qcom drivers
soc: qcom: rpmhpd: Mark mx as a parent for cx
soc: qcom: rpmhpd: Add RPMh power domain driver
soc: qcom: rpmpd: Add support for get/set performance state
soc: qcom: rpmpd: Add a Power domain driver to model corners
dt-bindings: power: Add qcom rpm power domain driver bindings
OPP: Add support for parsing the 'opp-level' property
dt-bindings: opp: Introduce opp-level bindings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- supp_nowait flag for non-blocking tee requests
- The tee bus driver framework
- OP-TEE TEE bus device enumeration support
- An OP-TEE based rng driver
-----BEGIN PGP SIGNATURE-----
iQJOBAABCgA4FiEEcK3MsDvGvFp6zV9ztbC4QZeP7NMFAlxUwVoaHGplbnMud2lr
bGFuZGVyQGxpbmFyby5vcmcACgkQtbC4QZeP7NMzCA//S0fLom4hKSz8hgfpXBxR
0RsOiEBE+LGIfShBx+tj+yzG0DPvRBsa4lbvX/uKdPJk/1giazi0lJn3GPQf0XOU
Lfdb03hyoKknK5AoPm3N8AceyP9FMkT/813Moxrc35FgQV6OvSGGmjtXs+NQ5SbZ
m7YV/zJIkGbNzfRiyN389AtbV95UpNDs7FjTw/d/CZ/U9mRSHAvR1zAUXMgcPpwI
XcdhIfgWe0bPjYsX3EmxCRPM0MKrG1LQDB95dkH6+uKM9Fh2MYb+6P5bXlETM5DI
ruMupkT+iXXLye2pDPZC1G8Czhqy55qYSTCz3fKZt/onhCUghT9W9yUoxZyvvsEP
6Yf7vDjcBVGfUyvdUEpkmjpjejgbzEkZVxvC+9S8PzPzdWqLD6fHAj+IHkq1mjc7
joqRcpfkTqldvcDpBVoN4QchTs/1ERNPvs+XG7auBSkB9tPAIQP72UBxVxnzq4QM
RSJETWND3eylCw08wXrPngbBAejyGDnl2oBnuR0PqVtEWDMiJvkoRl/1F8CxnDM6
aKk2XlslgAQdwnEpN4h1Z+Nnn/KtYoQ3cDHZoGMQ6ktVdUeNvicL1FcbioWCGnI6
mu6pw2i0UKNxFSTLUn8+32Ao9pe4dLsJcOYMZyGQHdnG4M53pCJRRgqh1Bil1s63
4NvqHsa62AUqyRPeQSCj1IU=
=So4a
-----END PGP SIGNATURE-----
Merge tag 'tee-bus-for-5.1' of https://git.linaro.org/people/jens.wiklander/linux-tee into arm/drivers
Introduce TEE bus driver framework
- supp_nowait flag for non-blocking tee requests
- The tee bus driver framework
- OP-TEE TEE bus device enumeration support
- An OP-TEE based rng driver
* tag 'tee-bus-for-5.1' of https://git.linaro.org/people/jens.wiklander/linux-tee:
hwrng: add OP-TEE based rng driver
tee: optee: add TEE bus device enumeration support
tee: add bus driver framework for TEE based devices
tee: add supp_nowait flag in tee_context struct
- Add compatibility support for different FWs in the hisi LPC bus driver
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJcXUynAAoJEAvIV27ZiWZcZr0P/37ARz4T4f1SlmWEwegGW6zq
aGCyjzbM7q/zh5HZ/KeQaVvaRVoy21MVcMHD9L4Y2Log0Sd6lgIoHrtfH8VIoDfg
6Lxaua8F4NJd6SkQCN07bLn9NUghVB16UuROM3ks7rEx+8rQ6oy4+JWccyPK/oMT
3Lxj9SGJzfuaqO6NzhobFTE+MZ/J25D8tIjav+S12jUgQV2611L8g6x3JrM8WQPu
Zs6ynch9c8nekR1ntNsTmEGa/ey2QWo32PqU65UVB7Pj2vRBFkTcmSNmDP2VMM5t
A/I+P76P0ifl5VdCWk/o7k30fvp7HYbOLyVwuM/4GF4/h6H10C+cZdTPf3lGNjYS
48hBVWTvuSurPKY0hidvQJkaCfDuHyKhOEBg76bF40GZ+ZfPl5saXVTBfXuF3923
j7rZAPpBrbqL0+tOAbnvYePk603m0AT/lZYRzEQFPH3DOoLHZxjmBZO0KDByRF90
kX5Atr195uQrZn1vVn2UciDjQgAAI02p1tsvXVr322nUbTAGZfzTngqFcV2MuDkD
rI+C/HebLZNinC85qibxzPUqEbEePfkWaWuBl2fz8HsYJ9JOGQeMxP5O0Mrf8Zmv
LBn7MikUh/lSVFpTJyJJU9uj45vfcGExgFbg5kgQY/kICclMY97/4MSb7hp2tKF0
jt6C3n7dXANOvGrKIHQN
=f0/p
-----END PGP SIGNATURE-----
Merge tag 'hisi-drivers-for-5.1' of git://github.com/hisilicon/linux-hisi into arm/drivers
ARM64: hisi: SoC driver updates for 5.1
- Add compatibility support for different FWs in the hisi LPC bus driver
* tag 'hisi-drivers-for-5.1' of git://github.com/hisilicon/linux-hisi:
bus: hisi_lpc: Don't fail probe for unrecognised child devices
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains a couple of prerequisite patches to enable CPU frequency
scaling on Tegra210.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlxdl3ETHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoSjGD/sFNbFXRycqN+PlwvvMK6b+rRRpHEVb
Wv8cpO/JgKGCEcXIbmY25xgouJzVgAH0SxmJ0P2l5PO28saUAMv2+7jzRiXTqTxH
uAF7MFVUYRcXzULckZTzIQz8mzek8B2Ma/8gRVxM2LFkfCPpXGxweuNU6z+pFz9o
L31SIA64dqLuDnWN10aK28fwb6zkXN1ULwrRBXBeU9kaA7W6xAm7RLOmxnA6uaxQ
kHtNaF49vq8l3EX3rPMmEAgYdMOWylk4JPyFhGq10M9viUcxQV2PXBlBBQTU9gLH
DpnNhwb3yAC/cmjs1yakTJySo0KyyvxnS6DdiRPkLYPkxZJCZRCZqG+E0AW7r5+I
uoybiRv0RgUtz2naM1JR/US8dGakRXM71LGNQ3OCTfGI/YynsbTX0qyC3d/owAbg
LKgOpDqpR3a6SpS8OM8wskAgHtW7DzbncnPV9Axp3pAd04MaI2jClW9DUO0EL5QT
1v6eEQRa5rdpgY1sxDYRNNsKxtpA8dC3i8mujWA85p1z9CCFnJxkHhr169xOSwRS
vlZjeMM23gSQIDvW86tIwB27oraYyzQGuJfHw8V2Z5tw+FJ2ajBdgVZUEH/F5/xk
BVHMyC+MHGwaQGUSTq1SsHRPK9/OREmH/zxfIj/s/wR72UcImJ4ih56yOZFCNFUz
pAHHj9XjGmfzKQ==
=R+Ez
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.1-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
clk: tegra: Changes for v5.1-rc1
This contains a couple of prerequisite patches to enable CPU frequency
scaling on Tegra210.
* tag 'tegra-for-5.1-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
clk: tegra: dfll: build clk-dfll.c for Tegra124 and Tegra210
clk: tegra: dfll: add CVB tables for Tegra210
clk: tegra: dfll: round down voltages based on alignment
clk: tegra: dfll: support PWM regulator control
clk: tegra: dfll: CVB calculation alignment with the regulator
clk: tegra: dfll: registration for multiple SoCs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This uses the DFLL clock support to enable CPU frequency scaling on
Tegra210.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlxdl6MTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoX/LD/9mh+TFN9pefVv3TlXn08c6zyayZzDp
0YpUQMXktqMwYrLsYcwL7O7KEhwEClMDrNVNSuPOCH564GxonCud6AwMPqgpiEhf
5OJuMndnDlM1AGKzPYU6JU2n8C1YafoKBLaN/wZ4riwTw9mfXXJoJnG+D7Kwu+/6
2CwqmDBDMTOhlXtb7hyyfuLbZTP+0TKbDQdQpBlFgs9BFjs/2fKPbTCP75cD0RM1
2eVSlwaRBEMpsLQHZ5VZIxg2VcFqa79c1eB6pgZ2Hyn+BSae4F+i9N/DIjquiav4
hplbC/lr3AOMWtIx6V18wrS57qKGU28K9WuJeMfCpblMZrTYmNE96RghzMxP+5Zw
gaAurj12dE+Ie5jfqzW/aW9ktJbX3rbEhrCDqly3H67K2v27G5Vstf1SssDhk7wy
YF9KKFI5qjzVn0Bo8xcBukEfePQ2AjNeGMWrwWi4h53XvfyXcCSKbwY9DvcgocEH
e2gUrCtyu/KWwV0r+6txw5UlZVuWI8SJpRhMv+En6F/tls/sIDB34PP0ubc/ZOKa
Ehnb4E+uJfCxujsbpvpRIjKosTPD7R52X1Stcw3lcxsxOF3pE2DQhXVkAC22jfT/
qKmaDNq6Cdm8kc5CuwqHTY5CygvFRC6cu/jT4qouWWyo3WFDQ1WDAasGER7TXvsK
tMIjAMGQOxvn5Q==
=pSIK
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.1-cpufreq' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
cpufreq: tegra: Add support for Tegra210
This uses the DFLL clock support to enable CPU frequency scaling on
Tegra210.
* tag 'tegra-for-5.1-cpufreq' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
cpufreq: dt-platdev: add Tegra210 to blacklist
cpufreq: tegra124: extend to support Tegra210
cpufreq: tegra124: do not handle the CPU rail
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains a couple of miscellaneous fixes for minor issues and a
largish rework of the PMC driver to make it work on systems where the
PMC has been locked down and can only be accessed from secure firmware.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlxdmF8THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zodlTD/44v+tiZRB+6P6XafKvwBEruq1INqab
5vTj7OOhmL2WPonruTUaze6bWqpV84gaqorVfR8JYvWL6nT+JGVvEnQwBTgwMqlL
PYmPc93PlvieBJMQGmKjLYypLWFfaihjIkdAgosVKkFhHcP4SqKBhtq1Gs+1nFaC
6uWdz+9S+ad/JPiYnoBHC6DoeXBDM8izpRLlsqPPAZkfzAcH7vTXbKoXN+VOeB/l
wvD5wlG90LwcoSoFlQsBEcEdklBGPO90ItJFJiqnjrHsxoHVzYSRfdy72/hXuTsp
5p/L5OWjcMG9DP5cF0HbmWetqEgTOLoRseyXuZZN3O3XHdkj37IRXEbSugHI5pi4
Oybm01TPvhyprNXjCDM6vxf3f0mlh3sPoHXRyM8KJuMkg5vb1L43Vs9BYCkKUMaO
I/nR5EUXb3R5/PvumL6LEiZVvjtpPWXL4swmbRbKoKd2K9kgFxGoYYbbbdDVZNim
KWGbo9LWL2BHMXi0exN+8XWE3lpdKQJWlWADpXhbZltEcq6oJCWqPe9glrAXl877
jd552NrRL9wiZikI+iwWpIMEkX4DLdxlZLw5r5kjInqsyo6H/N9kpRZMvDVo3VIi
d1o0gc2Y1wJbhkE1TXSYhZG9nbqKFPvT7V5aBbI6rYdNA3AgxwY4Rq65Ex0a3KGV
WFWxanWAqhn9Vw==
=C9+u
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
soc/tegra: Changes for v5.1-rc1
This contains a couple of miscellaneous fixes for minor issues and a
largish rework of the PMC driver to make it work on systems where the
PMC has been locked down and can only be accessed from secure firmware.
* tag 'tegra-for-5.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Support systems where PMC is marked secure
soc/tegra: pmc: Explicitly initialize all fields
soc/tegra: pmc: Make alignment consistent
soc/tegra: pmc: Pass struct tegra_pmc * where possible
soc/tegra: pmc: Make tegra_powergate_is_powered() a local function
soc/tegra: pmc: Add missing kerneldoc
soc/tegra: pmc: Sort includes alphabetically
soc/tegra: pmc: Use TEGRA186_ prefix for GPIO names
soc/tegra: fuse: Fix typo in tegra210_init_speedo_data
soc/tegra: fuse: Fix illegal free of IO base address
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
These changes add support for BPMP on Tegra210.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlxdmJ4THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoUNjEACJz0nXjTDHmlw/kWrOyVDK2B0Jmvno
toVi0CvJxER6itaVPHnxayQBl/a76owF+h4HbXjuvD2fAj8vfhjNYiwed5NxvMGO
lbP4Q6MhKoGzqIiZIubWNEQXLNK9gRrPULc1GuTuVKwIUPhUwKFgtHkFi6balVR0
lpnNEU1V070LPbW1I4oxG6fdntJO+KMVoBWcPfCsnMQmEZOG/CqQhbYRPKojDsaO
bb5FC3epffYBPIfJyvJy4XrGX6VOD4gC5KDhnDyIe4Hby4PsTzQGKcnp2b4OVssG
nRON9X72o1i4uOdnUNkJnd6UGOL9Xn8zU9y2al6hRnx04+Sp1MHVSOwxI5HgkK7H
PtFJe4u639MbsP6J1RLfKMpbLHdOEU7xE26MaQz7CdHd57L11szRgv3HcdsuCpmd
a53djDTR0B2U9FzKI8ohp/cGr2l4Nc6Wlz2iVqxwTxyqXhE8NToIc56/gBQsIBbe
qotxZumjjjseaQAHlykyaPG1DcRPz71Z+FXnFyG7soncO0ksbIO42b1Ms2jz+v7D
ukHN193NLPfPB7EZCAsVnD+f1lIekrV+uWkTM9JoMgLkbxGSYKZS43hXO2QSa8Y4
H3eDOGjV2PFL74Lzv2rW7dtMiM5dx5ewie/pX7J+aIOwnBlN65Pexs7zm0NREjtQ
1qrmUTtiDFnZng==
=8HHq
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.1-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
firmware: tegra: Changes for v5.1-rc1
These changes add support for BPMP on Tegra210.
* tag 'tegra-for-5.1-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
firmware/tegra: Enable Tegra186 BPMP support on Tegra194
firmware: tegra: Conditionally support SoC generations
firmware: tegra: bpmp-tegra186: Remove unused includes
firmware: tegra: add bpmp driver for Tegra210
firmware: tegra: Refactor BPMP driver
firmware: tegra: Reword messaging terminology
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds the include/linux/reset directory to MAINTAINERS for reset
specific headers and adds headers for sunxi and socfpga in there to
get rid of a few extern function declarations.
There is a new reset driver for the Broadcom STB reset controller and
the i.MX7 system reset controller driver is extended to support i.MX8MQ
as well. Finally, there is a new header with reset id constants for
the Meson G12A SoC, which has a reset controller identical to Meson AXG
and thus can reuse its driver and DT bindings.
-----BEGIN PGP SIGNATURE-----
iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCXF2yeRcccC56YWJlbEBw
ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwH8jAP9OQaMl5llVXuHSFOwiqkJ2I09p
oROxu3dI/A4q7d5T8QD/Xuo4piSAdoT5YZyHp16NUafW3L1//wqTvxk0ubeTsgA=
=EIyo
-----END PGP SIGNATURE-----
Merge tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux into arm/drivers
Reset controller changes for v5.1
This adds the include/linux/reset directory to MAINTAINERS for reset
specific headers and adds headers for sunxi and socfpga in there to
get rid of a few extern function declarations.
There is a new reset driver for the Broadcom STB reset controller and
the i.MX7 system reset controller driver is extended to support i.MX8MQ
as well. Finally, there is a new header with reset id constants for
the Meson G12A SoC, which has a reset controller identical to Meson AXG
and thus can reuse its driver and DT bindings.
* tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux:
dt-bindings: reset: meson: add g12a bindings
reset: imx7: Add support for i.MX8MQ IP block variant
reset: imx7: Add plubming to support multiple IP variants
reset: Add Broadcom STB SW_INIT reset controller driver
dt-bindings: reset: Add document for Broadcom STB reset controller
reset: socfpga: declare socfpga_reset_init in a header file
reset: sunxi: declare sun6i_reset_init in a header file
MAINTAINERS: use include/linux/reset for reset controller related headers
dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Do not get GPCv2 driver depend on SOC_IMX8MQ since the driver is
going to be used on more SoCs than just i.MX8MQ.
- Add power domain information into SCU bindings document.
- Add support of start/stop a CPU into imx firmware driver.
- Support multiple address ranges per child node for imx-weim bus
driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJcYi+0AAoJEFBXWFqHsHzOtdYH/jX/y0r7OvX5GVSrrnW8PlkC
3i2EQ0sGOxWOMqBegZIpFe9W7IddAetMf6praPGz/efHPnoVC4jO8Yqe4TZwQXLB
vOxoN4G7NH9Al9RX11ce96kd/tUgVK/JHuQJ9fu+ogrprLpAS3w1sbIkidOMSF3M
/5VrmFCxUNOPwTHRnyjw8QsyypKnKEBu0jA8sgyUmg99ii6rqQ5OKh1vgKf62J0f
1BbJLalI0CxGcYVQxYBy2ML37+XxCcN9Vl8FxiI4tVRtZox8/YkU9V5vEgVWN2fS
ZWfgT9w7cJxI5x8Em8Cxe4zcyVdbn5w26lXc6WbXazIncm206Ps+DIeHkQI9jPA=
=8C2m
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.1:
- Do not get GPCv2 driver depend on SOC_IMX8MQ since the driver is
going to be used on more SoCs than just i.MX8MQ.
- Add power domain information into SCU bindings document.
- Add support of start/stop a CPU into imx firmware driver.
- Support multiple address ranges per child node for imx-weim bus
driver.
* tag 'imx-drivers-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
firmware: imx: Add support to start/stop a CPU
soc: imx: Break dependency on SOC_IMX8MQ for GPCv2
firmware: imx: scu-pd: add fallback compatible string support
dt-bindings: fsl: scu: add imx8qm scu power domain support
dt-bindings: fsl: scu: add fallback compatible string for power domain
bus: imx-weim: guard against timing configuration conflicts
bus: imx-weim: support multiple address ranges per child node
dt-bindings: bus: imx-weim: document multiple address ranges per child node
soc: imx: gpcv2: handle reset clocks
soc: imx: gpcv2: handle additional power-down bits in handshake register
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Make the code a little bit clearer (and use less gotos)
by consolidating some of the initialization.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Currently the data structure for llc-slice is devm allocated and
stored as a global but never cleared if the probe function fails.
This is a problem because devm managed memory gets freed on probe
failure the API functions could access the pointer after it has been
freed.
Initialize the drv_data pointer to an error and reset it to an error
on probe failure or device destroy and add protection to the API
functions to make sure the memory doesn't get accessed.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The zynqmp-genpd driver communicates the usage requirements
for logical power domains / devices to the platform FW.
FW is responsible for choosing appropriate power states,
taking Linux' usage information into account.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add Xilinx ZynqMP firmware APIs to control node status
and power. These APIs allows turning on/off power domain
and setting capabilities of devices present in power domain.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add documentation to describe ZynqMP power domain bindings.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add ZynqMP PM driver. PM driver provides power management
support for ZynqMP.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add Xilinx ZynqMP firmware APIs to set suspend mode
and inform firmware that master has initialized its
own power management.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add documentation to describe Xilinx ZynqMP power management
bindings.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This is done via RPC call to SCU.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add device tree bindings for the reset controller of g12a SoC family.
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Currently for ACPI-based FW we fail the probe for an unrecognised child
HID.
However, there is FW in the field with LPC child devices having fake HIDs,
namely "IPI0002", which was an IPMI device invented to support the
initial out-of-tree LPC host driver, different from the final mainline
version.
To provide compatibility support for these dodgy FWs, just discard the
unrecognised HIDs instead of failing the probe altogether.
Tested-by: Zengruan Ye <yezengruan@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add support for the axg and g12a SoC family in amlogic clk measure
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
[khilman: squashed some fixups from Martin]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the axg and g12a SoC family compatible to the clock measure bindings
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
When probe fails, a platforn_device is still associated to the node,
but dev_get_drvdata() returns NULL.
Handle this case by returning a consistent error.
Fixes: d4983983d9 ("soc: amlogic: add meson-canvas driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Maxime Jourdan <mjourdan@baylibre.com>
[khilman: fixed minor typo in comment ]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The BPMP implementation on Tegra194 is mostly compatible with the
implementation on Tegra186, so make sure the latter is available when
support for Tegra194 is enabled.
Suggested-by: Timo Alho <talho@nvidia.com>
Reviewed-by: Timo Alho <talho@nvidia.com>
Tested-by: Timo Alho <talho@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Only include support for Tegra210 and Tegra186 in the BPMP driver if
support for those SoCs was selected. This fixes a build failure seen
on 32-bit ARM allmodconfig builds, but could also happen on 64-bit
ARM builds if either Tegra210 or Tegra186 were not selected.
Reported-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Timo Alho <talho@nvidia.com>
Tested-by: Timo Alho <talho@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The call to of_parse_phandle returns a node pointer with refcount
incremented thus it must be explicitly decremented here after the last
usage.
Signed-off-by: Wen Yang <yellowriver2010@hotmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Fixes: d4983983d9 ("soc: amlogic: add meson-canvas driver")
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Tegra210 uses "tegra124-cpufreq" platform driver to register device data
for "cpufreq-dt" driver. So add it in the blacklist for
"cpufreq-dt-platdev" driver to drop that.
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: linux-pm@vger.kernel.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra210 uses the same methodology as Tegra124 for CPUFreq controlling
that based on DFLL clock. So extending this driver to support Tegra210.
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: linux-pm@vger.kernel.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra124 cpufreq driver has no information to handle the Vdd-CPU
rail. So this driver shouldn't handle for the CPU clock switching from
DFLL to other PLL clocks. It was designed to work on DFLL clock only,
which handle the frequency/voltage scaling in the background.
This patch removes the driver dependency of the CPU rail, as well as not
allow it to be built as a module and remove the removal function. So it
can keep working on DFLL clock.
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: linux-pm@vger.kernel.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra210 has a DFLL as well and can share the majority of the code with
the Tegra124 implementation. So build the same code for both platforms.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add CVB tables with different chip characterization, so that we can
generate the customize OPP table that suitable for different chips with
different SKUs.
The parameter 'tune_high_min_millivolts' is first time introduced in
this patch, which didn't use in the DFLL driver for clock and voltage
tuning before. It will be used later when DFLL in high voltage range.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
