Commit Graph

574327 Commits

Author SHA1 Message Date
Olof Johansson
2bc51d76d2 DT changes for 4.6:
- Addition of the ADC for sama5d2 and sama5d2_xplained
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJWxSixAAoJEKbNnwlvZCyzHXkP/13kVbgjNALTrvv4RUISGVYq
 Nl4xVwg/3oObrouxQ/nw0AI5EU92HdR0R4T87fueJupPn4YWYf7BpmMWqECDTA6M
 y6EBkKT35sV5zAVT6HWBhmGGnHCS7aisAE6Tfenao0gbK+31i/9F3SHF7atyJ3T8
 y4gyBWl/o4Nuz6UyfkntxM9vy0N1WstC1ekvYeIcc8ePr5E7/3UHTgeb42UAWcHj
 akoZwxmEeTTidaZujZZPPvKSMagz2wcnICKZ7OPXTJLtgf1ib7m3qHZnyXKWRQ/W
 CB9z8pybMPdCib1WH/lWlv6NOb1s/j+l0Aw9NQqVshLt/tmjbpo0HMNwZ2rt4iN4
 I5CLc8RaiF2PhP0Sq1hzaHjwLTEgsno4b+JhndI1+hFiPeAsB4vtLPhGupasdbJy
 MCi0We4h95WUdOo/vf+khpb2O3SATZli8QFHzgHNyfnNm63ETzU+o3l43Iph+04M
 rc/4l8yRt2IMl+22tLZvqziIyzXotqq51E7bT6eg83YBSrlvOHibp6bo0LriADv8
 zDrvr4quZ33vMKXtgk/jOEVXulrmVX2ePFuyUpcoKYks+cWF7pgx9pFxLTnpFieS
 DN2l6swjXE+aA5Gn8VyFiJgCpUnzpYjH++VAoa7IKUxjcj+YjeSrsVW2fFlkP46F
 +ZT01bhSD6TG9uC5r/Cu
 =mzUX
 -----END PGP SIGNATURE-----

Merge tag 'at91-ab-4.6-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt

DT changes for 4.6:
 - Addition of the ADC for sama5d2 and sama5d2_xplained

* tag 'at91-ab-4.6-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
  ARM: dts: at91: sama5d2 Xplained: enable the adc device
  ARM: dts: at91: sama5d2: add adc device

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 17:19:04 -08:00
Minghuan Lian
f21a3c7d57 dts/ls2080a: Update PCIe compatible
The patch adds LS2085a to PCIe compatible to fix the compatibility
issue when using firmware with LS2085a compatible property.

Signed-off-by: Minghuan Lian <minghuan.lian@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 16:40:41 -08:00
Olof Johansson
5dab9f62a4 Versatile family cleanups step 1:
- Finalize RealView the PB1176 and PB11MPCore device trees
 - Move Versatile to use the power/reset driver instead of a
   custom restart hook
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWwZOHAAoJEEEQszewGV1zsg8P/3xtEDPR9GJAuzzgV8o8hmpA
 psFc4PmdQcp1e19gb2oi0oKcv9xDzsKGavy/BYMMn9HQ6v4wTmtM9qMwNgRyTWZq
 RyAtnPxUP543Qiae1tdPBp700cyg8UsEcL56qhwemCOucjwD6wZNiAAs6bUh9mYa
 J1liSaarw+XOhzUdfqffk0JUac1oqnvdiiOLwAXsdWbCfNdkJGbfZ0N5TuUANMhM
 RXeqq8giEZAbvQtqumZv6c7Qk02zeG6tYq6R7lsW65IIvOhVk2rxYdC8ZhPTojxR
 V7jMLnA4xYn5IaLE4l7Z32AqKWGnsThmdP4OEMLnRhEduutHWUVj3XHlPAlS1pN1
 cD+mHuP48+5AscEL6Xf6+jeVYFkdER3RX9DgGZxUgLENw9T4g0/vq2DSGijwPuDN
 NB++vroPQoFEoPzCOx+JvO88VctabzuV7Z6rIvSLcIwPAhHvzMk1G+gy6hrUz5Bc
 cfovCqw1C8Y15srcIRhNr8dxDyZ3bpsatbSQNgPly4cHnAHLB8olTpXdfBzKIbKO
 FQmiAh+aPljOXxJT5yTg+3isIWA2tkc67WNiuX3+aKp38Ux2TNvDYCGf+LXF0RsU
 hgLGe3f4Bqw9xIMPYqQZM2UBl91p48ErhhmNJCWjceVgLEDHsCxaIvCx+oqLyYdv
 00TEPFLVtam4SJbqgJwq
 =NvEo
 -----END PGP SIGNATURE-----

Merge tag 'versatile-dt-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt

Versatile DT cleanups from Linus Walleij:

"this is a first pull request for my cleanups for the Versatile, as
the finished stuff should not be sitting in my tree but in ARM SoC.
This completes the ARM RealView PB1176 and PB11MPCore device trees,
and moves the Versatile to use power/reset.

The idea is to keep working on this cleanup branch and send additional
patches on top of this one as the prerequisites are merged into the MTD
and FBDEV subsystems. So please create a special versatile cleanup branch
(or suggest another approach).

As it happens, board files and device trees need to change at the same
time to make logical sense, especially for Versatile where auxdata is
replaced with DT entries, such as when reset is moved in the last patch
in this set. The MTD and CLCD changes will share this characteristic."

Versatile family cleanups step 1:
- Finalize RealView the PB1176 and PB11MPCore device trees
- Move Versatile to use the power/reset driver instead of a
  custom restart hook

* tag 'versatile-dt-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: versatile: move restart to the device tree
  ARM: realview: add the DS1338 RTC to PB1176 DT
  ARM: pb1176: add ethernet to devicetree
  ARM: pb1176: add ISP1761 USB OTG host controller
  ARM: pb1176: add AACI to the device tree
  ARM: pb1176: add ICST307 clocks to the device tree
  ARM: realview: fix up PB11MP flash compat strings
  ARM: realview: add flash devices to the PB1176 DTS

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 16:17:36 -08:00
Olof Johansson
fab4db0d35 Samsung DeviceTree updates and improvements for v4.6:
1. Add SROM controller device nodes.
 2. Add Ethernet chip as child of SROM controller on SMDK5410.
 3. Allow simultaneous usage exynos-rng and s5p-sss drivers on Exynos5.
 4. Cleanup CPU configuration on Exynos542x/5800.
 5. Add necessary nodes for cpufreq-dt driver on Exynos542x/5800 (OPPs,
    regulator supplies) which allows frequency and voltage scalling
    of this SoC.
 6. Minor cleanups.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWwRf5AAoJEME3ZuaGi4PXrAIP/RGMMvPNhSRp5EMbrZlK3gsg
 Q32cZgxXGW5AIgxhhXkBCDrfUFD3bpw7hAM4eWOScJvZWp0MagQJC7/9AKZ4/fRh
 J5gDmGyRrhhotUR2lzrJrN5YBffOlWiJ9VnVapWfdkYUDXXsL76xHdXnPyOnVlOv
 VcUh1g7Tbv1ao0U3tuY2PSpryk4Vi9R/SBSSQu9Tn6UChAFyZTpbPgbeS24tKkas
 jJDbfJS6eIBnyoImGiKC1E9eaERL2lh9YjZ323tzNSav4BYRLLlRe3olZf7uKQRs
 GIlyJbtcYu72+IANXkjjF+pKen3x8b1BWrUbyWD4nxRkn0gR6czRAzqw+sX0bBRl
 hYPd/IxnilgJni06e76YL0qwdSjvOThgiMNhojrU4y21Tr3xqzC6TJQiLK4dWlTD
 RiAReOCQTfxV3dlQpLixIN1icRlwkJz2JO791iavIEilZIT0dRrNkzQNILWj0GMU
 x9/JS/axja/ckKImMRVMd3ZCtDkYD4B0QzFEElcTe9oIhEmfk3VYZIxXu4a9U+5q
 NWU/hPxHoOk16tq6G8TvwwTCH561HTWnkXn1kpku8gr5x8rO9tH5KfgWX8syZAoh
 a/ugdzntt0GOZpSRhOYE9zXjKBlxiidq53fdVDFTw95V6r6JJYNWfmkWXbT2jteR
 L/UrZA45YPJCydvtRztE
 =OC9Z
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt

Samsung DeviceTree updates and improvements for v4.6:
1. Add SROM controller device nodes.
2. Add Ethernet chip as child of SROM controller on SMDK5410.
3. Allow simultaneous usage exynos-rng and s5p-sss drivers on Exynos5.
4. Cleanup CPU configuration on Exynos542x/5800.
5. Add necessary nodes for cpufreq-dt driver on Exynos542x/5800 (OPPs,
   regulator supplies) which allows frequency and voltage scalling
   of this SoC.
6. Minor cleanups.

* tag 'samsung-dt-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: Replace legacy *,wakeup property with wakeup-source for exynos boards
  ARM: dts: Add GSCL block parent clock management to pm domain on exynos542x
  ARM: dts: Extend existing CPU OPP for exynos5800
  ARM: dts: Add CPU OPP properties for exynos542x/5800
  ARM: dts: Add cluster regulator supply properties for exynos542x/5800
  ARM: dts: Make CPU configuration more readable on exynos542x/5800
  ARM: dts: Replace legacy *,wakeup property with wakeup-source on s5pv210
  ARM: dts: Allow simultaneous usage exynos-rng and s5p-sss drivers on exynos5
  ARM: dts: Add Ethernet chip to exynos5410-smdk5410
  ARM: dts: Add SROM to exynos5410
  ARM: dts: Add SROM device node for exynos5
  ARM: dts: Add SROM device node for exynos4
  ARM: dts: Add pinctrl support to exynos5410

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 14:30:50 -08:00
Olof Johansson
fc2834a465 Renesas ARM Based SoC DT Updates for v4.6
* Use SCIF and USBHS fallback compatibility strings
 * Add Baud Rate Generator (BRG) support for (H)SCIF
 * Enable SCIF_CLK frequency and pins
 * Use GIC_* defines
 * Enable audio on r8a7793/gose
 * Enable HDMI vidio out on r8a7793
 * Enable i2c on r8a7793/gose
 * Enable QSPI on alt
 * Enable GPIO keys and leds on gise
 * Enable audio on porter
 * Enable DU on porter
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWvirlAAoJENfPZGlqN0++H/MQAI7AQMgaAV5ejeyl7bgtsrBM
 7Xq8MojRIMqCXgpEGsJ09jqnuOQIDHEaAHLNX4FWwGmJD95yCudFoeNagr79b9WF
 oBHtkB9p60hw1Qz1fx9d/CjQrmAk7/TiLGBa81wNiz2D7xxmqXxYB3mdsA2oNmdV
 2RPnROPM6uiZMhFM5ePiS9ku++Mv5/lvQZYnMlP8PilPpfp1VHCjcN/CXE+3AzV2
 xH75tyg1A60rRmn4f2MP9kigQXC9OBdcGchI1ejwCnMGfw0THWjchAnNQ7GpV54a
 N0C0pCIfGrluBXHUmvN9Fof1t5R+PNc4tyaC1SHpAEKp1uq9xKAadzonbQy9UWA2
 A+iFCx0vkPo/JEbui1gE3Pixekthlk9kEXeJVBhobiraDoAIqLir5EztYLgPZUGg
 wLxm1gAB6N7DrJGXxsl1ZsnkcZH4Qooy3D7kCYCqGGdse7hCIRLKdG/GXA8BK9Yz
 fYPQH34kqwNpOi3Um3/VivYJjk0srTsLNMNsRTDWe7WwH7h/eK7+XuhfnJaO8di+
 V0l6ptjldLwVFbpkr1RrUpIHTXoud99SfEAdu2SLADL6pumApjN2TjGTtdCzavSl
 XgdshCsPiPOZ7Ou8VFDSFjfGkkEBXOAw5CJTAy+mcxn1b+vEQ5scIv0uAD1koLTS
 5KyhSNdtYuBTjWk1lDlg
 =YmRO
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM Based SoC DT Updates for v4.6

* Use SCIF and USBHS fallback compatibility strings
* Add Baud Rate Generator (BRG) support for (H)SCIF
* Enable SCIF_CLK frequency and pins
* Use GIC_* defines
* Enable audio on r8a7793/gose
* Enable HDMI vidio out on r8a7793
* Enable i2c on r8a7793/gose
* Enable QSPI on alt
* Enable GPIO keys and leds on gise
* Enable audio on porter
* Enable DU on porter

* tag 'renesas-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (68 commits)
  ARM: dts: silk: Enable SCIF_CLK frequency and pins
  ARM: dts: porter: Enable SCIF_CLK frequency and pins
  ARM: dts: marzen: Enable SCIF_CLK frequency and pins
  ARM: dts: lager: Enable SCIF_CLK frequency and pins
  ARM: dts: koelsch: Enable SCIF_CLK frequency and pins
  ARM: dts: gose: Enable SCIF_CLK frequency and pins
  ARM: dts: bockw: Enable SCIF_CLK frequency and pins
  ARM: dts: alt: Enable SCIF_CLK frequency and pins
  ARM: dts: r8a7794: Add BRG support for (H)SCIF
  ARM: dts: r8a7793: Add BRG support for SCIF
  ARM: dts: r8a7791: Add BRG support for (H)SCIF
  ARM: dts: r8a7790: Add BRG support for (H)SCIF
  ARM: dts: r8a7779: Add BRG support for SCIF
  ARM: dts: r8a7778: Add BRG support for SCIF
  ARM: dts: r8a7794: Rename the serial port clock to fck
  ARM: dts: r8a7793: Rename the serial port clock to fck
  ARM: dts: r8a7791: Rename the serial port clock to fck
  ARM: dts: r8a7790: Rename the serial port clock to fck
  ARM: dts: r8a7779: Rename the serial port clock to fck
  ARM: dts: r8a7778: Rename the serial port clock to fck
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 14:02:53 -08:00
Lars Persson
f68a4535a4 ARM: dts: artpec: add Artpec-6 development board dts
Signed-off-by: Lars Persson <larper@axis.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:56:55 -08:00
Lars Persson
f56454fa90 ARM: dts: artpeg: add Artpec-6 SoC dtsi file
Initial device tree for the Artpec-6 SoC.

Signed-off-by: Lars Persson <larper@axis.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:56:49 -08:00
Lars Persson
7ae0cf81b1 ARM: add device-tree SoC bindings for Axis Artpec-6
This adds device tree bindings for the Artpec-6 SoC.

Signed-off-by: Lars Persson <larper@axis.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:56:20 -08:00
Olof Johansson
d16073d385 Assorted bunch of 32bit Rockchip devicetree changes. More clocks,
nodes and fixes like the increased drive-strength on the firefly.
 Most interesting is maybe the enablement of the pl330 option
 for handling the broken flushp operation that is present on the
 current Rockchip SoCs. Together with the driver-side enablement
 this should give us working dma finally.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJWvGKWAAoJEPOmecmc0R2B2j4IAKSBKgak7uASVfvycAnJ/E7a
 jNjcz9s/SAWGAu+ES36rX23r1/u/UlkdDX0yS0vCFR4eHNn35uUrl3lQdqjFEDXZ
 f/c9gCrHsfvQQJPLGRzkhFIrQ6L/Anrgk5nq75+C4GvMFRDsDo5qqRnS0iP3wIZP
 VALc9PFqq9kJnnrdFymHVgc9ETCR+kTM9YGqDTzHYT2pHKxkBTAANx+Pr7/1Ib0b
 BM/he5i7/K+NVb9pjw6t8JbyT2JgST+UcNFeGn6jYylYdW4awFzFvJN0Q9pp989y
 7mjJe6Suh36tjp0kX0DnOvBCWYXB2i62cSsjFxsf8rZGjCbZ3YtXS15EWwXsxto=
 =wj5r
 -----END PGP SIGNATURE-----

Merge tag 'v4.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Assorted bunch of 32bit Rockchip devicetree changes. More clocks,
nodes and fixes like the increased drive-strength on the firefly.
Most interesting is maybe the enablement of the pl330 option
for handling the broken flushp operation that is present on the
current Rockchip SoCs. Together with the driver-side enablement
this should give us working dma finally.

* tag 'v4.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (30 commits)
  ARM: dts: cros-ec-keyboard: Add LOCK key to keyboard matrix
  ARM: dts: rockchip: replace gpio-key,wakeup with wakeup-source property
  ARM: dts: rockchip: add arm,pl330-broken-no-flushp quirk for rk3036 SoCs
  ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3xxx platform
  ARM: dts: rockchip: Add arm, pl330-broken-no-flushp quirk for rk3288 platform
  dt-bindings: rockchip-dw-mshc: add RK3036 dw-mshc description
  ARM: dts: rockchip: increase the mclk_fs to 512 for kylin board
  ARM: dts: rockchip: support the spi for rk3036
  ARM: dts: rockchip: add mclk for rt5616 on rk3036 kylin board
  ARM: dts: rockchip: add the leds control for rk3036-kylin board
  ARM: dts: rockchip: add tsadc node
  clk: rockchip: Add new id for rk3066 tsadc clock
  ARM: dts: rockchip: add clock-cells for usb phy nodes
  ARM: dts: rockchip: Assign RK3288 EDP_24M input centrally
  ARM: dts: rockchip: add soc-specific compatibles for rk3036 SoCs
  ARM: dts: rockchip: Bump sd card pin drive strength up on firefly boards
  dt-bindings: rockchip-dw-mshc: add RK3368 dw-mshc description
  ARM: dts: rockchip: Add the SDIO wifi on Radxa Rock2 square
  ARM: dts: rockchip: Add the iodomains for the Rock2 SOM
  ARM: dts: rockchip: add rk3288 mipi_dsi nodes
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:52:42 -08:00
Olof Johansson
4d66fb810a Highlights:
-----------
  - Add DMA controller node to stm32f429 MCU
  - Add pinctrl & gpio nodes to stm32f429 MCU
  - Remap stm32429-eval board SD-Ram to 0x0 for performance boost
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWvINRAAoJEMo4jShGhw+JVb4P/3d4IzEqBAtG/MPmFv/htev9
 jH98flRic0a1KWYhUcHjGYc4klALodof2aj3h6yWkm70dYNYonP99wBWrN/PieMi
 wMPwMBlBP++ufnsghnlbTqOHGXPxEgv7NMNvWukqD18MUkS1aLAqLo6CDtCRuEIH
 fTuhF+ONcrXEdYbjzx3G4lAm96DNWYCecfNCdnTn+XXE+q+M0eTSQYcVDZ4xkvBO
 qo89o1XexgXZhTySxbD9xIob82g3fnflwD7CG6EyKV3URAH3OF72JzwiFwt5hjXJ
 E6BT529LQ0krO4nkSVxhiwuTWn2eeIYoYfJph3ja+117EaDcPahMYQJ+/JT7+mx4
 4fe7Jxwj6KdHRQktJ8hVyZHqroqcFLy+EknuLXjgezVFn58H4m11lJ6WuQVrWjqK
 FuEqVxwNwmC96VXWo+fcimECV3r0QeduDwLqxDzEaFwvwbMzccb+t8F5Qo9TXvzz
 GT99Q4FJ2yVWDwukpZrk7z0wxfCYiyZNHCwiqaz8RsSgxTADBijTM0yUzkCNJftZ
 tBjAJqLHbrjc1IMTccoyYVoaN5/NPImrbglaxAvogTg3Kemi2QziWijniG1bBF1U
 0xW0zb2qFbQCvKwKnn5dBx5jjcUySJwnVvQFsV6veDrhZJP3J/4305tJPvB1z7fM
 +TUUTqOx4GjtHimlgc1U
 =j6TZ
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32 into next/dt

Highlights:
-----------
 - Add DMA controller node to stm32f429 MCU
 - Add pinctrl & gpio nodes to stm32f429 MCU
 - Remap stm32429-eval board SD-Ram to 0x0 for performance boost

* tag 'stm32-dt-for-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32:
  ARM: dts: stm32f429: Boost perfs by remapping SDRAM Bank 1 to 0x0
  ARM: dts: Add leds support to STM32F429 boards
  ARM: dts: Add USART1 pin config to STM32F429 boards
  ARM: dts: Add pinctrl node to STM32F429
  includes: dt-bindings: Add STM32F429 pinctrl DT bindings
  ARM: dts: Add STM32 DMA support for STM32F429 MCU

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:46:41 -08:00
Olof Johansson
7fa12181b0 Few updates for ARM VExpress/Juno platforms
1. GICv3 support on Foundation models
 
 2. Support for Juno R2 board
 
 3. Support for ARM HDLCD on all Juno platforms
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJWuxfzAAoJEABBurwxfuKYF3cP/0rJX1WsVPtJZthVoA0+elTp
 ruRl2vnzxnlrGG93dpWH3HKx4o56En9AIwKHacHkVKcfoSsC3YSTFS3KD34eweFy
 GYJQxtK+eEXZnR3zxbDpyaj2bo/VqFHULB1o8WXJWSs5IAhS4eKeWLoDe/38AsV7
 GXKjoL7Gxi3znS+fZObUwBKrLSUGEgEMJp4I0tX7T1GE0sCPg5aW+ApoHfD4HYC6
 LgKaRuKfaJNrjDETIQ2TqSUuwJobT/xoYjSGPr2cMthBfPUvACXu7+fBFwpfmHct
 EAmNnxBI6f3RuuDuxCFATIMfPPOrEslyFCYBcWhwOtl0r1Y6rq+J/P9AYB3xRqYG
 KzYN33Wo87wwn8y0TULXkRrs9s0WddtulgmH/IrSKby7w7U4sCGmMcNv37kjCRGJ
 oKsSKSAag3g7kBAJEFP4X7tMwG2tl4koUmWvyZO2ihsXt1tHUYQcBLzUdw1N/pNk
 hkQjOr1BRLgEYh451QdBDzcV+QBTgDe3DaG6WpI6RNFuGnKYsqaCyh5qiZGCbvD4
 7dGquR+EBakaEEKjzVIqTva77SB0ZwVAsNgPbgXK0ibqfGuWSQq58GqwWh4Nv0cf
 Xzfihicwsak6swohmn6n5/u3gywekOsoHd1OVrb24cfFHLXcqaLOz7Rs+sFZp93v
 bxHKj68IUAhzU+awmPB9
 =r0q6
 -----END PGP SIGNATURE-----

Merge tag 'vexpress-for-v4.6/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt

Few updates for ARM VExpress/Juno platforms

1. GICv3 support on Foundation models

2. Support for Juno R2 board

3. Support for ARM HDLCD on all Juno platforms

* tag 'vexpress-for-v4.6/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: Add HDLCD support on Juno platforms
  Documentation: drm: Add DT bindings for ARM HDLCD
  arm64: dts: Add support for Juno r2 board
  arm64: dts: move juno pcie-controller to base file
  arm64: dts: add .dts for GICv3 Foundation model
  arm64: dts: split Foundation model dts to put the GIC separately
  arm64: dts: Foundation model: increase GICC region to allow EOImode=1
  arm64: dts: prepare foundation-v8.dts to cope with GICv3

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:40:18 -08:00
Olof Johansson
9a9f182606 Merge branch 'lpc32xx/dt' of https://github.com/vzapolskiy/linux into next/dt
Merge DT changes for lpc32xx from Vladimir Zapolskiy:

"The changes add description of clock providers and clock consumers,
define default irq types of SoC controllers and add PHY3250 board
regulators.

I'm adding an official LPC32xx maintainer Roland to Cc, however he seems
to be unresponsive for a quite long time (since 2014)."

* 'lpc32xx/dt' of https://github.com/vzapolskiy/linux:
  arm: dts: phy3250: add SD fixed regulator
  arm: dts: phy3250: add lcd and backlight fixed regulators
  arm: dts: lpc32xx: assign interrupt types
  arm: dts: lpc32xx: remove clock frequency property from UART device nodes
  arm: dts: lpc32xx: add USB clock controller
  arm: dts: lpc32xx: add clock properties to device nodes
  arm: dts: lpc32xx: add clock controller device node
  arm: dts: lpc32xx: add device nodes for external oscillators
  dt-bindings: create arm/nxp folder and move LPC32xx SoC description to it

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 13:38:58 -08:00
Sudeep Holla
a6b1786897 ARM: dts: spear: replace gpio-key,wakeup with wakeup-source property
Keyboard driver for GPIO buttons(gpio-keys) checks for the legacy
"gpio-key,wakeup" boolean property to enable gpio buttons as wakeup
source.

Few dts files assign value "1" to gpio-key,wakeup which is incorrect.
Since the presence of the boolean property indicates it is enabled,
value of "0" or "1" have no significance.

This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property which inturn fixes the above mentioned issue.

Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 12:20:26 -08:00
Olof Johansson
53a7aa0b49 mvebu dt for 4.6 (part 1)
- Improve Armada 38x device tree (SATA and XHCI)
 - Fix SD Card and audio support for OpenRD board
 - Provide template for RS-232/485 configuration for the same board
 - Use a common dtsi file for linkstation boards
 - Add support for Buffalo Linkstation LS-QVL
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAla5uQgACgkQCwYYjhRyO9V6zQCeKOzw/m1ORr7JskrQjovaz4Ni
 AIoAoJ9+/Gqa4sS6J+ZggH2oQnN+aeww
 =wcTq
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-dt-4.6-1' of git://git.infradead.org/linux-mvebu into next/dt

mvebu dt for 4.6 (part 1)

- Improve Armada 38x device tree (SATA and XHCI)
- Fix SD Card and audio support for OpenRD board
- Provide template for RS-232/485 configuration for the same board
- Use a common dtsi file for linkstation boards
- Add support for Buffalo Linkstation LS-QVL

* tag 'mvebu-dt-4.6-1' of git://git.infradead.org/linux-mvebu:
  ARM: dts: kirkwood: add device tree for buffalo linkstation ls-qvl
  ARM: dts: kirkwood: fix audio for OpenRD clients
  ARM: dts: kirkwood: provide template for RS-232/485 configuration for OpenRD
  ARM: dts: kirkwood: split lswvl dts to linkstation lsvl and lswvl
  ARM: dts: kirkwood: split lswxl dts to linkstation lswsxl and lswxl
  ARM: dts: kirkwood: relicense dts of ls-wvl/vl and ls-wxl/wsxl under GPLv2/X11
  ARM: dts: kirkwood: fix SD slot default configuration for OpenRD
  ARM: dts: kirkwood: fix pin names for UART/SD selection for OpenRD
  ARM: dts: armada-370: Update the mpp63 function in the device tree on Armada 370
  ARM: dts: armada-38x: use usb-nop-xceiv PHY for the xhci nodes on Armada 388 GP
  ARM: dts: armada-38x: use regulator-boot-on for SATA regulators on Armada 388 GP
  ARM: dts: armada-38x: adjust board name and compatible for Armada 388 GP

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-24 12:18:36 -08:00
Ludovic Desroches
5e72c25b40 ARM: dts: at91: sama5d2 Xplained: enable the adc device
Enable the adc on the sama5d2 Xplained board.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-02-18 03:10:05 +01:00
Ludovic Desroches
aea14e1496 ARM: dts: at91: sama5d2: add adc device
Add the ADC device, and remove the adc_op_clk which is useless since the
adc sampling frequency is configured with sysfs.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-02-18 03:09:54 +01:00
Linus Walleij
1c6e288da6 ARM: versatile: move restart to the device tree
We have a power/reset driver for the Versatile family
in drivers/power/reset so let's just activate that driver
and use it and get rid of some non-DT remnants.

Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-15 09:58:08 +01:00
Linus Walleij
820617c251 ARM: realview: add the DS1338 RTC to PB1176 DT
This adds the Versatile I2C adapter and the Dallas DS1338
RTC on it to the PB1176 device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-11 15:52:46 +01:00
Linus Walleij
3bf0a4194f ARM: pb1176: add ethernet to devicetree
The PB1176 device tree was missing the SMSC9118 ethernet adapter,
so add it. Since this peripheral is not in either development
chip but on the board itself, it gets defined in the root node
of the device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-11 15:52:46 +01:00
Linus Walleij
cc9ab84cd9 ARM: pb1176: add ISP1761 USB OTG host controller
The USB host controller was missing from the device tree so add
it. This device is not inside either the development chip or the
FPGA but mounted on the board, so it ends up in the root node of
the device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-11 15:52:45 +01:00
Linus Walleij
efcf8963c6 ARM: pb1176: add AACI to the device tree
The device tree was missing the definition of the AACI
Advanced Audio Codec Interface, so add it. Tested on the hardware
and it works.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-11 15:52:45 +01:00
Linus Walleij
2d76ab2b61 ARM: pb1176: add ICST307 clocks to the device tree
This adds the five ICST307 clocks to the device tree, so we
can use these with e.g. CLCD.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-11 15:52:44 +01:00
Linus Walleij
1f138b1893 ARM: realview: fix up PB11MP flash compat strings
The two flash memories in the PB11MPCore have their VPP/WP
lines controlled from the system controller add-on in the MTD
subsystem. "arm,versatile-flash" is the first compatible string
to use to get the right support.

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-11 15:52:44 +01:00
Linus Walleij
5c3f5edbe0 ARM: realview: add flash devices to the PB1176 DTS
This adds the flash memories and ROM to the PB1175 DTS file.
The secure flash is marked as "disabled" by default so as to
protect the user from overwriting the boot monitor.

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-11 15:52:44 +01:00
Maxime Coquelin
b2aa7f7741 ARM: dts: stm32f429: Boost perfs by remapping SDRAM Bank 1 to 0x0
STM32F429 allows to remap FMC SDRAM Bank 1 from 0xc0000000 to 0x0,
by writing 0x4 to SYSCFG_MEMRMP register.

As mentionned in the reference manual (see chapter 9.3.1), the performance
gain is really interresting:
"In remap mode at address 0x0000 0000, the CPU can access the external
memory via ICode bus instead of System bus which boosts up the
performance."

These are the dhrystone results with and without the remap enabled:
Default (SDRAM in 0xc0000000):
---------------------------------
Microseconds for one run through Dhrystone:   31.8
Dhrystones per Second:                      31416.9

Remap (SDRAM in 0x0000000):
-----------------------------
Microseconds for one run through Dhrystone:   20.6
Dhrystones per Second:                      48520.1

This patch first change the SDRAM start address to 0x0 for STM32429i-EVAL
board, and also set the dma-range property as the other masters than the M4
CPU still see SDRAM in 0xc0000000.

Note that the Discovery board cannot benefit from this feature, since the
SDRAM is connected to Bank 2.

Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
2016-02-11 12:02:59 +01:00
Maxime Coquelin
b690172f72 ARM: dts: Add leds support to STM32F429 boards
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
2016-02-11 12:02:59 +01:00
Maxime Coquelin
521df6f56d ARM: dts: Add USART1 pin config to STM32F429 boards
This patch selects USART1 pin configuration on PA9/PA10 pins
for both Eval and Disco boards.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
2016-02-11 12:02:58 +01:00
Maxime Coquelin
2dbd0593e8 ARM: dts: Add pinctrl node to STM32F429
The STM32F429 MCU has 11 GPIO banks, with 16 pins per bank.

Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
2016-02-11 12:02:57 +01:00
Maxime Coquelin
c9eaeead95 includes: dt-bindings: Add STM32F429 pinctrl DT bindings
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
2016-02-11 12:02:46 +01:00
Vladimir Zapolskiy
d06670e962 arm: dts: phy3250: add SD fixed regulator
The change adds fixed voltage regulator for SD controller, ARM MMCI
controller driver uses it to control card power management.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:36 +02:00
Vladimir Zapolskiy
f6d4434916 arm: dts: phy3250: add lcd and backlight fixed regulators
Phytec PHY3250 board has GPIO controlled regulators for LCD and
backlight, add their descriptions to board DTS file.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:32 +02:00
Vladimir Zapolskiy
b715802f23 arm: dts: lpc32xx: assign interrupt types
LPC32xx interrupt controller has two cells, instead of zero
specify proper irq types for all consumers.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:27 +02:00
Vladimir Zapolskiy
c82e688a33 arm: dts: lpc32xx: remove clock frequency property from UART device nodes
If clock-frequency property is given, then it substitutes calculation
of supplying clock frequency from parent clock, this may break UART,
if parent clock is given and managed by common clock framework.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:21 +02:00
Vladimir Zapolskiy
865e90093a arm: dts: lpc32xx: add USB clock controller
The change adds device node of LPC32xx USB clock controller and adds
clock properties to USB OHCI, USB device and I2C controller to USB phy
device nodes.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:16 +02:00
Vladimir Zapolskiy
93898eb775 arm: dts: lpc32xx: add clock properties to device nodes
The change adds clock properties to all described peripheral devices,
clock ids are taken from dt-bindings/clock/lpc32xx-clock.h

Some existing drivers expect to get clock names, in those cases
clock-names are added as well.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:11 +02:00
Vladimir Zapolskiy
fe86131f9e arm: dts: lpc32xx: add clock controller device node
NXP LPC32xx SoC has a clocking and power control unit (CPC) as a part
of system control block (SCB). CPC is supplied by two external
oscillators and it manages core and most of peripheral clocks, the
change adds SCB and CPC descriptions to shared LPC32xx dtsi file.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:06:05 +02:00
Vladimir Zapolskiy
ef5f885ec9 arm: dts: lpc32xx: add device nodes for external oscillators
NXP LPC32xx SoC has two external oscillators - one is mandatory and
always on 32768 Hz oscillator and one optional 10-20MHz oscillator,
which is practically always present on LPC32xx boards, because its
presence is needed to supply USB controller clock and by default it
supplies ARM and most of the peripheral clocks, LPC32xx User's Manual
references it as a main oscillator.

The change adds device nodes for both oscillators, frequency of
the main oscillator is selected to be 13MHz by default, this variant
is found on all LPC32xx reference boards.

The device nodes for external oscillators are needed to describe input
clocks of LPC32xx clock controller.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:05:59 +02:00
Vladimir Zapolskiy
ad94bd4774 dt-bindings: create arm/nxp folder and move LPC32xx SoC description to it
Create a separate folder for device tree bindings of NXP SoCs devices,
and move lpc32xx.txt to it.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2016-02-11 03:05:54 +02:00
James Chao
741d3b0c1f ARM: dts: cros-ec-keyboard: Add LOCK key to keyboard matrix
The LOCK key is at KSO9/KSI3 for Chromebook Flip and other devices
that use the Chrome OS EC keyboard matrix.

Signed-off-by: James Chao <james_chao@asus.com>
Signed-off-by: YH Huang <yh.huang@mediatek.com>
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-10 22:41:53 +01:00
Liviu Dudau
9fd9288ed0 arm64: dts: Add HDLCD support on Juno platforms
ARM's Juno platforms have two HDLCD controllers, each linked to an NXP
TDA19988 HDMI transmitter that provides output encoding. Add them
to the device tree.

Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
2016-02-10 10:58:33 +00:00
Liviu Dudau
a6356f9302 Documentation: drm: Add DT bindings for ARM HDLCD
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
2016-02-10 10:58:33 +00:00
Sudeep Holla
4f66f247f7 ARM: dts: rockchip: replace gpio-key,wakeup with wakeup-source property
Keyboard driver for GPIO buttons(gpio-keys) checks for the legacy
"gpio-key,wakeup" boolean property to enable gpio buttons as wakeup
source.

Few dts files assign value "1" to gpio-key,wakeup and in one instance a
value "0" is assigned probably assuming it won't be enabled as a wakeup
source. Since the presence of the boolean property indicates it is
enabled, value of "0" have no value.

This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property which inturn fixes the above mentioned issue.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-10 00:19:41 +01:00
Geert Uytterhoeven
c3373b09ba ARM: dts: silk: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:28 +01:00
Geert Uytterhoeven
19417bd9c5 ARM: dts: porter: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:28 +01:00
Geert Uytterhoeven
e50b5ac88d ARM: dts: marzen: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:27 +01:00
Geert Uytterhoeven
1781460c9a ARM: dts: lager: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:26 +01:00
Geert Uytterhoeven
338f7ebf46 ARM: dts: koelsch: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates:
  - SCIF:
      - Supports now 50, 75, 110, 1152000, 1500000, 2000000, and
        4000000 bps,
      - Perfect match for standard 50-460800, and 9216000 bps.
      - More accurate 576000 bps.
  - HSCIF:
      - Supports now 50, 75, 110, 134, 150, and 200 bps,
      - Perfect match for standard 50-460800, and 9216000 bps.
      - More accurate 576000, 1152000, 3000000, 3500000, and 4000000
	bps.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:26 +01:00
Geert Uytterhoeven
81a81ba941 ARM: dts: gose: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:25 +01:00
Geert Uytterhoeven
33ef9688ae ARM: dts: bockw: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:25 +01:00
Geert Uytterhoeven
8a758a9493 ARM: dts: alt: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09 19:43:24 +01:00