Commit Graph

41769 Commits

Author SHA1 Message Date
Masami Hiramatsu
e859cf8656 x86: Fix comments of register/stack access functions
Fix typos and some redundant comments of register/stack access
functions in asm/ptrace.h.

Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com>
Cc: systemtap <systemtap@sources.redhat.com>
Cc: DLE <dle-develop@lists.sourceforge.net>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Roland McGrath <roland@redhat.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Wenji Huang <wenji.huang@oracle.com>
Cc: Mahesh J Salgaonkar <mahesh@linux.vnet.ibm.com>
LKML-Reference: <20091201000222.7669.7477.stgit@harusame>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Suggested-by: Wenji Huang <wenji.huang@oracle.com>
2009-12-02 10:22:22 +01:00
Suresh Siddha
6d20792e85 x86: Remove unnecessary mdelay() from cpu_disable_common()
fixup_irqs() already has a mdelay(). Remove the extra and
unnecessary mdelay() from cpu_disable_common().

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: ebiederm@xmission.com
Cc: garyhade@us.ibm.com
LKML-Reference: <20091201233335.232177348@sbs-t61.sc.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-12-02 10:11:02 +01:00
Suresh Siddha
1c83995b6c x86, ioapic: Document another case when level irq is seen as an edge
In the case when cpu goes offline, fixup_irqs() will forward any
unhandled interrupt on the offlined cpu to the new cpu
destination that is handling the corresponding interrupt. This
interrupt forwarding is done via IPI's. Hence, in this case also
level-triggered io-apic interrupt will be seen as an edge
interrupt in the cpu's APIC IRR.

Document this scenario in the code which handles this case by doing
an explicit EOI to the io-apic to clear remote IRR of the io-apic RTE.

Requested-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: ebiederm@xmission.com
Cc: garyhade@us.ibm.com
LKML-Reference: <20091201233335.143970505@sbs-t61.sc.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-12-02 10:11:01 +01:00
Suresh Siddha
c29d9db338 x86, ioapic: Fix the EOI register detection mechanism
Maciej W. Rozycki reported:

> 82093AA I/O APIC has its version set to 0x11 and it
> does not support the EOI register.  Similarly I/O APICs
> integrated into the 82379AB south bridge and the 82374EB/SB
> EISA component.

IO-APIC versions below 0x20 don't support EOI register.

Some of the Intel ICH Specs (ICH2 to ICH5) documents the io-apic
version as 0x2. This is an error with documentation and these
ICH chips use io-apic's of version 0x20 and indeed has a working
EOI register for the io-apic.

Fix the EOI register detection mechanism to check for version
0x20 and beyond.

And also, a platform can potentially  have io-apic's with
different versions. Make the EOI register check per io-apic.

Reported-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: ebiederm@xmission.com
Cc: garyhade@us.ibm.com
LKML-Reference: <20091201233335.065361533@sbs-t61.sc.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-12-02 10:11:01 +01:00
Maciej W. Rozycki
ca64c47cec x86, io-apic: Move the effort of clearing remoteIRR explicitly before migrating the irq
When the level-triggered interrupt is seen as an edge interrupt,
we try to clear the remoteIRR explicitly (using either an
io-apic eoi register when present or through the idea of
changing trigger mode of the io-apic RTE to edge and then back
to level). But this explicit try also needs to happen before we
try to migrate the irq. Otherwise irq migration attempt will
fail anyhow, as it postpones the irq migration to a later
attempt when it sees the remoteIRR in the io-apic RTE still set.

Signed-off-by: "Maciej W. Rozycki" <macro@linux-mips.org>
Reviewed-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: ebiederm@xmission.com
Cc: garyhade@us.ibm.com
LKML-Reference: <20091201233334.975416130@sbs-t61.sc.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-12-02 10:11:00 +01:00
Frederic Weisbecker
1cedae7290 hw-breakpoints: Keep track of user disabled breakpoints
When we disable a breakpoint through dr7, we unregister it right
away, making us lose track of its corresponding address
register value.

It means that the following sequence would be unsupported:

 - set address in dr0
 - enable it through dr7
 - disable it through dr7
 - enable it through dr7

because we lost the address register value when we disabled the
breakpoint.

Don't unregister the disabled breakpoints but rather disable
them.

Reported-by: "K.Prasad" <prasad@linux.vnet.ibm.com>
Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
LKML-Reference: <1259735536-9236-1-git-send-regression-fweisbec@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-12-02 09:59:03 +01:00
David S. Miller
ff9c38bba3 Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
	net/mac80211/ht.c
2009-12-01 22:13:38 -08:00
Arnaldo Carvalho de Melo
5a5b6f6f62 MIPS: Wire up recvmmsg syscall
Reported-by: Jean-Mickael Guerin <jean-mickael.guerin@6wind.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-12-01 16:15:49 -08:00
wanzongshun
045868df2c ARM: 5844/1: rename w90p910_defconfig to n uc910_defconfig
rename w90p910_defconfig

Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-01 23:08:31 +00:00
wanzongshun
39986ca6bd ARM: 5842/1: add spi resource support for nuc900
add spi resource support

Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-01 23:08:31 +00:00
wanzongshun
6aeb4e4a9d ARM: 5839/1: add nuc960_defconfig
add nuc960_defconfig

Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-01 23:08:30 +00:00
wanzongshun
9b5b495281 ARM: 5838/1: add nuc950_defconfig
add nuc950_defconfig

Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-01 23:08:30 +00:00
Benjamin Herrenschmidt
5a7b4193e5 Revert "powerpc/mm: Fix bug in pagetable cache cleanup with CONFIG_PPC_SUBPAGE_PROT"
This reverts commit c045256d14.

It breaks build when CONFIG_PPC_SUBPAGE_PROT is not set. I will
commit a fixed version separately

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-12-02 09:28:35 +11:00
Russell King
d7931d9f7a Merge branch 'for-rmk' of git://git.marvell.com/orion into devel-stable 2009-12-01 18:22:54 +00:00
Russell King
421fe93cc4 ARM: ZERO_PAGE: Avoid flush_dcache_page() for zero page
The zero page is read-only, and has its cache state cleared during
boot.  No further maintanence for this page is required.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-01 18:20:07 +00:00
Russell King
b7dc0b2cfc ARM: Avoid evaluating page_address() multiple times
page_address() is a function call rather than a macro, and so:

	if (page_address(page))
		do_something(page_address(page));

results in two calls to this function.  This is unnecessary; remove
the duplication.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-01 18:20:07 +00:00
Russell King
2f0b192633 ARM: Avoid duplicated implementation for VIVT cache flushing
We had two copies of the wrapper code for VIVT cache flushing - one in
asm/cacheflush.h and one in arch/arm/mm/flush.c.  Reduce this down to
one common copy.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-01 18:20:07 +00:00
Linus Torvalds
0d9ccfe1b5 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  MIPS: Loongson: Switch from flatmem to sparsemem
  MIPS: Loongson: Disallow 4kB pages
  MIPS: Add missing definition for MADV_HWPOISON.
  MIPS: Fix build error if __xchg() is not getting inlined.
  MIPS: IP22/IP28 Disable early printk to fix boot problems on some systems.
2009-12-01 08:26:44 -08:00
Wu Zhangjin
f133f22dd6 MIPS: Loongson: Switch from flatmem to sparsemem
With flatmem hibernation for Loongson will fail, and there are also some
other problems such as broken files when using NFS or CIFS / Samba.

The config help of sparsemem says:

"This option provides some potential performance benefits, along with
decreased code complexity."

So to avoid the potential problems of FLATMEM, we disable FLATMEM directly
and use SPARSEMEM instead.

Related email thread:

http://groups.google.com/group/loongson-dev/browse_thread/thread/b6b65890ec2b0f24/feb43e5aa7f55d9b?show_docid=feb43e5aa7f55d9b

Reported-by: Tatu Kilappa <tatu.kilappa@gmail.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/737/
Cc: linux-mips@linux-mips.org
Cc: zhangfx@lemote.com
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-01 16:21:26 +00:00
Wu Zhangjin
315fe625f8 MIPS: Loongson: Disallow 4kB pages
Currently, with PAGE_SIZE_4KB, the kernel for loongson will hang on:

Kernel panic - not syncing: Attempted to kill init!

The possible reason is the cache aliases problem:

Loongson 2F has 64kb, 4 way L1 Cache, the way size is 16kb, which is bigger
then 4kb. so, If using 4kb page size, there is cache aliases problem.
To avoid this kind of problem, extra cache flushing.  The 2nd possible
solution is 16kb page size which avoids cache aliases without the need for
extra cache flushes.  So we disable 4kB pages until the aliasing issue is
solved.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/736/
Cc: linux-mips@linux-mips.org
Cc: zhangfx@lemote.com
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-01 16:21:26 +00:00
Ralf Baechle
e1eb3a983b MIPS: Add missing definition for MADV_HWPOISON.
Thanks to Joseph S. Myers for reporting this.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: "Joseph S. Myers" <joseph@codesourcery.com>
Patchwork: http://patchwork.linux-mips.org/patch/723/
2009-12-01 16:21:25 +00:00
Ralf Baechle
c677189af9 MIPS: Fix build error if __xchg() is not getting inlined.
If __xchg() is not getting inlined the outline version of the function
will have a reference to __xchg_called_with_bad_pointer() which does not
exist remaining.  Fixed by using BUILD_BUG_ON() to check for allowable
operand sizes.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/705/
2009-12-01 16:21:25 +00:00
Martin Michlmayr
2b5e63f6b8 MIPS: IP22/IP28 Disable early printk to fix boot problems on some systems.
Some Debian users have reported that the kernel hangs early during boot on
some IP22 systems.  Thomas Bogendoerfer found that this is due to a "bad
interaction between CONFIG_EARLY_PRINTK and overwritten prom memory during
early boot".  Since there's no fix yet, disable CONFIG_EARLY_PRINTK for now.

Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Cc: linux-mips@linux-mips.org
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/702/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-01 16:21:25 +00:00
Linus Torvalds
df87f8c06c Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mattst88/alpha-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mattst88/alpha-2.6:
  alpha: Fixup last users of irq_chip->typename
  Alpha: Rearrange thread info flags fixing two regressions
  arch/alpha/kernel: Add kmalloc NULL tests
  arch/alpha/kernel/sys_ruffian.c: Use DIV_ROUND_CLOSEST
2009-12-01 07:36:23 -08:00
Takashi Iwai
b00615d163 Merge branch 'topic/pcm-dma-fix' into topic/core-change 2009-12-01 15:58:15 +01:00
Takashi Iwai
75639e7ee1 Merge branch 'topic/beep-rename' into topic/core-change 2009-12-01 15:58:10 +01:00
Srinidhi Kasagar
71abe6f5ce ARM: 5835/1: ARM U8500: add defconfig
Add defconfig file for mop500 board

Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-12-01 12:43:52 +00:00
Herbert Xu
8386324381 Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 2009-12-01 15:16:22 +08:00
H. Peter Anvin
ccef086454 x86, mm: Correct the implementation of is_untracked_pat_range()
The semantics the PAT code expect of is_untracked_pat_range() is "is
this range completely contained inside the untracked region."  This
means that checkin 8a27138924 was
technically wrong, because the implementation needlessly confusing.

The sane interface is for it to take a semiclosed range like just
about everything else (as evidenced by the sheer number of "- 1"'s
removed by that patch) so change the actual implementation to match.

Reported-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jack Steiner <steiner@sgi.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
LKML-Reference: <20091119202341.GA4420@sgi.com>
2009-11-30 21:33:51 -08:00
Thomas Gleixner
8ab1221c20 alpha: Fixup last users of irq_chip->typename
The typename member of struct irq_chip was kept for migration purposes
and is obsolete since more than 2 years. Fix up the leftovers.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Richard Henderson <rth@twiddle.net>
Cc: linux-alpha@vger.kernel.org
Signed-off-by: Matt Turner <mattst88@gmail.com>
2009-11-30 22:51:31 -05:00
Michael Cree
745dd2405e Alpha: Rearrange thread info flags fixing two regressions
The removal of the TIF_NOTIFY_RESUME flag, commit a583f1b542
"remove unused TIF_NOTIFY_RESUME flag," resulted in incorrect
setting of the unaligned access control flags by the prctl syscall.

The re-addition of the TIF_NOTIFY_RESUME flag, commit d0420c83f3
"KEYS: Extend TIF_NOTIFY_RESUME to (almost) all architectures [try #6]"
further caused problems, namely incorrect operands to assembler code
as evidenced by:

AS      arch/alpha/kernel/entry.o
arch/alpha/kernel/entry.S: Assembler messages:
arch/alpha/kernel/entry.S:326: Warning: operand out of range
(0x0000000000000406 is not between 0x0000000000000000 and
0x00000000000000ff)

Both regressions fixed by (1) rearranging TIF_NOTIFY_RESUME flag to be
in lower 8 bits of the thread info flags, and (2) making sure that
ALPHA_UAC_SHIFT matches the rearrangement of the thread info flags.

Signed-off-by: Michael Cree <mcree@orcon.net.nz>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: David Howells <dhowells@redhat.com>,
Signed-off-by: Matt Turner <mattst88@gmail.com>
2009-11-30 22:44:40 -05:00
Maurus Cuelenaere
92b118f696 ARM: S3C64XX: add HSMMC2 support
This adds support for the third SDHCI controller.

Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:41 +00:00
Maurus Cuelenaere
6a88e9838f ARM: S3C64XX: add support for all group 0 external interrupts
Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:40 +00:00
Maurus Cuelenaere
23196a42a6 ARM: S3C64XX: fix USB OTG compilation
This adds the S3C_VA_USB_HSPHY mapping.

Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:39 +00:00
Mark Brown
e9c08f0d57 ARM: S3C64XX: Redo voltage ranges for cpufreq
The documentation for the S3C6410 CPU voltage scaling is rather
unclear, with omitted values for several speed settings. Originally
the code was using only quoted values, resulting in some fairly odd
settings. The S3C6410 is also unusual in that the both the maximum
and minimum voltages quoted scale as the frequency rises, rather
than just the minimum voltage.

Clean this up a bit by always using the specified typical settings
as the minimum voltage (ignoring any specified minimum voltage) in
order to avoid running near the edge of the processor capabilities.
Also use the next quoted maximum voltages rather than the typical
voltages where no maximum voltage is quoted, allowing operation on
a greater range of systems.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:39 +00:00
Mark Brown
43f1069ef9 ARM: S3C64XX: Separate out regulator and frequency latencies
Currently the transition latency reported by the S3C64xx cpufreq
driver includes both the time for the CPU to reclock itself and
the time for a regulator to change voltage. This means that if
a regulator is not in use then the transition latency reported
is excessively high.

In future the regulator API will be extended to report latencies
so the driver will be able to query the performance of a given
regulator.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:38 +00:00
Mark Brown
383af9c258 ARM: S3C64XX: Provide logging when CPU frequencies are eliminated due to clocks
This provides symmetry with the voltage based checks done for the
regulator.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:38 +00:00
Mark Brown
42015c133b ARM: SMDK6410: Hook up regulator supplies for WM8580
DVDD is supplied by supplies derived from the PMIC, AVDD and PVDD are
supplied from the main wall supply on the base board which runs at
5V. No option is currently supported for running without a PMIC card,
the assumption is that the regulator API will be built out when no
soft PMIC card is in use.

To ease merge issues since this uses the newly added dev_name supply
configuration from the regulator API (currently in -next only) the
fixed voltage regulator is ifdefed out when the regulator API is not
enabled.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:37 +00:00
arnaud.patard@rtp-net.org
1a71e4ade1 ARM: H1940: Convert h1940 bluetooth driver to rfkill
Better using standard interfaces to enable/disable bluetooth

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:06 +00:00
arnaud.patard@rtp-net.org
22e649ff2e ARM: H1940: add lcd/backlight device definition
Add lcd and backlight device definition. The pwm backlight stuff does
not allow to really set maximum pwm as with my custom driver but it's
better to use standard driver instead of out of tree driver.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
[ben-linux@fluff.org: tidy header]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:05 +00:00
arnaud.patard@rtp-net.org
13733d524d ARM: H1940: enable rtc
Enable S3C2410 rtc on h1940

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
[ben-linux@fluff.org: tidy header]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:05 +00:00
arnaud.patard@rtp-net.org
3909b9f7a3 ARM: H1940: add mmc device
Add mmc host support to h1940

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
[ben-linux@fluff.org: tidy description]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:35:04 +00:00
Ben Dooks
7bcb7eda99 ARM: N30: Use s3c_i2c0_set_platdata() to set I2C platform data
Fix mach-n30.c to use the s3c_i2c0_set_platdata() call to register the
platform data with the system to get rid of any reliance on having a real
device structure available in memory.

Since s3c_i2c0_set_platdata() copies the data, mark the original as
__initdata so it is thrown away.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:34:17 +00:00
Ben Dooks
372359eca4 ARM: AT2440EVB: Remove duplicated s3c_device_sdi.name set
The AT2440EVB should not be changing the s3c_device_sdi.name as this is
part of the initialisation process done by the CPU detection process
and actually present in arch/arm/plat-s3c24xx/s3c24xx.c.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:34:17 +00:00
Ben Dooks
2a3a18045b ARM: S3C: Add NAND device platform data set call 2009-12-01 01:34:16 +00:00
Ben Dooks
ff34aaa953 ARM: H1940: Correct name of the local platform devices for LED and Bluetooth
The mach-h1940.c file was using s3c_device_ where it really should be
calling these local definitions h1940_device to ensure they are not
mistaken for real s3c_devices when the device change is done.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:34:16 +00:00
Ben Dooks
ccae941ee2 ARM: S3C: Update Simtec copyright statements from , to - [2]
There are a number of statements of the form A, B or A, B, C where
the numbers A,B,C are not consecutive. However, referencing [1] it
is the correct thing to replace these with A-B or A-C as apropriate.

[1] http://www.copyrightservice.co.uk/copyright/p03_copyright_notices
    section 4iii 'Year of publication'

Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Simtec Linux Team <linux@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:51 +00:00
Ben Dooks
e02f866456 ARM: S3C: Update Simtec copyright statements from , to -
There are a number of statements of the form A, B or A, B, C where
the numbers A,B,C are consecutive. Tidy these up to be A-B or A-C
as appropriate and to comply better with copyright standards [1]

[1] http://www.copyrightservice.co.uk/copyright/p03_copyright_notices
    section 4iii 'Year of publication'

Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Simtec Linux Team <linux@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:51 +00:00
Ben Dooks
50f430e3ad ARM: S3C: Fix Simtec copyright statements in Documentation/S3C24XX
The (c) alone is not a sufficient copyright statement, nor is it a
good replacement for the proper encircled &copy; symbol [1]. Add the
word copyright to the apropriate places and remove the (c) symbol.

[1] http://www.copyrightservice.co.uk/copyright/p03_copyright_notices
    section 4 'What does a notice consist of?'

Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Simtec Linux Team <linux@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:50 +00:00
Ben Dooks
95eb56965c ARM: S3C24XX: Add documentation for arch/arm/plat-s3c24xx/include/plat/mci.h
Add documentation for the platform data structure in the SD/MMC driver
header file arch/arm/plat-s3c24xx/include/plat/mci.h.

Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Simtec Linux Team <linux@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:49 +00:00
Ben Dooks
4fa084af28 ARM: OSIRIS: DVS (Dynamic Voltage Scaling) supoort.
Add a driver to provide DVS for the Simtec Osiris module to reduce
the power consumption whilst idling.

The DVS driver alters the voltage supplied to the ARM core depending
on the frequency it is running at. The driver itself does not do any
of the frequency alteration, which is left up to the cpufreq driver.

Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Simtec Linux Team <linux@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:49 +00:00
Ben Dooks
4d3a3469db ARM: S3C24XX: machine support for Simtec Audio
Add the platform/machine support for the audio devices fitted to
the Simtec range of boards since the move to ASoC.

Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Simtec Linux Team <linux@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:48 +00:00
Kyungmin Park
0c31862880 SMDKC100: add SDHCI controllers 0, 1 and 2 support
Add required machine definitions for SDHCI controller 0, 1 and 2. SMDKC100
has 2 SDHCI/MMC ports. Port 1 is directly connected to controller 0. Port
1 can be conntected to controler 1 or 2, depending on jumper setup.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:18 +00:00
Kyungmin Park
86cd4f5f83 ARM: S5PC1xx: add platform helpers for SDHCI host controllers
Samsung S5PC100 has 3 SDHCI controllers compatible with the one known from
previous SoCs series. Add required platform setup and support code that
the devices can be used with sdhci-s3c driver.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:17 +00:00
Kyungmin Park
067f131d09 SMDKC100: add I2C0 and I2C1 buses support
Add required machine definitions for I2C 0 and 1 bus controllers.
Currently no I2C device are defined yet.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:17 +00:00
Kyungmin Park
5eda288fa9 ARM: S5PC1xx: add platform helpers for i2c adapter devices
Samsung S5PC100 has I2C bus controller compatible with the one known from
previous SoCs series. Add required platform setup and support code that
it can be used with s3c2410-i2c driver.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:16 +00:00
Kyungmin Park
079b032417 SMDKC100: enable S3C FrameBuffer
Add required machine definitions for s3c-fb device.
A 800x480 lcd device (simmilar to the one known from SMDK6410 boards) has
been defined. The lcd controller is attached to GPIO lines and can be
enabled/disabled with platform-lcd driver.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:16 +00:00
Pawel Osciak
edd6e3f89d ARM: S5PC1xx: add platform helpers for s3c-fb device
Samsung S5PC100 has LCD-controller compatible with the one known from
previous SoCs series. Add required platform setup and support code that
it can be used with s3c-fb driver.

Signed-off-by: Pawel Osciak <p.osciak@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:16 +00:00
Pawel Osciak
d7ab33a0b3 ARM: S3C: Prepare s3c64xx-specific s3c-fb register definition for reuse
S5PC1xx Samsung SOC series has very similar frame buffer hardware, so a lot
of the code can be shared. Moved s3c64xx-specific s3c-fb register
definitions from mach-s3c6400 to common platform directory as regs-fb-v4.h.
The new v4 file will be common for S3C6400, S3C6410, S5PC100 and possibly
others. Some s3c64xx series specific defines (palette handling) were left
in s3c-6400/mach/regs-fb.h, because it is handled differently in S5PC1xx
series.

Signed-off-by: Pawel Osciak <p.osciak@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:15 +00:00
Kyungmin Park
c3fcf5d1a4 ARM: S5PC1XX: add cpu idle and system reset support
Add CPU idle support by a call to SoC build-in power management core.
Add system reset support by a simple write to system controll register.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:15 +00:00
Kyungmin Park
b0d5217cfb ARM: S5PC1xx: add gpiolib and external/gpio interrupt support
Add support for gpiolib calls. This is based on the gpiolib implementation
from plat-s3c64xx tree.
Add support for external interrupts for GPIO H banks.
Add support for GPIO interrupts for all banks.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:14 +00:00
Kyungmin Park
d7b9ace51d ARM: S5PC1XX: GPIO registers rename
S5PC100 and S5PC110 GPIO registers differs in many places, rename all
previously defined registers to be S5PC100 specific.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:13 +00:00
Kyungmin Park
91e7d96e1f ARM: S5PC1XX: add GPIO L banks to register definition
Add GPIO L0-L4 banks to register definition.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:13 +00:00
Kyungmin Park
ff916f25b2 ARM: S5PC1XX: clocks reimplementation
Clocks hierarchy has been completely reimplemented to match the S5PC100
specification.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:13 +00:00
Kyungmin Park
9ebaf2f4e7 ARM: S5PC1XX: clock registers rename
S5PC100 and S5PC110 clock registers differs in many places, rename all
previously defined registers to be S5PC100 specific. Remove all power
management registers. They will be added later to a separate file.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:12 +00:00
Kyungmin Park
b0cc3031ff ARM: S5PC1XX: registers rename
S5PC110 and S5PC100 register maps differs in many places, rename all
defined registers to be S5PC100 specific. PA_SYS register known from
S3C64XX series has been renamed to more adequate PA_CLK. Also system map
has been also updated to cover more integrated peripherals.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:33:12 +00:00
Ben Dooks
cf38367824 ARM: SAMSUNG: Add plat-samsung as starting point for plat-s3c* moves
We inted to re-organise the plat-s3c/plat-s3c24xx/plat-s3c64xx into a
more generic plat-samsung with less code in the other plat- directories
to make it easier to port new devices and try and clear up some of the
naming issues with newer devices.

Start by creating a small arch/arm/plat-samsung with no actuall code in
so we can move items in as we process them.

Add this to arch/arm to allow it to build things once support is added.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-12-01 01:28:37 +00:00
Dmitry Artamonow
19d6c13b56 [ARM] pxa/hx4700: actually use platform_lcd driver
Commit e2c509c7e6 ([ARM] pxa/hx4700: use platform_lcd driver)
missed to actually register platform device for LCD.
It causes following GCC warning:
arch/arm/mach-pxa/hx4700.c:553: warning: 'hx4700_lcd' defined but not used

Signed-off-by: Dmitry Artamonow <mad_soft@inbox.ru>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:15 +08:00
Antonio Ospite
0e85190755 [ARM] pxa/pcm990: don't use pxa_camera init() callback
pxa_camera init() is ambiguous, it's better to configure PXA CIF pins
statically in machine init function.

Signed-off-by: Antonio Ospite <ospite@studenti.unina.it>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:14 +08:00
Antonio Ospite
a7f2bdb39e [ARM] pxa/em-x270: don't use pxa_camera init() callback
pxa_camera init() is ambiguous, it's better to statically configure the sensor.

Signed-off-by: Antonio Ospite <ospite@studenti.unina.it>
Acked-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:14 +08:00
Igor Grinberg
db205463fd [ARM] pxa/cm-x300: add PWM backlight support
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:13 +08:00
Igor Grinberg
5fa46fca1c [ARM] pxa/cm-x300: update defconfig
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:12 +08:00
Igor Grinberg
14fd9e0053 [ARM] pxa/cm-x300: update authors and copyright
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:11 +08:00
Igor Grinberg
9c017ca1a0 [ARM] pxa/cm-x300: add da9030 support
Register DA9030 PMIC. Use only backlight sub-device for now.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:10 +08:00
Igor Grinberg
edaa64c906 [ARM] pxa/cm-x300: enable USB port 2 for PXA300
Port 2 requires setting of UP2OCR register to function as USB host.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:09 +08:00
Igor Grinberg
def8252ddb [ARM] pxa/cm-x300: add support for PXA310 cpu
CM-X300 can be assembled with PXA300 and PXA310 CPU. Provide support for
both CPU variants.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:09 +08:00
Igor Grinberg
b3d01da66d [ARM] pxa/cm-x300: add Wi2Wi chip (Bluetooth and WiFi) initialization
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:08 +08:00
Igor Grinberg
74e74defd6 [ARM] pxa/cm-x300: add ac97 controller registration
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:07 +08:00
Igor Grinberg
83e560eee1 [ARM] pxa/cm-x300: add TDO35S lcd support
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:06 +08:00
Igor Grinberg
55052ea23d [ARM] pxa/cm-x300: add revision difference handling
Different revisions of CM-X300 use different pins for several functions.
Make the kernel aware of it.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:05 +08:00
Marc Zyngier
3fe6ccffcb [ARM] pxa/viper: convert to use plat_serial8250_port irqflags field
Use .irqflags in the plat_serial8250_port structure to set IRQ
polarity, and get rid of the corresponding set_irq_type().

Signed-off-by: Marc Zyngier <maz@misterjones.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:04 +08:00
Antonio Ospite
2fd8e55e13 [ARM] pxa/ezx: update ezx_defconfig now that ezx-pcap is in
Signed-off-by: Antonio Ospite <ospite@studenti.unina.it>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:03 +08:00
Antonio Ospite
87303b8a9e [ARM] pxa/ezx: add leds-lp3944 support for A910 EZX phone
Signed-off-by: Antonio Ospite <ospite@studenti.unina.it>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:03 +08:00
Antonio Ospite
405ac4015a [ARM] pxa/ezx: add camera support for A780 and A910 EZX phones
Signed-off-by: Bart Visscher <bartv@thisnet.nl>
Signed-off-by: Antonio Ospite <ospite@studenti.unina.it>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:02 +08:00
Pavel Machek
0ba01ebcb3 [ARM] pxa/zaurus: rename spitz_battery_levels_* to sharpsl_*
Battery power levels are shared between spitz and corgi, rename
variable to reflect it.

Signed-off-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:01 +08:00
Pavel Machek
b64b0b76cd [ARM] pxa/zaurus: cleanup sharpsl_pm.c
This fixes checkpatch/style problems in sharpsl_pm.c, allowing me to
submit real fixes next.

Signed-off-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:03:00 +08:00
Haojian Zhuang
61333c6300 [ARM] pxa: rename macro from pxa9xx to pxa93x
Because original macro can only judge whether current CPU is pxa93x,
rename the macro to correct name.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:59 +08:00
Mike Rapoport
bf293aec15 [ARM] pxa: add EXT_WAKEUP interrupts handling for pxa3xx
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:58 +08:00
Eric Miao
15cc7112ab [ARM] pxa: make CPU_PXA* to be selectable hidden options
CONFIG_CPU_PXA{300,310,320,930,935,950} are really platform dependent
and should be made into selectable hidden options.

Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:57 +08:00
Eric Miao
9035a9ece9 [ARM] pxa: select CPU_PXA310 for MACH_COLIBRI300
MACH_COLIBRI300 is supposed to support both PXA300 and PXA310, select
the missing CPU_PXA310.

Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Acked-by: Daniel Mack <daniel@caiaq.de>
2009-12-01 09:02:57 +08:00
Eric Miao
1493df7319 [ARM] pxa: introduce CONFIG_MACH_ZYLONITE{300,320} for CPU_PXA* removing
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:56 +08:00
Russell King
cc155c6f2c [ARM] pxa: allow platforms to control which uarts are registered
For some platforms, it is inappropriate to register all PXA UARTs.
In some cases, the UARTs may not be used, and in others we may want
to avoid registering the UARTs to allow other drivers (eg, FICP) to
make use of the UART.

In addition, a while back there was a request to be able to pass
platform data to the UART driver.

This patch enables all of this by providing functions platforms can
call to register each individual UART.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:55 +08:00
Igor Grinberg
7c6ccbf0dd [ARM] pxa: add U2D registers and bits definitions
This should be eventually moved to somewhere closer to the U2D driver,
but is kept here atm so it's easier for USB configuration code to work.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:54 +08:00
Igor Grinberg
e68750aea0 [ARM] pxa: register U2D clock for pxa3xx
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:53 +08:00
Eric Miao
6427d45068 [ARM] pxa: use platform_device_id table for SSP driver
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:52 +08:00
Haojian Zhuang
4092855d96 [ARM] pxa: add apmu clock support in mmp
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:51 +08:00
Haojian Zhuang
68bef3a785 [ARM] pxa: add missing irq events for pxa168
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:51 +08:00
Eric Miao
de0710aa81 [ARM] pxa: re-order platforms in Kconfig and Makefile
Due to the naming mess in Kconfig and Makefile, I'd like to get them sorted
in the following order:

 1. By category:
    Intel/Marvell Dev Platforms, followed by 3rd party platforms, followed
    by end-user products (this is to ensure the commonly referenced platforms
    will appear first)

 2. By vendor name in alphabetic within each category
    (this is to ensure code reuse and similar platforms can be grouped as
     much as possible)

	   VENDOR        BOARD
	Intel/Marvell   Lubbock
	Intel/Marvell   Mainstone
	Intel/Marvell   Zylonite
	Intel/Marvell   Littleton
	Intel/Marvell   TavorEVB
	Intel/Marvell   SAAR

	Accelent        IDP
	Arcom/Eurotech  VIPER
	Community       Balloon3
	Cogent          CSB726
	CompuLab        EM_X270
	CompuLab        EXEDA
	CompuLab        ARMCORE
	CompuLab        CM_X300
	Gumstix         Gumstix
	Intel Research  MOTE2
	Intel research  Stargate2
	Iskratel        XCEP
	Keith and Koep  Trizeps4
	LogicPD         LPD270
	Phytec          PCM027
	Toradex         Colibri

	HP              HX4700
	HP              H5000
	HTC             Himalaya
	HTC             Magician
	Mitac           MioA701
	Motorola        EZX
	NEC             MP900C
	Palm            Palm PDA
	Palm            Palm GSM
	Sharp           Zaurus
	Toshiba         E-Series

Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:50 +08:00
Tomáš Čech
d0a92fd3b8 [ARM] pxa/treo: add Palm Centro 685 support
Signed-off-by: Tomáš Čech <sleep_walker@suse.cz>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:49 +08:00
Tomáš Čech
bb2ae8f032 [ARM] pxa/treo: generalisation of Treo680 code
Signed-off-by: Tomáš Čech <sleep_walker@suse.cz>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:48 +08:00
Haojian Zhuang
d62238711a [ARM] pxa: update flash structure in onenand info
Since flash structure is changed from flash_platform_data to
onenand_platform_data in generic driver. Update the struct in saar
and ttc platform driver.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:47 +08:00
Haojian Zhuang
b1e3719e65 [ARM] pxa: add onenand support for SAAR
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:46 +08:00
Haojian Zhuang
d6587c34a6 [ARM] pxa: add onenand support for TTC-DKB
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:45 +08:00
Haojian Zhuang
ef559def40 [ARM] pxa: add nand support in aspensite board
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:44 +08:00
Haojian Zhuang
a0f266c1fa [ARM] pxa: add nand device and clock for pxa168/pxa910
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:43 +08:00
Haojian Zhuang
82b95ecb96 pxa3xx_nand: move pxa3xx_nand.h common into plat directory
Since the same nand controller is shared between ARCH_PXA and ARCH_MMP. Move
the pxa3xx_nand.h from mach directory to plat directoy.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Cc: David Woodhouse <david.woodhouse@intel.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:43 +08:00
Haojian Zhuang
70c7d2dd27 [ARM] pxa/saar: set default WLED output current
Set default WLED output current in saar. Otherwise, LCD backlight won't be
effective.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:35 +08:00
Pieter Grimmerink
049ad833b1 pxafb: add transparency field to pxafb_mode_info struct
This allows to select either RGB565 (transparency 0) or RGBT555
(transparency 1) from the mode info

Signed-off-by: Pieter Grimmerink <p.grimmerink@inepro.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-12-01 09:02:30 +08:00
Linus Torvalds
5ebacb2712 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin:
  Blackfin: fix SMP build error in start_thread()
  Blackfin: fix memset in smp_send_reschedule() and -stop()
  Blackfin: fix typo in ptrace poking
  Blackfin: check for anomaly 05000475
  Blackfin: work around testset anomaly 05000477
  Blackfin: update anomaly lists
  Blackfin: fix cache Kconfig typo
  Blackfin: fix suspend/resume failure with some on-chip ROMs
2009-11-30 14:51:29 -08:00
Linus Torvalds
07a6d5a49c Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] Update mach-types
  ARM: 5793/1: ARM: Check put_user fail in do_signal when enable OABI_COMPAT
  MAINTAINERS: add maintainer information for AMBA primecell drivers
  [ARM] pxa/spitz: fix compile regression on spitz
  ARM: PNX4008: i2c-pnx: use the same dev_id for request_irq and free_irq
  [ARM] pxa/cpufreq: fix index assignments for end marker
  ARM: PNX4008: fix watchdog device driver name
  [ARM] kmap: fix build errors with DEBUG_HIGHMEM enabled
2009-11-30 14:50:01 -08:00
Linus Torvalds
b4297b0119 Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  powerpc: Fix DEBUG_HIGHMEM build break from d451564669
2009-11-30 14:49:39 -08:00
Becky Bruce
e8105903d7 powerpc: Fix DEBUG_HIGHMEM build break from d451564669
Code was added to mm/higmem.c that depends on several
kmap types that powerpc does not support.  We add dummy
invalid definitions for KM_NMI, KM_NM_PTE, and KM_IRQ_PTE.

According to list discussion, this fix should not be needed
anymore starting with 2.6.33.  The code is commented to this
effect so hopefully we will remember to remove this.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-12-01 09:33:45 +11:00
Linus Torvalds
ffece4808d Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
  sunsu: Use sunserial_console_termios() in sunsu_console_setup().
  sunsu: Pass true 'ignore_line' to console match when RSC or LOM console.
  serial: suncore: Fix RSC/LOM handling in sunserial_console_termios().
  serial: suncore: Add 'ignore_line' argument to sunserial_console_match().
  sunsu: Fix detection of SU ports which are RSC console or control.
  sunsab: Do not set sunsab_reg.cons right before registering minors.
  sparc64: Fix definition of VMEMMAP_SIZE.
2009-11-30 14:02:23 -08:00
Linus Torvalds
1486b2014a Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq:
  [CPUFREQ] Enable ACPI PDC handshake for VIA/Centaur CPUs
2009-11-30 13:55:48 -08:00
Julia Lawall
cc9a2c8301 arch/alpha/kernel: Add kmalloc NULL tests
Check that the result of kmalloc is not NULL before passing it to other
functions.

The semantic match that finds this problem is as follows:
(http://www.emn.fr/x-info/coccinelle/)

// <smpl>
@@
expression *x;
identifier f;
constant char *C;
@@

x = \(kmalloc\|kcalloc\|kzalloc\)(...);
... when != x == NULL
    when != x != NULL
    when != (x || ...)
(
kfree(x)
f(...,C,...,x,...)
|
*f(...,x,...)
|
*x->f
)
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Matt Turner <mattst88@gmail.com>
2009-11-30 15:38:19 -05:00
Julia Lawall
04d8a9db89 arch/alpha/kernel/sys_ruffian.c: Use DIV_ROUND_CLOSEST
The kernel.h macro DIV_ROUND_CLOSEST performs the computation (x + d/2)/d
but is perhaps more readable.

The semantic patch that makes this change is as follows:
(http://www.emn.fr/x-info/coccinelle/)

// <smpl>
@haskernel@
@@

@depends on haskernel@
expression x,__divisor;
@@

- (((x) + ((__divisor) / 2)) / (__divisor))
+ DIV_ROUND_CLOSEST(x,__divisor)
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Matt Turner <mattst88@gmail.com>
2009-11-30 15:37:25 -05:00
Helight.Xu
9eaa192d89 x86: Fix a section mismatch in arch/x86/kernel/setup.c
copy_edd() should be __init.
warning msg:
WARNING: vmlinux.o(.text+0x7759): Section mismatch in reference from the
function copy_edd() to the variable .init.data:boot_params
The function copy_edd() references
the variable __initdata boot_params.
This is often because copy_edd lacks a __initdata
annotation or the annotation of boot_params is wrong.

Signed-off-by: ZhenwenXu <helight.xu@gmail.com>
LKML-Reference: <4B139F8F.4000907@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-11-30 11:16:49 -08:00
Helge Deller
33a932d143 parisc: fix unwind with recent gcc versions
kernel unwinding is broken with gcc >= 4.x.  Part of the problem is that
binutils seems very sensitive to where the unwind information is stored.

Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-11-30 08:20:24 -08:00
Kuninori Morimoto
d53bd80cb3 sh: ms7724se: Add runtime PM support for FSI
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-11-30 12:56:44 +00:00
Harro Haan
9c2daf15ac mx35: add usb gadget support in mx35pdk.c
Signed-off-by: Harro Haan <hrhaan@yahoo.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-30 10:04:46 +01:00
Harro Haan
3e9a23dbaf mx35: register usb_ahb clock in clock-imx35.c
Signed-off-by: Harro Haan <hrhaan@yahoo.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-30 10:04:46 +01:00
Magnus Damm
e6d8460aca sh: Improve kfr2r09 serial port setup code
This patch improves the serial port communication quality
of port YC401 on the KFR2R09 board. With this fix serial
console is fine at 115200 - up and down keys now work as
expected. Thanks to Hirohide Yamasaki for this fix.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-30 12:02:55 +09:00
Magnus Damm
fae4339919 sh: Break out SuperH PFC code
This file breaks out the SuperH PFC code from
arch/sh/kernel/gpio.c + arch/sh/include/asm/gpio.h
to drivers/sh/pfc.c + include/linux/sh_pfc.h.

Similar to the INTC stuff. The non-SuperH specific
file location makes it possible to share the code
between multiple architectures.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-30 12:02:53 +09:00
Magnus Damm
fc1d003de3 sh: Move KEYSC header file
This patch moves the KEYSC header file from the
SuperH specific asm directory to a place where
it can be shared by multiple architectures.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-30 12:02:51 +09:00
Alexey Dobriyan
9a1607071c sh: convert /proc/cpu/aligmnent, /proc/cpu/kernel_alignment to seq_file
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-30 12:02:50 +09:00
Magnus Damm
2ebe0ff7e6 sh: Add CPG save/restore code for sh7724 R-standby
Add sh7724 code to save and restore CPG state during
R-standby. Only CPG registers IRDACLKCR and SPUCLKCR
require software save and restore.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-30 12:02:49 +09:00
Magnus Damm
98779ad822 sh: Add SDHI power control support to Ecovec
This patch adds support for SDHI power control to the
Ecovec board. Platform data and power control callbacks
for SDHI0 and SDHI1 are added. Power is by default off.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-30 12:02:48 +09:00
Kuninori Morimoto
c60f55fa1f sh: mach-ecovec24: modify address map
ecovec24 board expect address map 2 instead of map 1

Signed-off-by: Mizukawa Tatsuo <mizukawa.tatsuo@renesas.com>
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-30 12:01:23 +09:00
Thomas Gleixner
b8b7d791a8 x86: Use -maccumulate-outgoing-args for sane mcount prologues
commit 746357d (x86: Prevent GCC 4.4.x (pentium-mmx et al) function
prologue wreckage) uses -mtune=generic to work around the function
prologue problem with mcount on -march=pentium-mmx and others.

Jakub pointed out that we can use -maccumulate-outgoing-args instead
which is selected by -mtune=generic and prevents the problem without
losing the -march specific optimizations.

Pointed-out-by: Jakub Jelinek <jakub@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: stable@kernel.org
2009-11-28 15:08:30 +01:00
Srinidhi Kasagar
850265e84d ARM: 5834/1: ARM: U8500 integrate to ARM architecture
This hooks the U8500 support into the ARM kbuild
system. This integration also enables SMP and its
helper functions for U8500 platform

Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-28 10:22:53 +00:00
Srinidhi Kasagar
e3fd17458e ARM: 5833/1: ARM nomadik: enable U8500 for common platform
Enable U8500 architecture to get access to
the common code shared across various
ST-Ericsson's machines like nomadik.

Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-28 10:22:53 +00:00
Srinidhi Kasagar
4e4eb42999 ARM: 5832/1: ARM: U8500 Makefile.boot
The Makefile.boot for the U8500 platform

Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-28 10:22:52 +00:00
Srinidhi Kasagar
aa44ef4d43 ARM: 5831/1: ARM: U8500 core machine support
Adds core support for the ST-Ericsson U8500
platform. It supports memory mappings, binds to
the existing modules like GIC, SCU, TWD and
local timers and sets up the infrastructure for
the secondary core.

Reviewed-by: Alessandro Rubini <rubini@unipv.it>
Reviewed-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-28 10:22:52 +00:00
Srinidhi Kasagar
c6b503caef ARM: 5830/1: ARM: U8500 clock framework
Adds basic clock framework to the U8500 platform.
Currently it just uses the clock lookup table
and add the each entry to the clkdevice. More
complex clock management to follow soon

Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-28 10:22:52 +00:00
Srinidhi Kasagar
ffae4e014a ARM: 5829/1: ARM: U8500 register definitions
Adds register definitions, shared peripheral interrupt
numbers (SHPI) and IO mappings for the U8500 core support.
SHPI are assigned to [160:32] where first 32 interrupts
are reserved.

Reviewed-by: Alessandro Rubin <rubini@unipv.it>
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-28 10:22:51 +00:00
Srinidhi Kasagar
59b559d7a3 ARM: 5786/1: Introduce plat-nomadik, MTU code re-organization
Introduce the plat-nomadik folder for ST-Ericsson
machines including the existing nomadik 8815 architecture.
This also moves the existing MTU (MultiTimerUnit)
of nomadik 8815 to the proposed plat-nomadik and adds
HAS_MTU. The patch has been re-based to 2.6.32-rc6

Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Alessandro Rubini <rubini@unipv.it>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-28 10:22:51 +00:00
David S. Miller
c57ec52f26 sparc64: Faster early-boot framebuffer console.
Borrow the powerpc bootx text console driver.

Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-27 17:33:43 -08:00
Saeed Bishara
da43243e76 RTC: let Dove soc select the rtc-mv driver.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-11-27 15:43:21 -05:00
Lennert Buytenhek
573a652fb0 ARM: Add Tauros2 L2 cache controller support
Support for the Tauros2 L2 cache controller as used with the PJ1
and PJ4 CPUs.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-11-27 15:43:21 -05:00
Saeed Bishara
edabd38e1a ARM: add base support for Marvell Dove SoC
The Marvell Dove (88AP510) is a high-performance, highly integrated,
low power SoC with high-end ARM-compatible processor (known as PJ4),
graphics processing unit, high-definition video decoding acceleration
hardware, and a broad range of peripherals.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-11-27 15:43:06 -05:00
Thomas Kunze
9823b2d0f9 collie: support pda_power driver
This add the pda-power platform device to collie.
2009-11-27 21:07:24 +01:00
Thomas Kunze
f7177c8452 collie: convert to gpiolib for ucb1x00
Only the parts used for collie_battery are converted.
The rest will be cleaned up later.
2009-11-27 21:07:22 +01:00
Thomas Kunze
9ca3dc805c add gpiolib support to ucb1x00
The old access methods to the gpios will be removed when
all users has been converted. (mainly ucb1x00-ts)
2009-11-27 21:07:21 +01:00
Thomas Kunze
cc64717279 SA1100: make gpio_to_irq and reverse a macro
The function can't be used for static initialisations so
convert them to macros.
2009-11-27 21:07:20 +01:00
Thomas Kunze
1d0ad843b0 collie: prepare for gpiolib use
prefix gpio definitions for direct register access with '_' so we
can use the other names for gpio_request & co
2009-11-27 21:07:16 +01:00
Thomas Kunze
f151ccf76b collie: fix scoop convesion to new api 2009-11-27 21:07:15 +01:00
Thomas Gleixner
18ed61da98 x86: hpet: Make WARN_ON understandable
Andrew complained rightly that the WARN_ON in hpet_next_event() is
confusing and the code comment not really helpful.

Change it to WARN_ONCE and print the reason in clear text. Change the
comment to explain what kind of hardware wreckage we deal with.

Pointed-out-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Venki Pallipadi <venkatesh.pallipadi@intel.com>
2009-11-27 20:37:41 +01:00
Joerg Roedel
492667dacc x86/amd-iommu: Remove amd_iommu_pd_table
The data that was stored in this table is now available in
dev->archdata.iommu. So this table is not longer necessary.
This patch removes the remaining uses of that variable and
removes it from the code.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:37 +01:00
Joerg Roedel
8eed983334 x86/amd-iommu: Move reset_iommu_command_buffer out of locked code
This patch removes the ugly contruct where the
iommu->lock must be released while before calling the
reset_iommu_command_buffer function.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:37 +01:00
Joerg Roedel
b00d3bcff4 x86/amd-iommu: Cleanup DTE flushing code
This patch cleans up the code to flush device table entries
in the IOMMU. With this chance the driver can get rid of the
iommu_queue_inv_dev_entry() function.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:36 +01:00
Joerg Roedel
3fa43655d8 x86/amd-iommu: Introduce iommu_flush_device() function
This patch adds a function to flush a DTE entry for a given
struct device and replaces iommu_queue_inv_dev_entry calls
with this function where appropriate.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:35 +01:00
Joerg Roedel
7f760ddd70 x86/amd-iommu: Cleanup attach/detach_device code
This patch cleans up the attach_device and detach_device
paths and fixes reference counting while at it.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:35 +01:00
Joerg Roedel
7c392cbe98 x86/amd-iommu: Keep devices per domain in a list
This patch introduces a list to each protection domain which
keeps all devices associated with the domain. This can be
used later to optimize certain functions and to completly
remove the amd_iommu_pd_table.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:34 +01:00
Joerg Roedel
241000556f x86/amd-iommu: Add device bind reference counting
This patch adds a reference count to each device to count
how often the device was bound to that domain. This is
important for single devices that act as an alias for a
number of others. These devices must stay bound to their
domains until all devices that alias to it are unbound from
the same domain.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:33 +01:00
Joerg Roedel
657cbb6b6c x86/amd-iommu: Use dev->arch->iommu to store iommu related information
This patch changes IOMMU code to use dev->archdata->iommu to
store information about the alias device and the domain the
device is attached to.
This allows the driver to get rid of the amd_iommu_pd_table
in the future.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:32 +01:00
Joerg Roedel
8793abeb78 x86/amd-iommu: Remove support for domain sharing
This patch makes device isolation mandatory and removes
support for the amd_iommu=share option. This simplifies the
code in several places.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:32 +01:00
Joerg Roedel
171e7b3739 x86/amd-iommu: Rearrange dma_ops related functions
This patch rearranges two dma_ops related functions so that
their forward declarations are not longer necessary.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:31 +01:00
Joerg Roedel
308973d3b9 x86/amd-iommu: Move some pte allocation functions in the right section
This patch moves alloc_pte() and fetch_pte() into the page
table handling code section so that the forward declarations
for them could be removed.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:30 +01:00
Joerg Roedel
87a64d5238 x86/amd-iommu: Remove iommu parameter from dma_ops_domain_alloc
This function doesn't use the parameter anymore so it can be
removed.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:30 +01:00
Joerg Roedel
98fc5a693b x86/amd-iommu: Use get_device_id and check_device where appropriate
The logic of these two functions is reimplemented (at least
in parts) in places in the code. This patch removes these
code duplications and uses the functions instead. As a side
effect it moves check_device() to the helper function code
section.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:29 +01:00
Joerg Roedel
71c70984e5 x86/amd-iommu: Move find_protection_domain to helper functions
This is a helper function and when its placed in the helper
function section we can remove its forward declaration.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:28 +01:00
Joerg Roedel
94f6d190ee x86/amd-iommu: Simplify get_device_resources()
With the previous changes the get_device_resources function
can be simplified even more. The only important information
for the callers is the protection domain.
This patch renames the function to get_domain() and let it
only return the protection domain for a device.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:20:21 +01:00
Joerg Roedel
15898bbcb4 x86/amd-iommu: Let domain_for_device handle aliases
If there is no domain associated to a device yet and the
device has an alias device which already has a domain, the
original device needs to have the same domain as the alias
device.
This patch changes domain_for_device to handle this
situation and directly assigns the alias device domain to
the device in this situation.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:17:09 +01:00
Joerg Roedel
f3be07da53 x86/amd-iommu: Remove iommu specific handling from dma_ops path
This patch finishes the removal of all iommu specific
handling code in the dma_ops path.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:17:08 +01:00
Joerg Roedel
cd8c82e875 x86/amd-iommu: Remove iommu parameter from __(un)map_single
With the prior changes this parameter is not longer
required. This patch removes it from the function and all
callers.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:17:08 +01:00
Joerg Roedel
576175c250 x86/amd-iommu: Make alloc_new_range aware of multiple IOMMUs
Since the assumption that an dma_ops domain is only bound to
one IOMMU was given up we need to make alloc_new_range aware
of it.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:17:01 +01:00
Joerg Roedel
680525e06d x86/amd-iommu: Remove iommu parameter from dma_ops_domain_(un)map
The parameter is unused in these function so remove it from
the parameter list.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:16:31 +01:00
Joerg Roedel
f99c0f1c75 x86/amd-iommu: Use check_device in get_device_resources
Every call-place of get_device_resources calls check_device
before it. So call it from get_device_resources directly and
simplify the code.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:16:30 +01:00
Joerg Roedel
420aef8a3a x86/amd-iommu: Use check_device for amd_iommu_dma_supported
The check_device logic needs to include the dma_supported
checks to be really sure. Merge the dma_supported logic into
check_device and use it to implement dma_supported.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:16:30 +01:00
Joerg Roedel
318afd41d2 x86/amd-iommu: Make np-cache a global flag
The non-present cache flag was IOMMU local until now which
doesn't make sense. Make this a global flag so we can remove
the lase user of 'struct iommu' in the map/unmap path.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:16:29 +01:00
Joerg Roedel
09b4280439 x86/amd-iommu: Reimplement flush_all_domains_on_iommu()
This patch reimplements the function
flush_all_domains_on_iommu to use the global protection
domain list.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:16:28 +01:00
Joerg Roedel
e3306664eb x86/amd-iommu: Reimplement amd_iommu_flush_all_domains()
This patch reimplementes the amd_iommu_flush_all_domains
function to use the global protection domain list instead
of flushing every domain on every IOMMU.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:16:28 +01:00
Joerg Roedel
aeb26f5533 x86/amd-iommu: Implement protection domain list
This patch adds code to keep a global list of all protection
domains. This allows to simplify the resume code.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:16:27 +01:00
Joerg Roedel
601367d76b x86/amd-iommu: Remove iommu_flush_domain function
This iommu_flush_tlb_pde function does essentially the same.
So the iommu_flush_domain function is redundant and can be
removed.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:16:26 +01:00
Joerg Roedel
dcd1e92e40 x86/amd-iommu: Use __iommu_flush_pages for tlb flushes
This patch re-implements iommu_flush_tlb functions to use
the __iommu_flush_pages logic.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:16:26 +01:00
Joerg Roedel
6de8ad9b9e x86/amd-iommu: Make iommu_flush_pages aware of multiple IOMMUs
This patch extends the iommu_flush_pages function to flush
the TLB entries on all IOMMUs the domain has devices on.
This basically gives up the former assumption that dma_ops
domains are only bound to one IOMMU in the system.
For dma_ops domains this is still true but not for
IOMMU-API managed domains. Giving this assumption up for
dma_ops domains too allows code simplification.
Further it splits out the main logic into a generic function
which can be used by iommu_flush_tlb too.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 14:16:18 +01:00
Joerg Roedel
0518a3a458 x86/amd-iommu: Add function to complete a tlb flush
This patch adds a function to the AMD IOMMU driver which
completes all queued commands an all IOMMUs a specific
domain has devices attached on. This is required in a later
patch when per-domain flushing is implemented.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 11:45:50 +01:00
Joerg Roedel
c459611424 x86/amd-iommu: Add per IOMMU reference counting
This patch adds reference counting for protection domains
per IOMMU. This allows a smarter TLB flushing strategy.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 11:45:50 +01:00
Joerg Roedel
bb52777ec4 x86/amd-iommu: Add an index field to struct amd_iommu
This patch adds an index field to struct amd_iommu which can
be used to lookup it up in an array. This index will be used
in struct protection_domain to keep track which protection
domain has devices behind which IOMMU.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 11:45:49 +01:00
Joerg Roedel
bf3118c127 x86/amd-iommu: Update copyright headers
This patch updates the copyright headers in the relevant AMD
IOMMU driver files to match the date of the latest changes.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 11:45:49 +01:00
Joerg Roedel
6a9401a7ac x86/amd-iommu: Separate internal interface definitions
This patch moves all function declarations which are only
used inside the driver code to a seperate header file.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-27 11:45:48 +01:00
Yoichi Yuasa
415c7d26d2 Add KZM-ARM11-01 support
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-27 09:17:00 +01:00
Alan Carvalho de Assis
143a179d6c mx27: Add basic support for Maxtrack i-MXT TD60
Signed-off-by: Alan Carvalho de Assis <acassis@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-27 09:01:56 +01:00
Uwe Kleine-König
97adeda043 IMX: don't disable the uart clock if DEBUG_LL uses it
Before the clock was left enabled only for DEBUG_LL_CONSOLE which
requires an additional patch to exist at all.  With this patch applied
DEBUG_LL_CONSOLE depends on DEBUG_LL, so this doesn't break.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-27 08:32:37 +01:00
Frederic Weisbecker
5fa10b28e5 hw-breakpoints: Use struct perf_event_attr to define user breakpoints
In-kernel user breakpoints are created using functions in which
we pass breakpoint parameters as individual variables: address,
length and type.

Although it fits well for x86, this just does not scale across
archictectures that may support this api later as these may have
more or different needs. Pass in a perf_event_attr structure
instead because it is meant to evolve as much as possible into
a generic hardware breakpoint parameter structure.

Reported-by: K.Prasad <prasad@linux.vnet.ibm.com>
Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
LKML-Reference: <1259294154-5197-1-git-send-regression-fweisbec@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-27 06:22:58 +01:00
David Gibson
39adfa540f powerpc/mm: Fix bug in gup_hugepd()
Commit a4fe3ce769 introduced a new
get_user_pages() path for hugepages on powerpc.  Unfortunately, there
is a bug in it's loop logic, which can cause it to overrun the end of
the intended region.  This came about by copying the logic from the
normal page path, which assumes the address and end parameters have
been pagesize aligned at the top-level.  Since they're not *hugepage*
size aligned, the simplistic logic could step over the end of the gup
region without triggering the loop end condition.

This patch fixes the bug by using the technique that the normal page
path uses in levels above the lowest to truncate the ending address to
something we know we'll match with.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-27 14:24:30 +11:00
David Gibson
c045256d14 powerpc/mm: Fix bug in pagetable cache cleanup with CONFIG_PPC_SUBPAGE_PROT
Commit a0668cdc15 cleans up the handling
of kmem_caches for allocating various levels of pagetables.
Unfortunately, it conflicts badly with CONFIG_PPC_SUBPAGE_PROT, due to
the latter's cleverly hidden technique of adding some extra allocation
space to the top level page directory to store the extra information
it needs.

Since that extra allocation really doesn't fit into the cleaned up
page directory allocating scheme, this patch alters
CONFIG_PPC_SUBPAGE_PROT to instead allocate its struct
subpage_prot_table as part of the mm_context_t.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-27 14:24:29 +11:00
David S. Miller
55f532ec3e Revert "sparc: Make atomic locks raw"
This reverts commit 4df286e529.

Breaks the build as reported by Stephen Rothwell.

Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-26 15:28:13 -08:00
Xiaotian Feng
dd4377b02d x86/pat: Trivial: don't create debugfs for memtype if pat is disabled
If pat is disabled (boot with nopat), there's no need to create
debugfs for it, it's empty all the time.

Signed-off-by: Xiaotian Feng <dfeng@redhat.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
LKML-Reference: <1259236428-16329-1-git-send-email-dfeng@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-26 15:05:03 +01:00
Uwe Kleine-König
fb37046630 ARM: fix "offest" -> "offset" typo
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-26 11:55:19 +00:00
Jack Steiner
918bc960dc x86: SGI UV: Map low MMR ranges
Explicitly mmap the UV chipset MMR address ranges used to
access blade-local registers. Although these same MMRs are also
mmaped at higher addresses, the low range is more
convenient when accessing blade-local registers.

The low range addresses always alias to the local blade
regardless of the blade id.

Signed-off-by: Jack Steiner <steiner@sgi.com>
LKML-Reference: <20091125162018.GA25445@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-26 10:52:36 +01:00
Brian Gerst
8ec6993d9f x86, 64-bit: Set data segments to null after switching to 64-bit mode
This prevents kernel threads from inheriting non-null segment
selectors, and causing optimizations in __switch_to() to be
ineffective.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Cc: Tim Blechmann <tim@klingt.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Jan Beulich <JBeulich@novell.com>
LKML-Reference: <1259165856-3512-1-git-send-email-brgerst@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-26 10:44:30 +01:00
Ingo Molnar
64b028b226 x86: Clean up the loadsegment() macro
Make it readable in the source too, not just in the assembly output.
No change in functionality.

Cc: Brian Gerst <brgerst@gmail.com>
LKML-Reference: <1259176706-5908-1-git-send-email-brgerst@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-26 10:38:52 +01:00
Brian Gerst
79b0379cee x86: Optimize loadsegment()
Zero the input register in the exception handler instead of
using an extra register to pass in a zero value.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
LKML-Reference: <1259176706-5908-1-git-send-email-brgerst@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-26 10:33:58 +01:00
Hidetoshi Seto
767df1bdd8 x86, mce: Add __cpuinit to hotplug callback functions
The mce_disable_cpu() and mce_reenable_cpu() are called only
from mce_cpu_callback() which is marked as __cpuinit.
So these functions can be __cpuinit too.

Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Cc: Andi Kleen <ak@linux.intel.com>
LKML-Reference: <4B0E3C4E.4090809@jp.fujitsu.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-26 10:29:41 +01:00
Mike Travis
9b3660a55a x86: Limit number of per cpu TSC sync messages
Limit the number of per cpu TSC sync messages by only printing
to the console if an error occurs, otherwise print as a DEBUG
message.

The info message "Skipping synchronization ..." is only printed
after the last cpu has booted.

Signed-off-by: Mike Travis <travis@sgi.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Roland Dreier <rdreier@cisco.com>
Cc: Randy Dunlap <rdunlap@xenotime.net>
Cc: Tejun Heo <tj@kernel.org>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Cc: David Rientjes <rientjes@google.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Cc: Jack Steiner <steiner@sgi.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
LKML-Reference: <20091118002222.181053000@alcatraz.americas.sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-26 10:17:45 +01:00
Frederic Weisbecker
2c31b7958f x86/hw-breakpoints: Don't lose GE flag while disabling a breakpoint
When we schedule out a breakpoint from the cpu, we also
incidentally remove the "Global exact breakpoint" flag from the
breakpoint control register. It makes us losing the fine grained
precision about the origin of the instructions that may trigger
breakpoint exceptions for the other breakpoints running in this
cpu.

Reported-by: Prasad <prasad@linux.vnet.ibm.com>
Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
LKML-Reference: <1259211878-6013-1-git-send-regression-fweisbec@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-26 09:29:22 +01:00
Frederic Weisbecker
605bfaee90 hw-breakpoints: Simplify error handling in breakpoint creation requests
This simplifies the error handling when we create a breakpoint.
We don't need to check the NULL return value corner case anymore
since we have improved perf_event_create_kernel_counter() to
always return an error code in the failure case.

Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Prasad <prasad@linux.vnet.ibm.com>
LKML-Reference: <1259210142-5714-3-git-send-regression-fweisbec@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-26 09:29:21 +01:00
Ilya Loginov
2d4dc890b5 block: add helpers to run flush_dcache_page() against a bio and a request's pages
Mtdblock driver doesn't call flush_dcache_page for pages in request.  So,
this causes problems on architectures where the icache doesn't fill from
the dcache or with dcache aliases.  The patch fixes this.

The ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE symbol was introduced to avoid
pointless empty cache-thrashing loops on architectures for which
flush_dcache_page() is a no-op.  Every architecture was provided with this
flush pages on architectires where ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE is
equal 1 or do nothing otherwise.

See "fix mtd_blkdevs problem with caches on some architectures" discussion
on LKML for more information.

Signed-off-by: Ilya Loginov <isloginov@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Peter Horton <phorton@bitbox.co.uk>
Cc: "Ed L. Cashin" <ecashin@coraid.com>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2009-11-26 09:16:19 +01:00
Ingo Molnar
67f2de0bf9 x86: dumpstack, 64-bit: Disable preemption when walking the IRQ/exception stacks
This warning:

[  847.140022] rb_producer   D 0000000000000000  5928   519      2 0x00000000
[  847.203627] BUG: using smp_processor_id() in preemptible [00000000] code: khungtaskd/517
[  847.207360] caller is show_stack_log_lvl+0x2e/0x241
[  847.210364] Pid: 517, comm: khungtaskd Not tainted 2.6.32-rc8-tip+ #13761
[  847.213395] Call Trace:
[  847.215847]  [<ffffffff81413bde>] debug_smp_processor_id+0x1f0/0x20a
[  847.216809]  [<ffffffff81015eae>] show_stack_log_lvl+0x2e/0x241
[  847.220027]  [<ffffffff81018512>] show_stack+0x1c/0x1e
[  847.223365]  [<ffffffff8107b7db>] sched_show_task+0xe4/0xe9
[  847.226694]  [<ffffffff8112f21f>] check_hung_task+0x140/0x199
[  847.230261]  [<ffffffff8112f4a8>] check_hung_uninterruptible_tasks+0x1b7/0x20f
[  847.233371]  [<ffffffff8112f500>] ? watchdog+0x0/0x50
[  847.236683]  [<ffffffff8112f54e>] watchdog+0x4e/0x50
[  847.240034]  [<ffffffff810cee56>] kthread+0x97/0x9f
[  847.243372]  [<ffffffff81012aea>] child_rip+0xa/0x20
[  847.246690]  [<ffffffff81e43494>] ? restore_args+0x0/0x30
[  847.250019]  [<ffffffff81e43083>] ? _spin_lock+0xe/0x10
[  847.253351]  [<ffffffff810cedbf>] ? kthread+0x0/0x9f
[  847.256833]  [<ffffffff81012ae0>] ? child_rip+0x0/0x20

Happens because on preempt-RCU, khungd calls show_stack() with
preemption enabled.

Make sure we are not preemptible while walking the IRQ and exception
stacks on 64-bit. (32-bit stack dumping is preemption safe.)

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-26 08:29:10 +01:00
Ingo Molnar
b803090615 x86: dumpstack: Clean up the x86_stack_ids[][] initalization and other details
Make the initialization more readable, plus tidy up a few small
visual details as well.

No change in functionality.

LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-26 08:24:33 +01:00
Boaz Harrosh
0448f5e884 sparc: remove unused nfsd #includes
Some unused includes removed.

In an effort to cleanup nfsd headers and move private
definitions to source directory.

Signed-off-by: Boaz Harrosh <bharrosh@panasas.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-25 15:19:17 -08:00
Ranjith Lohithakshan
4421752e33 AM35xx: Defconfig for AM3517 EVM board
This patch adds a minimal defconfig for AM3517 EVM board.

Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-25 14:21:01 -08:00
Ranjith Lohithakshan
c625327e2f AM35xx: Add support for AM3517 EVM board
This patch creates a minimal AM3517 EVM board support.

Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-25 14:21:01 -08:00
vikram pandita
62002e8f82 omap: 3630sdp: defconfig creation
Create 3630sdp defconfig file

Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-25 14:21:01 -08:00
vikram pandita
34c9ac2376 omap: 3630sdp: introduce 3630 sdp board support
Add 3630SDP board support

The board shares the same peripherals as a zoom2 main.
So reuse the peripheral file of zoom platform.

Peripheral    zoom2    zoom3  sdp3630
---------------------------------------
Ethernet	smsc	smsc	smc
NOR		n/a     n/a	B
Onenand	  	n/a     n/a	B
HDMI		A	A	B (persent on different i2c)
NAND		A	A	A (same nand)
SDRAM		A	A	A (same sdram)
Keypad		A	A	A (same twl)
Camera		A	A	A (same sensor can be mounted)
LCD Display	A	A	A (same wvga display)
OPPs		A	A	A (same chip feature)
Audio		A	A	A (same audio via twl5030)

OMAP3630 details can be found here:
http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12836&contentId=52606

Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-25 14:21:01 -08:00
Enric Balletbo i Serra
9d9e502725 omap3: Add defconfig for IGEP v2 board
Add defconfig for IGEP v2 board

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-25 14:21:00 -08:00
Enric Balletbo i Serra
58e111621d omap3: Add minimal IGEP v2 support
The IGEP v2 board is a low-cost, fan-less and industrial temperature
range single board computer that unleashes laptop-like performance and
expandability without the bulk, expense, or noise of typical desktop
machines. Its architecture shares much in common with other OMAP3 boards.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-25 14:21:00 -08:00
Mike Rapoport
35ca0d1e42 omap3: Add CompuLab CM-T35 defconfig
Add CompuLab CM-T35 defconfig

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-25 14:21:00 -08:00
Mike Rapoport
2886d128d8 omap3: Add CompuLab CM-T35 board support
This patch adds basic support for CompuLab CM-T35 module.

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-25 14:21:00 -08:00
Russell King
3fcca9ac6c Merge branch 'mach-types' 2009-11-25 22:17:55 +00:00
Russell King
9faf3c1d0d [ARM] Update mach-types
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-25 22:17:36 +00:00
Andrey Porodko
c16fe26701 davinci: Initial support for Neuros OSD2 platform.
The Neuros OSD 2.0 is the hardware component of the Neuros Open
Internet Television Platform. Hardware is very close to Ti DM644X-EVM board.
It has: DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC,
USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video.
Additionaly realtime clock, IR remote control receiver,
IR Blaster based on MSP430 (firmware although is different
from used in DM644X-EVM), internal ATA-6 3.5” HDD drive
with PATA interface, two muxed red-green leds.

For more information please refer to
	http://wiki.neurostechnology.com/index.php/OSD_2.0_HD

Signed-off-by: Andrey Porodko <panda@chelcom.ru>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:39 -08:00
Sekhar Nori
27a147cd2a davinci: remove unused variable in arch/arm/mach-davinci/board-sffsdr.c
This patch fixes the following warning:

arch/arm/mach-davinci/board-sffsdr.c:99: warning: 'sffsdr_emac_pdata' defined but not used

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:38 -08:00
Sekhar Nori
445094f994 davinci: fix section mismatch warning in arch/arm/mach-davinci/board-dm646x-evm.c
A section mismatch is reported for gpio_led_platform_data
as it is referenced by a non annotated function (evm_led_setup)

This patch fixes the issue by converting the __initconst to const
as is the case in arch/arm/mach-davinci/board-dm644x-evm.c file.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:38 -08:00
Miguel Aguilar
99381b4f11 DaVinci: DM365: Enable DaVinci RTC support for DM365 EVM
The general structures are defined at DM365 SoC file and the specific
platform data structure for the EVM is defined at board file.

Signed-off-by: Miguel Aguilar <miguel.aguilar@ridgerun.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:38 -08:00
Chaithrika U S
0046d0bf68 DA8xx/OMAP-L1xx: Add high speed SD/MMC capabilities
Include high speed capabilities in MMC/SD platform data
for DA830/OMAP-L137 and DA850/OMAP-L138 EVMs.

Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:38 -08:00
Sekhar Nori
afc3ea1cea davinci: DA8XX/OMAP-L1XX: enable cpuidle and regulator in defconfig
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:37 -08:00
Sekhar Nori
13d5e27a44 davinci: DA850/OMAP-L138: avoid using separate initcall for initializing regulator
Using a device_initcall() for initializing the voltage regulator
on DA850 is not such a good idea because it gets called for all
platforms - even those who do not have a regulator implemented.
This leads to a big fat warning message during boot-up when
regulator cannot be found.

Instead, tie initialization of voltage regulator to cpufreq init.
Define a platform specific init call which in case of DA850 gets
used for initializing the regulator. On other future platforms it
can be used for other purposes.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:37 -08:00
Sekhar Nori
5aeb15aafc davinci: DA850/OMAP-L138 EVM: register for cpuidle support
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:37 -08:00
Sekhar Nori
1960e693ac davinci: DA8XX/OMAP-L1XX: add support for cpuidle driver register
This patch provides a function to help register cpuidle driver
on da8xx/omap-l1xx platforms.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:37 -08:00
Sekhar Nori
a6c0f6eca1 davinci: add CPU idle driver
The patch adds support for DaVinci cpu idle driver.

Two idle states are defined:
1. Wait for interrupt
2. Wait for interrupt and DDR self-refresh (or power down)

Some DaVinci SoCs support putting DDR in self-refresh (eg Dm644x, DM6467)
while others support putting DDR in self-refresh and power down (eg DM35x,
DA8xx).

Putting DDR (or mDDR) in power down saves more power than self-refresh.

The patch has been tested on DA850/OMAP-L138 EVM.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:37 -08:00
Sudhakar Rajashekhara
1ef203c324 davinci: DA8XX/OMAP-L1XX: fix compiler warning
When kernel is built with CONFIG_DEBUG_SECTION_MISMATCH=y
option, using da8xx_omapl_defconfig, some warnings are
observed:

WARNING: vmlinux.o(.text+0xc2a4): Section mismatch in reference
from the function da850_evm_setup_nor_nand() to the variable
.init.data:da850_nand_pins
The function da850_evm_setup_nor_nand() references
the variable __initdata da850_nand_pins.
This is often because da850_evm_setup_nor_nand lacks a __initdata
annotation or the annotation of da850_nand_pins is wrong.

This patch fixes such warnings.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:36 -08:00
Sudhakar Rajashekhara
039c5ee3c9 davinci: DA850/OMAP-L138: eliminate static function declaration
Eliminate the static function declaration by rearranging
data in da850/omap-l138 board file.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:36 -08:00
Sekhar Nori
17fadd9a5e davinci: DA850/OMAP-L138 EVM: simplify configuration of emac in MII/RMII mode
There are multiple steps in configuring the EMAC to MII or RMII mode.
Current code implements them using multiple checks.

Consolidate the multiple checks into a single if construct.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:36 -08:00
Sekhar Nori
797d799ed0 davinci: DA850/OMAP-L138 EVM: get rid of DA850_UI_EXP config option
Get rid of DA850_UI_EXP config option since it is not used anywhere
else in code.

Instead make the UI expander choice menu dependent on the EVM
selection itself.

Also add help text indicating that UI board is actually detected
automatically.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:35 -08:00
Sekhar Nori
bae105879f davinci: DA850/OMAP-L138 EVM: implement autodetect of RMII PHY
Implement autodetection of RMII PHY by shifting the decision
to use the RMII PHY to da850_evm_ui_expander_setup() from
da850_evm_init() earlier.

Without this patch, selecting RMII PHY in the UI expander menu
will make the MII PHY unusable even though UI board is not
connected.

The actual configuration and registration of the EMAC device
is delayed to device_initcall() so it happens after the UI card
detection is complete.

A side effect of this patch is the removal of a voilation of
Documentation/SubmittingPatches section 2.2 in function
da850_evm_init()

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:35 -08:00
Sekhar Nori
b5ebe4e198 davinci: DA830/OMAP-L137 EVM: do not configure NAND on UI card when MMC/SD is selected
On the DA830, AEMIF and MMC/SD pins are shared. On the EVM, when
the mux_mode signal is low MMC/SD works and when mux_mode signal
is high, NAND works.

When MMC/SD driver is configured in the kernel, do not let NAND
get registered and drive mux_mode high. Instead, print a warning
for user to understand why the platform device for NAND did not
get registered.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:35 -08:00
Sekhar Nori
77316f0575 davinci: DA830/OMAP-L137 EVM: use runtime detection for UI card
This patch supports runtime detection of DA830 UI card and
eliminates the need for DA830_UI config option. Successful
probe of GPIO expander present on the UI card is used to
detect its presence. For this reason, GPIO_PCF857X is auto-
selected when DA830 EVM is configured. In case the UI card
is absent, the probe fails in reasonable time.

As a side effect this patch also gets rid of the voilation
of Documentation/SubmittingPatches section 2.2 in function
da830_evm_ui_expander_setup()

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:34 -08:00
Sekhar Nori
a0433ac30c davinci: DA830/OMAP-L137 EVM: remove ifdefs inside da830_evm_init()
Remove ifdefs inside da830_evm_init function since they are
discouraged in Documentation/SubmittingPatches section 2.2

Use the method outlined in that document for fixing it.

Tested on DA830 EVM.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:34 -08:00
Sekhar Nori
5950b55b04 davinci: DA830/OMAP-L137 EVM: fix warning with default config
This patch fixes the following warning seen when building with default
config:

arch/arm/mach-davinci/board-da830-evm.c:371: warning: 'da830_evm_devices' defined but not used

Tested on DA830 EVM with and without CONFIG_DA830_UI_NAND enabled.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:34 -08:00
David A. Griego
733975a314 davinci: Add NAND support for DA830/OMAP-L137 EVM platform
Add support for NAND flash parts on the DA830/OMAP-L137 EVM
User Interface board.  This includes overriding the default
bad block tables used by the davinci_nand driver.

Signed-off-by: David A. Griego <dgriego@mvista.com>
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:34 -08:00
Sergei Shtylyov
ca6a272a4f DA830 EVM: MUSB platform code
Properly set up the OTG mode thru the CFGCHIP2 register, enable the
USB0_DRVVBUS pin, and finally register the MUSB platform device.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:34 -08:00
Sergei Shtylyov
b0ea26e1c8 DA8xx: MUSB platform device registration
Add the function to register the MUSB platform device.
Additional compile warning fixes by Sekhar Nori.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:33 -08:00
Sergei Shtylyov
355fb4e3ea DaVinci: rename setup_usb() to davinci_setup_usb()
Rename setup_usb() into davinci_setup_usb().  While at it:

- move its declaration from <mach/common.h> to more fitting <mach/usb.h>;
- teach it to handle values of the 'mA' parameter greater than 510 and thus
  pass 1000 instead of 500 for the power switches capable of sourcing over 1 A;
- teach it to handle odd values of the 'potpgt_ms' parameter...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:33 -08:00
Miguel Aguilar
990c09d5f5 Davinci: DM365: Enable DaVinci Key Scan support for DM365 EVM
The general structures are defined at DM365 SoC file and the specific
platform data structure for the EVM is defined at board file.

Signed-off-by: Miguel Aguilar <miguel.aguilar@ridgerun.com>
2009-11-25 10:21:32 -08:00
Kevin Hilman
1ce52121c4 davinci: DMx and da8xx defconfig updates
DMx:
- enable MMC and dm365evm_keys
- Enable DM355 and DM365 input drivers as modules.

da8xx
- combine da830 and da850 into common defconfig
- drop SYSFS_DEPRECATED flag
- auto-select D$ writethrough for da830
- enable CPUfreq and FB

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:32 -08:00
Chaithrika U S
51157ed8c5 davinci: DA850/OMAP-L138: Set ASYNC3 domain flag for McASP
In the McASP clock definition add a flag to indicate that the peripheral clock
belongs to ASYNC3 clock domain.

Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:32 -08:00
Hemant Pedanekar
50fbabfe8d davinci: dm646x-evm: Add platform data for NAND
This patch adds platform data and partition info for NAND on dm6467 EVM.

Note that the partition layout is dependent on the UBL, U-Boot etc. used. This
patch tries to minimize that dependency by setting first partition for UBL,
U-Boot and environment altogether.

Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:32 -08:00
Sergei Shtylyov
42d399e418 DaVinci: remove unneeded #include's
There have accumulated quite a lot of them after the code reorganizations...

In several cases I had to replace #include <linux/dma-mapping.h> which wasn't
needed directly but happened to #include <linux/err.h> which was needed.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:31 -08:00
Sekhar Nori
69872e93d9 davinci: make it easier to identify SoC init failures
This patch makes it easier to identify SoC init failures
by panicing when SoC init fails. Without successful SoC
init, the kernel eventually fails when attempt is made to
access the clocks.

Also, an error is printed when JTAG ID match fails to make
it easier to identify failures due to SoC rev changes.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:31 -08:00
Chaithrika U S
2206771c43 davinci: RMII support for DA850/OMAP-L138 EVM
DA850/OMAP-L138 EVM has a RMII Ethernet PHY on the UI daughter card. The PHY
is enabled by proper programming of the IO Expander (TCA6416) ports. Also for
RMII PHY to work, the MDIO clock of MII PHY has to be disabled since both the
PHYs have the same address. This is done via the GPIO2[6] pin. This patch adds
support for RMII PHY.

This patch also adds a menuconfig option to select one or no peripheral
connected to expander. Currently, sub-options in this menu are RMII and no
peripheral.This menuconfig option is similar to the one present for UI card on
DA830/OMAP-L137 EVM.

Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:30 -08:00
Chaithrika U S
75e2ea643f davinci: DA850/OMAP-L138 EVM expander setup and UI card detection
DA850/OMAP-L138 EVM can be connected to an UI card which has various
peripherals on it.The UI card has TCA6416 expander which can be probed
to check whether the UI card is connected or not. If the UI card is
connected, setup NOR and NAND devices. This is done via the expander
setup callback.

Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:30 -08:00
Sergei Shtylyov
789a785ee4 davinci: DA8xx: rename 'psc_ctlr' field into 'gpsc'
Replace badly chosen 'psc_ctlr' name of the 'struct clk' field (PSC already
means "Power and Sleep Controller", so the '_ctlr' postfix makes the name
tautological) with technically correct 'gpsc' (Global PSC -- which contains
all the module registers).

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:30 -08:00
Sekhar Nori
a9eb1f675c davinci: DA850/OMAP-L138 EVM: add support for TPS65070 PMIC
This patch adds support for using the TPS65070 PMIC found
on the DA850/OMAP-L138 EVM.

It defines the power rail consumer mapping and registers the
the I2C based PMIC as a board device.

The power rail constraints are derived from the maxmimum and
minimum recommended operating condition values of the respective
consumers derived from section 5.2 of the OMAP-L138 datasheet.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:30 -08:00
Sekhar Nori
09dc2d4521 davinci: DA850/OMAP-L138 EVM: register for CPUFreq support
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:29 -08:00
Sekhar Nori
35f9acd8bd davinci: DA850/OMAP-L138: add voltage regulation support
This patch adds support for regulating the CVDD voltage for the
DA850/OMAP-L138 platform.

The CVDD min and max values for each OPP have been obtained from
section 5.2 "Recommended Operating Conditions" of SPRS586

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:29 -08:00
Sekhar Nori
683b1e1f0e davinci: DA850/OMAP-L138: add frequency scaling support
Adds basic frequency scaling support for DA850/OMAP-L138.

Currently, frequency scaling only on PLL0 is supported. No scaling of PLL1
as yet.

Peripherals like MMC/SD which have a clock input synchronous with
ARM clock will not work well since the clock will change behind their backs.
Support for notification to such devices to adjust themselves to the
new frequency will be added in later patches. Current defconfigs keep
CPUFreq disabled so it will not affect normal operation.

The OPP defintions assume clock input of 24MHz to the SoC. This is inline
with hardcoding of input frequency in the <soc>.c files. At some point
this will need to move into board dependent code as new boards appear with
a different reference clock.

Tested on OMAP-L138 EVM with ondemand governer and a shell script to
vary processor load.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:29 -08:00
Sekhar Nori
6601b8030d davinci: add generic CPUFreq driver for DaVinci
Adds a basic CPUFreq driver for DaVinci devices registering with the
kernel CPUFreq infrastructure.

Support is added for both frequency and voltage regulation.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:28 -08:00
Kevin Hilman
a75fd514f4 davinci: da830 EVM: remove #include <mach/gpio.h>
All that is needed is the existing #include <linux/gpio.h>

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:28 -08:00
Kevin Hilman
f2024a9969 davinci: da830: add support for new silicon revisions
Newer revs of da830 silicon have different 'variant' field of the JTAG
id register.  Current code only supports rev 1.0 silicon.

This patch adds support for rev1.1 and rev2.0 silicon and updates
the 'name' strings to add a '-' between 'omap' & 'l137' to have
consistent naming with da850/omap-l138.

From Mark Grosen <mgrosen@ti.com>:

"There are currently three silicon revisions for OMAPL137. The JTAG IDs
 (DEVIDR register contents) for each silicon revision are shown below:

 0x0B7D F02F for silicon revision 1.0
 0x8B7D F02F for silicon revision 1.1
 0x9B7D F02F for silicon revision 2.0

 Corresponding errata documentation will be available in the next few
 weeks on the ti.com website."

Reported-by: Nick Thompson <Nick.Thompson@gefanuc.com>
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:28 -08:00
Kevin Hilman
6af6564db8 davinci: da830 EVM: make machine name string consistent with da850
The machine name string shows up in /proc/cpuinfo under 'Hardware' and
can be used by userspace apps.  Make the format consistent with the
DA850/OMAP-l138 EVM by adding the '-' between OMAP and L137.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:27 -08:00
Sergei Shtylyov
0e9a3ddc91 davinci: DA830 EVM: OHCI platform code
On this board the OHCI port's power control and over-current signals from
TPS2065 power switch are connected via GPIO1[15] and GPIO2[1] respectively,
so we can implement the DA8xx OHCI glue layer's hooks for overriding the
root hub port's power and over-current status bits.

We also have to properly set up the clocking mode in the CFGCHIP2 register,
so that internal 24 MHz reference clock is fed to the USB 2.0 (MUSB) PHY and
its output is used to clock the USB 1.1 (OHCI) PHY...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:27 -08:00
Sergei Shtylyov
e5d3d252d5 davinci: DA8xx: OHCI platform device
Add the function to register the OHCI platform device, given the root hub
related platform data passed from the board  specific code.  The platfrom
data provide for overriding the OHCI port power and over-current bits at
the board level.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:27 -08:00
Sergei Shtylyov
371b53e025 davinci: DA8xx: CFGCHIP2 register definitions
These are needed by the MUSB and OHCI glue layers...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:26 -08:00
Sandeep Paulraj
134ce221b0 DaVinci: EDMA: Updating terminlogy in EDMA driver
The patch itself does not change the functionality of
any existing code. PARAM entries in the present GIT kernel
are referred to as slots. New API's being added to the
EDMA driver were referring to these PARAM entries as
"params". This patch updates the terminolgy used in the
EDMA driver.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:26 -08:00
Sandeep Paulraj
cc93fc3f34 DaVinci: EDMA: Fix Bug while obtaining contiguous params
The reserve_contiguous_params function is used to reserve
a set of contiguous PARAMs. If we do not find a complete
set of contiguous PARAMs, the functions still has to free
every PARAM that it found to be free in the process of finding a
complete set and thus marked as "in use".
This patch mainly deals with correctly handling the
freeing of PARAMs.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:26 -08:00
Sneha Narnakaje
dc4c05a513 davinci: DM365: Update NAND driver platform data
This patch updates the NAND driver platform data to use 4-bit ECC and the
ECC_HW/ECC_HW_OOB_FIRST modes.

Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:25 -08:00
Sneha Narnakaje
74c987a0d9 davinci: DM355: Update NAND driver platform data
This patch updates the NAND driver platform data to use 4-bit ECC and the
ECC_HW/ECC_HW_OOB_FIRST modes.

Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:24 -08:00
Sandeep Paulraj
6b0cf4e93c DaVinci: EDMA: Fix Bug in edma_alloc_cont_slots API
The edma_alloc_cont_slots API is used for obtaining a set of
contiguous slots. When we use the "_ANY" option with this
API, by definition of this option it is suppossed to start
looking for a set of contiguous slots starting from slot 64 for
DaVinci SOC's and 32 for DA8xx SOC's. This has been explained in
the API description in the driver itself. So when we use the
"_ANY" option with this API, the slot number passed as
an argument should be a "don't care".
This patch takes care of this condition mentioned above.
When checking to see if the starting slot is a valid number,
it checks to make sure that the "_ANY" option is not used.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:24 -08:00
Sandeep Paulraj
51c99e0498 DaVinci: EDMA: Fix bug in edma_free_cont_slots API
In the edma_free_cont_slots API, the variable slot was being modified
and then used in the for loop.
This results in incorrect behaviour when the API is used.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:24 -08:00
Sudhakar Rajashekhara
7761ef6793 davinci: Correct the GPIO number for LCD panel power
On the latest DA850/OMAP-L138 EVM (Beta) the GPIO pin
number of LCD panel power has changed. This patch takes
care of this change. Software will support only Beta
versions of DA850/OMAP-L138 EVM.

In the process, add the missing entry for data pin 0
and remove the GPIO specific pins from da850_lcdcntl_pins
structure. EVM specific muxing for LCD is being done in the
board file now.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:23 -08:00
Mark A. Greer
c51df70b1e davinci: Add RTC support for DA8xx/OMAP-L13x SoC's
Add RTC support for the da830/omap-l137 and da850/omap-l138
SoC's by leveraging existing the rtc-omap driver.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:23 -08:00
Steve Chen
13e1f0440e davinci: Add LCD Graphics support for DA830/OMAP-L137 EVM
Add graphics support for the Sharp LCD035Q3DG01 graphical
LCD that's on the User Interface (UI) daughter card of the
DA830/OMAP-L137 EVM.

The LCD shares EMIFA lines with the NAND and NOR devices that
are also on the UI card so those lines are shared via a couple
of muxes.  The muxes are controlled by the 'MUX_MODE' line on
the UI card.  The 'MUX_MODE' line is controlled by pin P6 of
a pcf8574 i2c expander that's at i2c address 0x3f on UI card.
The i2c expander is controlled using the gpio infrastructure
from the board code using the 'setup()' and 'teardown()'
routines.

Signed-off-by: Steve Chen <schen@mvista.com>
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:23 -08:00
Mark A. Greer
b9e6342b2b davinci: Add support for Sharp LCD035Q3DG01 graphical LCD
Add support for the Sharp LCD035Q3DG01 graphical LCD.  This
requires a minor interface change to da8xx_register_lcdc()
so that the board code can pass in the platform_data which
describes the lcd controller that's to be used.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:22 -08:00
David A. Griego
2eb30c81ce davinci: Add MMC/SD support for DA830/OMAP-L137 EVM
Add pinmux settings, etc. to enable the MMC/SC hardware.

Signed-off-by: David A. Griego <dgriego@mvista.com>
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:22 -08:00
Hemant Pedanekar
f63dd12da2 davinci: dm646x: Add support for 3.x silicon revision
DM6467 silicon revisions 3.x have variant field in JTAGID register as '1'.
This path adds entry for the same in dm646x_ids to be able to boot on boards
with 3.x revision chips.

Also modifies name for 'variant=0' (revisions 1.0, 1.1).

Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:22 -08:00
Sekhar Nori
5d36a3321b davinci: DA850/OMAP-L138: allow async3 source to be changed
The patch allows Async3 clock source to be selected between PLL1 SYSCLK2
and PLL0 SYSCLK2.

Having Async3 source from PLL1 SYSCLK2 allows peripherals on that
domain to remain unaffected by frequency scaling on PLL0.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:21 -08:00
Sekhar Nori
b82a51e8ce davinci: support re-parenting a clock in the clock framework
The clk_set_parent() API is implemented to enable re-parenting
clocks in the clock tree.

This is useful in DVFS and helps by shifting clocks to an asynchronous
domain where supported by hardware

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:21 -08:00
Sekhar Nori
d6a61563f9 davinci: support changing the clock rate in clock framework
clk_round_rate, clk_set_rate have been updated to handle dynamic
frequency changes.

The motivation behind the changes is to support dynamic CPU frequency
change.

davinci_set_pllrate() changes the PLL rate of a given PLL. This function
has been presented as a generic function though it has been tested only
on OMAP-L138 EVM. No other currently available DaVinci device will probably
use this function, but any future device specific changes will hopefully be
small enough to get taken care using a cpu_is_xxx() macro.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:20 -08:00
Sekhar Nori
de381a91f5 davinci: make clock rate re-calculation easy
Make clock rate recalculation easy by having a re-calculate
function for each clock.

The existing functions for calculation of output rates of PLL
and PLL-derived sysclks have been convered to the new
re-calculate API.

A new function is introduced to take care of rate
(re)calculation for leaf clocks.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:20 -08:00
Sekhar Nori
f02bf3b396 davinci: enable easy top down traversal of clock tree
Achieve easy top down traversal of clock tree by keeping
track of each clock's list of children.

This is useful in supporting DVFS where clock rates of
all children need to be updated in an efficient manner.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:19 -08:00
Sekhar Nori
cd87444802 davinci: DA8XX/OMAP-L1XX: JTAG ID register should offset from SYSCFG base
This makes it clear that JTAG ID register is part of the
SYSCFG module

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:19 -08:00
Sekhar Nori
6a28adef21 davinci: DA8XX/OMAP-L1XX: Avoid use of IO_ADDRESS for SYSCFG module
Avoid use of IO_ADDRESS() for SYSCFG module by doing an ioremap() instead.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:19 -08:00
Sekhar Nori
3c60a66de6 davinci: DA8XX/OMAP-L1XX: It's SYSCFG not BOOT_CFG
Rename the DA8XX_BOOT_CFG_BASE macro to get it in line
with the public documentation for these parts.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:19 -08:00
Mark A. Greer
32bf078caf davinci: Add DA830/OMAP-L137 EVM specific pinmux setting for McASP1
The DA830/OMAP-L137 EVM cannot use the default pinmux setup for McASP1
so put the correct settings in the board file for that platform.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:18 -08:00
Mark A. Greer
b8864aa4ab davinci: Change DA8xx/OMAP-L13x McASP registration routine name
For consistency with existing code, change the name of
da8xx_init_mcasp() to da8xx_register_mcasp().

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:18 -08:00
Mark A. Greer
31f53cf391 davinci: Move DA8xx/OMAP-L13x emac register routine
Some mcasp code was inserted between the emac resource setup
and the related register routine that registers the emac.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:18 -08:00
Miguel Aguilar
e9ab3214a8 Davinci: DM365: Add platform device for McBSP
1) Registers the platform device for McBSP on dm365.
2) Add platform data to DM365 EVM board file.
3) Set i2c address for audio codec at DM365 EVM board file.

Signed-off-by: Miguel Aguilar <miguel.aguilar@ridgerun.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:17 -08:00
Sandeep Paulraj
ed16067205 DaVinci: DM365: Correct USB parent clock
The parent clock for the USB source clock is actually PLL1 aux clock,
not PLL2 sysclk1.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:17 -08:00
Phaneendra Kumar
eb5ba378bc DaVinci: DM365: SDIO interrupt resource correction
This patch fixes a typo/bug in the DM365 SDIO interrupt assignment

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-25 10:21:16 -08:00
Tejun Heo
28b4e0d86a x86: Rename global percpu symbol dr7 to cpu_dr7
Percpu symbols now occupy the same namespace as other global
symbols and as such short global symbols without subsystem
prefix tend to collide with local variables.  dr7 percpu
variable used by x86 was hit by this. Rename it to cpu_dr7.

The rename also makes it more consistent with its fellow
cpu_debugreg percpu variable.

Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Christoph Lameter <cl@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>,
Cc: Andrew Morton <akpm@linux-foundation.org>
LKML-Reference: <20091125115856.GA17856@elte.hu>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
2009-11-25 14:30:04 +01:00
FUJITA Tomonori
273bee27fa x86: Fix iommu=soft boot option
iommu=soft boot option forces the kernel to use swiotlb.

( This has the side-effect of enabling the swiotlb over the
  GART if this boot option is provided. This is the desired
  behavior of the swiotlb boot option and works like that
  for all other hw-IOMMU drivers. )

Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: yinghai@kernel.org
LKML-Reference: <20091125084611O.fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-25 10:12:51 +01:00
Graf Yang
aa23531ce5 Blackfin: fix SMP build error in start_thread()
Commit d5ce528c8e (Blackfin: convert irq/process to asm-generic)
incorrectly merged the smp and non-smp cases of start_thread() causing the
L1 stack to be setup on the SMP port instead of the UP port.

Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25 02:38:01 -05:00
Roel Kluin
05bad36ce7 Blackfin: fix memset in smp_send_reschedule() and -stop()
To set zeroes the sizeof the struct should be used rather
than sizeof the pointer, kzalloc does that.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25 02:35:45 -05:00
Jie Zhang
46b60faf8c Blackfin: fix typo in ptrace poking
Commit c014e15a2f (Blackfin: convert ptrace to new memory functions)
introduced a copy & paste typo in the ptrace poke data/text handling.  The
access_process_vm() function call was telling it to read instead of write.

Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25 02:35:43 -05:00
Mike Frysinger
a2ca78cee1 Blackfin: check for anomaly 05000475
Parts that have on-chip L2 SRAM cannot safely utilize writeback caching
mode, so reject any attempts to use it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25 02:35:41 -05:00
Mike Frysinger
f99e8c1d0f Blackfin: work around testset anomaly 05000477
Ironically, the atomic testset instruction cannot be interrupted else it
will produce incorrect results.  So disable interrupts to help it out.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25 02:35:39 -05:00
Mike Frysinger
af5d7fc7e4 Blackfin: update anomaly lists
Add some recently documented anomalies (473, 474, 475, 477).  Also stick
a "do not edit" notice in here so people know these are copies of some
master version.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25 02:35:37 -05:00
André Goddard Rosa
7bae2c4898 Blackfin: fix cache Kconfig typo
The Kconfig option is "BFIN_EXTMEM_WRITETHROUGH", not "..._WRITETROUGH".

Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25 02:35:35 -05:00
Michael Hennerich
865bddfbf7 Blackfin: fix suspend/resume failure with some on-chip ROMs
Some Blackfin on-chip ROMs utilize some MDMA channels during the suspend
and resume process, but don't clean up after themselves.  So manually
clear all DMA channels when resuming since no DMA could have been running
at this point in time.  Now Linux should be able to work regardless of any
laziness on the part of the on-chip ROM or boot loader.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-11-25 02:35:33 -05:00
Paul Mundt
6ba653830c sh: Fix up the FPU emulation build.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-25 12:07:31 +09:00
Lin Ming
2263576cfc ACPICA: Add post-order callback to acpi_walk_namespace
The existing interface only has a pre-order callback. This change
adds an additional parameter for a post-order callback which will
be more useful for bus scans. ACPICA BZ 779.

Also update the external calls to acpi_walk_namespace.

http://www.acpica.org/bugzilla/show_bug.cgi?id=779

Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2009-11-24 21:31:10 -05:00
Bjorn Helgaas
f6e1d8cc38 x86/PCI: MMCONFIG: add lookup function
This patch factors out the search for an MMCONFIG region, which was
previously implemented in both mmconfig_32 and mmconfig_64.  No functional
change.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:30:36 -08:00
Bjorn Helgaas
8c57786ad3 x86/PCI: MMCONFIG: clean up printks
No functional change; just tidy up printks and make them more consistent
with the rest of PCI.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:30:30 -08:00
Bjorn Helgaas
ba2afbabfc x86/PCI: MMCONFIG: add pci_mmconfig_remove() to remove MMCONFIG region
This is only used internally now, but eventually will be used in the
hot-remove path to remove the MMCONFIG region associated with a host bridge.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:30:24 -08:00
Bjorn Helgaas
ff097ddd4a x86/PCI: MMCONFIG: manage pci_mmcfg_region as a list, not a table
This changes pci_mmcfg_region from a table to a list, to make it easier
to add and remove MMCONFIG regions for PCI host bridge hotplug.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:30:14 -08:00
Bjorn Helgaas
987c367b4e x86/PCI: MMCONFIG: remove typeof so we can use a list
This replaces "typeof(pci_mmcfg_config[0])" with the actual type because
I plan to convert pci_mmcfg_config to a list, and then "pci_mmcfg_config[0]"
won't mean anything.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:30:08 -08:00
Bjorn Helgaas
3f0f550392 x86/PCI: MMCONFIG: add virtual address to struct pci_mmcfg_region
The virtual address is only used for x86_64, but it's so much simpler
to manage it as part of the pci_mmcfg_region that I think it's worth
wasting a pointer per MMCONFIG region on x86_32.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:30:01 -08:00
Bjorn Helgaas
2f2a8b9c90 x86/PCI: MMCONFIG: trivial is_mmconf_reserved() interface simplification
Since pci_mmcfg_region contains the struct resource, no need to pass the
pci_mmcfg_region *and* the resource start/size.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:29:49 -08:00
Bjorn Helgaas
56ddf4d3cf x86/PCI: MMCONFIG: add resource to struct pci_mmcfg_region
This patch adds a resource and corresponding name to the MMCONFIG
structure.  This makes allocation simpler (we can allocate the
resource and name at the same time we allocate the pci_mmcfg_region),
and gives us a way to hang onto the resource after inserting it.
This will be needed so we can release and free it when hot-removing
a host bridge.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:29:41 -08:00
Bjorn Helgaas
95cf1cf0c5 x86/PCI: MMCONFIG: use pointer to simplify pci_mmcfg_config[] structure access
No functional change, but simplifies a future patch to convert the table
to a list.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:29:34 -08:00
Bjorn Helgaas
d7e6b66fe8 x86/PCI: MMCONFIG: rename pci_mmcfg_region structure members
This only renames the struct pci_mmcfg_region members; no functional change.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:29:24 -08:00
Bjorn Helgaas
d215a9c8b4 x86/PCI: MMCONFIG: use a private structure rather than the ACPI MCFG one
This adds a struct pci_mmcfg_region with a little more information
than the struct acpi_mcfg_allocation used previously.  The acpi_mcfg
structure is defined by the spec, so we can't change it.

To begin with, struct pci_mmcfg_region is basically the same as the
ACPI MCFG version, but future patches will add more information.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:29:17 -08:00
Bjorn Helgaas
df5eb1d67e x86/PCI: MMCONFIG: add PCI_MMCFG_BUS_OFFSET() to factor common expression
This factors out the common "bus << 20" expression used when computing the
MMCONFIG address.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:29:11 -08:00
Bjorn Helgaas
f7ca698487 x86/PCI: MMCONFIG: reject MMCONFIG apertures at address zero
Since all MMCONFIG regions go through pci_mmconfig_add(), we can test the
address once there.  If the caller supplies an address of zero, we never
insert it in the pci_mmcfg_config[] table, so no need to test it elsewhere.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:29:03 -08:00
Bjorn Helgaas
463a5df175 x86/PCI: MMCONFIG: simplify tests for empty pci_mmcfg_config table
We never set pci_mmcfg_config unless we increment pci_mmcfg_config_num,
so there's no need to test both pci_mmcfg_config_num and pci_mmcfg_config.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:28:56 -08:00
Bjorn Helgaas
7da7d360ae x86/PCI: MMCONFIG: centralize MCFG structure management
This patch encapsulate pci_mmcfg_config[] updates.  All alloc/free is now
done in pci_mmconfig_add() and free_all_mcfg(), so all updates to
pci_mmcfg_config[] and pci_mmcfg_config_num are in those two functions.

This replaces the previous sequence of extend_mmcfg(), fill_one_mmcfg()
with the single pci_mmconfig_add() interface.  This interface is currently
static but will eventually be used in the host bridge hot-add path.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:28:51 -08:00
Bjorn Helgaas
d3578ef7aa x86/PCI: MMCONFIG: step through MCFG table, not pci_mmcfg_config[]
Step through the ACPI MCFG table, not pci_mmcfg_config[].  No functional
change, but simplifies future patches that encapsulate pci_mmcfg_config[].

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:28:43 -08:00
Bjorn Helgaas
e823d6ff58 x86/PCI: MMCONFIG: count MCFG structures with local variable
Use a local variable, not pci_mmcfg_config_num, to count MCFG entries.
No functional change, but simplifies future changes.

Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:28:37 -08:00
Bjorn Helgaas
5663b1b963 x86/PCI: MMCONFIG: remove unused definitions
Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:28:30 -08:00
Yinghai Lu
67f241f457 x86/pci: seperate x86_pci_rootbus_res_quirks from amd_bus.c
Those functions are used by intel_bus.c so seperate them to another file. and
make amd_bus a bit smaller.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:25:59 -08:00
Jiri Kosina
7b7a785942 PCI: fix comment typo in bus_numa.h
Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:25:20 -08:00
Alex Chiang
2ed7a806d8 x86/PCI: remove early PCI pr_debug statements
commit db635adc turned -DDEBUG for x86/pci on when CONFIG_PCI_DEBUG
is set. In general, I agree with that change.

However, it exposes a bunch of very low level PCI debugging in the
early x86 path, such as:

	0 reading 2 from a: ffff
	1 reading 2 from a: ffff
	2 reading 2 from a: ffff
	3 reading 2 from a: 300
	3 reading 2 from 0: 1002
	3 reading 2 from 2: 515e

These statements add a lot of noise to the boot and aren't likely to
be necessary even when handling random upstream bug reports.

[In contrast, statements such as these:

	pci 0000:02:04.0: found [14e4:164a] class 000200 header type 00
	pci 0000:02:04.0: reg 10: [mem 0xf8000000-0xf9ffffff 64bit]
	pci 0000:02:04.0: reg 30: [mem 0x00000000-0x0001ffff pref]

are indeed useful when remote debugging users' machines]

Remove the noisy printks and save electrons everywhere.

Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Alex Chiang <achiang@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-24 15:25:19 -08:00
Yinghai Lu
5bf65b9ba6 x86, mtrr: Fix sorting of mtrr after subtracting
In some cases we can coalesce MTRR entries after cleanup; this may
allow us to have more entries.  As such, introduce clean_sort_range to
to sort and coaelsce the MTRR entries.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4B0BB9A3.5020908@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-11-24 13:06:16 -08:00
Thomas Renninger
e2f74f355e [ACPI/CPUFREQ] Introduce bios_limit per cpu cpufreq sysfs interface
This interface is mainly intended (and implemented) for ACPI _PPC BIOS
frequency limitations, but other cpufreq drivers can also use it for
similar use-cases.

Why is this needed:

Currently it's not obvious why cpufreq got limited.
People see cpufreq/scaling_max_freq reduced, but this could have
happened by:
  - any userspace prog writing to scaling_max_freq
  - thermal limitations
  - hardware (_PPC in ACPI case) limitiations

Therefore export bios_limit (in kHz) to:
  - Point the user that it's the BIOS (broken or intended) which limits
    frequency
  - Export it as a sysfs interface for userspace progs.
    While this was a rarely used feature on laptops, there will appear
    more and more server implemenations providing "Green IT" features like
    allowing the service processor to limit the frequency. People want
    to know about HW/BIOS frequency limitations.

All ACPI P-state driven cpufreq drivers are covered with this patch:
  - powernow-k8
  - powernow-k7
  - acpi-cpufreq

Tested with a patched DSDT which limits the first two cores (_PPC returns 1)
via _PPC, exposed by bios_limit:
# echo 2200000 >cpu2/cpufreq/scaling_max_freq
# cat cpu*/cpufreq/scaling_max_freq
2600000
2600000
2200000
2200000
# #scaling_max_freq shows general user/thermal/BIOS limitations

# cat cpu*/cpufreq/bios_limit
2600000
2600000
2800000
2800000
# #bios_limit only shows the HW/BIOS limitation

CC: Pallipadi Venkatesh <venkatesh.pallipadi@intel.com>
CC: Len Brown <lenb@kernel.org>
CC: davej@codemonkey.org.uk
CC: linux@dominikbrodowski.net

Signed-off-by: Thomas Renninger <trenn@suse.de>
Signed-off-by: Dave Jones <davej@redhat.com>
2009-11-24 13:33:34 -05:00
Rusty Russell
1cce76c2ac [CPUFREQ] use an enum for speedstep processor identification
The "unsigned int processor" everywhere confused Rusty, leading to
breakage when he passed in smp_processor_id().

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Acked-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dave Jones <davej@redhat.com>
2009-11-24 13:33:34 -05:00
Krzysztof Helt
db2820dd54 [CPUFREQ] powernow-k6: set transition latency value so ondemand governor can be used
Set the transition latency to value smaller than CPUFREQ_ETERNAL so
governors other than "performance" work (like the "ondemand" one).

The value is found in "AMD PowerNow! Technology Platform Design Guide for
Embedded Processors" dated December 2000 (AMD doc #24267A). There is the
answer to one of FAQs on page 40 which states that suggested complete transition
period is 200 us.

Tested on K6-2+ CPU with K6-3 core (model 13, stepping 4).

Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2009-11-24 13:33:33 -05:00
Rusty Russell
b8cbe7e82e [CPUFREQ] cpumask: don't put a cpumask on the stack in x86...cpufreq/powernow-k8.c
It's still mugging the current process's cpumask, but as comment in
1ff6e97f1d says, it's not a trivial fix.

So, at least we can use a cpumask_var_t to do the Wrong Thing the Right Way :)

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
To: cpufreq@vger.kernel.org
Cc: Mark Langsdorf <mark.langsdorf@amd.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2009-11-24 13:33:33 -05:00
Harald Welte
d77b819745 [CPUFREQ] Enable ACPI PDC handshake for VIA/Centaur CPUs
In commit 0de51088e6, we introduced the
use of acpi-cpufreq on VIA/Centaur CPU's by removing a vendor check for
VENDOR_INTEL.  However, as it turns out, at least the Nano CPU's also
need the PDC (processor driver capabilities) handshake in order to
activate the methods required for acpi-cpufreq.

Since arch_acpi_processor_init_pdc() contains another vendor check for
Intel, the PDC is not initialized on VIA CPU's.  The resulting behavior
of a current mainline kernel on such systems is:  acpi-cpufreq
loads and it indicates CPU frequency changes.  However, the CPU stays at
a single frequency

This trivial patch ensures that init_intel_pdc() is called on Intel and
VIA/Centaur CPU's alike.

Signed-off-by: Harald Welte <HaraldWelte@viatech.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2009-11-24 13:33:32 -05:00
Stephane Eranian
1261a02a0c perf_events, x86: Fix validate_event bug
The validate_event() was failing on valid event combinations. The
function was assuming that if x86_schedule_event() returned 0, it
meant error. But x86_schedule_event() returns the counter index and
0 is a perfectly valid value. An error is returned if the function
returns a negative value.

Furthermore, validate_event() was also failing for event groups
because the event->pmu was not set until after
hw_perf_event_init().

Signed-off-by: Stephane Eranian <eranian@google.com>
Cc: peterz@infradead.org
Cc: paulus@samba.org
Cc: perfmon2-devel@lists.sourceforge.net
Cc: eranian@gmail.com
LKML-Reference: <4b0bdf36.1818d00a.07cc.25ae@mx.google.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
--
 arch/x86/kernel/cpu/perf_event.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
2009-11-24 19:23:48 +01:00
Russell King
26a26d3296 ARM: dma-mapping: switch ARMv7 DMA mappings to retain 'memory' attribute
On ARMv7, it is invalid to map the same physical address multiple times
with different memory types.  Since system RAM is already mapped as
'memory', subsequent remapping of it must retain this attribute.

However, DMA memory maps it as "strongly ordered".  Fix this by introducing
'pgprot_dmacoherent()' which provides the necessary page table bits for
DMA mappings.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
2009-11-24 17:41:36 +00:00
Russell King
acaac256b3 ARM: dma-mapping: get rid of setting/clearing the reserved page bit
It's unnecessary; x86 doesn't do it, and ALSA doesn't require it
anymore.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Greg Ungerer <gerg@uclinux.org>
2009-11-24 17:41:36 +00:00
Russell King
31ebf94435 ARM: dma-mapping: Factor out noMMU dma buffer allocation code
This entirely separates the DMA coherent buffer remapping code from
the allocation code, and gets rid of the duplicate copy in the !MMU
section.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Greg Ungerer <gerg@uclinux.org>
2009-11-24 17:41:35 +00:00
Russell King
ebd7a845fa ARM: dma-mapping: clean up coherent arch dma allocation
IXP23xx added support for dma_alloc_coherent() for DMA arches with an
exception in dma_alloc_coherent().  This is a subset of what goes on
in __dma_alloc(), and there is no reason why dma_alloc_writecombine()
should not be given the same treatment (except, maybe, that IXP23xx
doesn't use it.)

We can better deal with this by moving the arch_is_coherent() test
inside __dma_alloc() and killing the code duplication.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Greg Ungerer <gerg@uclinux.org>
2009-11-24 17:41:35 +00:00
Russell King
88c58f3b92 ARM: dma-mapping: move consistent_init into CONFIG_MMU section
No point wrapping the contents of this function with #ifdef CONFIG_MMU
when we can place it and the core_initcall() entirely within the
existing conditional block.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Greg Ungerer <gerg@uclinux.org>
2009-11-24 17:41:35 +00:00
Russell King
695ae0af5a ARM: dma-mapping: factor dma_free_coherent() common code
We effectively have three implementations of dma_free_coherent() mixed up
in the code; the incoherent MMU, coherent MMU and noMMU versions.

The coherent MMU and noMMU versions are actually functionally identical.
The incoherent MMU version is almost the same, but with the additional
step of unmapping the secondary mapping.

Separate out this additional step into __dma_free_remap() and simplify
the resulting dma_free_coherent() code.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Greg Ungerer <gerg@uclinux.org>
2009-11-24 17:41:35 +00:00
Russell King
04da56943b ARM: dma-mapping: fix nommu dma_alloc_coherent()
The nommu version of dma_alloc_coherent was using kmalloc/kfree to manage
the memory.  dma_alloc_coherent() is expected to work with a granularity
of a page, so this is wrong.  Fix it by using the helper functions now
provided.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Greg Ungerer <gerg@uclinux.org>
2009-11-24 17:41:34 +00:00
Russell King
3e82d012e9 ARM: dma-mapping: fix coherent arch dma_alloc_coherent()
The coherent architecture dma_alloc_coherent was using kmalloc/kfree to
manage the memory.  dma_alloc_coherent() is expected to work with a
granularity of a page, so this is wrong.  Fix it by using the helper
functions now provided.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Greg Ungerer <gerg@uclinux.org>
2009-11-24 17:41:34 +00:00
Russell King
7a9a32a953 ARM: dma-mapping: functions to allocate/free a coherent buffer
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Greg Ungerer <gerg@uclinux.org>
2009-11-24 17:41:34 +00:00
Russell King
13ccf3ad99 ARM: dma-mapping: split out vmregion code from dma coherent mapping code
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Greg Ungerer <gerg@uclinux.org>
2009-11-24 17:41:34 +00:00
Yinghai Lu
b24c2a925a x86: Move find_smp_config() earlier and avoid bootmem usage
Move the find_smp_config() call to before bootmem is initialized.
Use reserve_early() instead of reserve_bootmem() in it.

This simplifies the code, we only need to call find_smp_config()
once and can remove the now unneeded reserve parameter from
x86_init_mpparse::find_smp_config.

We thus also reduce x86's dependency on bootmem allocations.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4B0BB9F2.70907@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-24 12:10:51 +01:00
Marek Szyprowski
394168389c ARM: 5791/1: ARM: MM: use 64bytes of L1 cache on plat S5PC1xx
Samsung S5PC1xx SoCs are based on ARM Coretex8, which has 64 bytes of L1
cache line size. Enable proper handling of L1 cache on these SoCs.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-24 10:06:26 +00:00
Hubert Feurstein
43234b1ef6 ARM: 5790/1: ep93xx: add missing newline between file header and code
Just for the sake of consistency across the ep93xx-tree.

Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-24 10:04:17 +00:00
Hubert Feurstein
5b642b4def ARM: 5789/1: ep93xx: add missing file headers
Just for the sake of consistency across the ep93xx-tree.

Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-24 10:04:17 +00:00
Hartley Sweeten
12f56c6889 ARM: 5775/1: ep93xx: add keypad core support
Add the core support needed by the ep93xx matrix keypad driver.

The keypad driver unfortunately was merged early and the core
support is missing.  The clkdev support has been resolved and
is now merged.  This adds the platform device to the ep93xx
core and supplies the functions needed to acquire/free the gpio
pins and actually enable/disable the controller peripheral.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-24 10:04:16 +00:00
Russell King
d5b7d8c226 Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into devel-stable 2009-11-24 10:00:10 +00:00
Paul Mundt
0f09e197a3 sh: Apply the sleazy FPU changes for SH-2A FPU as well.
This plugs in the fpu_counter manipulation for the SH-2A side also.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-24 17:56:17 +09:00
Stuart Menefy
d3ea9fa0a5 sh: Minor optimisations to FPU handling
A number of small optimisations to FPU handling, in particular:

 - move the task USEDFPU flag from the thread_info flags field (which
   is accessed asynchronously to the thread) to a new status field,
   which is only accessed by the thread itself. This allows locking to
   be removed in most cases, or can be reduced to a preempt_lock().
   This mimics the i386 behaviour.

 - move the modification of regs->sr and thread_info->status flags out
   of save_fpu() to __unlazy_fpu(). This gives the compiler a better
   chance to optimise things, as well as making save_fpu() symmetrical
   with restore_fpu() and init_fpu().

 - implement prepare_to_copy(), so that when creating a thread, we can
   unlazy the FPU prior to copying the thread data structures.

Also make sure that the FPU is disabled while in the kernel, in
particular while booting, and for newly created kernel threads,

In a very artificial benchmark, the execution time for 2500000
context switches was reduced from 50 to 45 seconds.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-24 17:45:38 +09:00
Stuart Menefy
39ac11c160 sh: Improve performance of SH4 versions of copy/clear_user_highpage
The previous implementation of clear_user_highpage and copy_user_highpage
checked to see if there was a D-cache aliasing issue between the user
and kernel mappings of a page, but if there was they always did a
flush with writeback on the dirtied kernel alias.

However as we now have the ability to map a page into kernel space
with the same cache colour as the user mapping, there is no need to
write back this data.

Currently we also invalidate the kernel alias as a precaution, however
I'm not sure if this is actually required.

Also correct the definition of FIX_CMAP_END so that the mappings created
by kmap_coherent() are actually at the correct colour.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-24 17:13:35 +09:00
Sascha Hauer
4998f1a30c mxc: mx1/mx2 DMA: add a possibility to create an endless DMA transfer
This is useful for audio where we do not want to setup a new scatterlist
after playing 4GB of audio data. This would cause skips in the playback.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-24 08:40:14 +01:00
Sascha Hauer
74b2a70e34 i.MX31 clock: rename SSI clocks to driver name
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-24 08:39:58 +01:00
Sascha Hauer
654166d687 mxc: iomux v3: remove resource handling
The current model does not allow to put a pad into different modes
once a pins is allocated. Remove the resource handling.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-24 08:39:43 +01:00
Sascha Hauer
c6e7c0e20d mx3: Add SSI pins to iomux table
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-24 08:39:35 +01:00
Valentin Longchamp
d67d107586 mx31moboard: support for usbh1 and usbh2
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-24 08:37:50 +01:00
Valentin Longchamp
33c4d91928 mx31moboard: SPI corrections
Adds requirement for ADC on mc13783 and moves the spidev declaration
to marxbot file.

Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-24 08:36:00 +01:00
Paul Mundt
49fb2cd257 Merge branch 'master' into sh/st-integration 2009-11-24 16:32:11 +09:00
Stuart Menefy
dfc349402d sh: Optimised memset for SH4
Optimised version of memset for the SH4 which uses movca.l.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-24 16:28:43 +09:00
Valentin Longchamp
9e554540f8 mx31: pins used for mx31moboard USB
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-24 08:26:37 +01:00
Giuseppe CAVALLARO
a0458b07c1 sh: add sleazy FPU optimization
sh port of the sLeAZY-fpu feature currently implemented for some architectures
such us i386.

Right now the SH kernel has a 100% lazy fpu behaviour.
This is of course great for applications that have very sporadic or no FPU use.
However for very frequent FPU users...  you take an extra trap every context
switch.
The patch below adds a simple heuristic to this code: after 5 consecutive
context switches of FPU use, the lazy behavior is disabled and the context
gets restored every context switch.
After 256 switches, this is reset and the 100% lazy behavior is returned.

Tests with LMbench showed no regression.
I saw a little improvement due to the prefetching (~2%).

The tests below also show that, with this sLeazy patch, indeed,
the number of FPU exceptions is reduced.
To test this. I hacked the lat_ctx LMBench to use the FPU a little more.

   sLeasy implementation
   ===========================================
   switch_to calls            |  79326
   sleasy   calls             |  42577
   do_fpu_state_restore  calls|  59232
   restore_fpu   calls        |  59032

   Exceptions:  0x800 (FPU disabled  ): 16604

   100% Leazy (default implementation)
   ===========================================
   switch_to  calls            |  79690
   do_fpu_state_restore calls  |  53299
   restore_fpu  calls          |   53101

   Exceptions: 0x800 (FPU disabled  ):  53273

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-11-24 16:23:38 +09:00
Benjamin Herrenschmidt
1e43bee9c7 Merge commit 'origin/master' into next 2009-11-24 17:16:30 +11:00
Benjamin Herrenschmidt
7d6709a208 powerpc: Fix build of some FSL platforms
Commit 87ec0e98cf in kumar's next branch
broke one of my test configs since it looks like Anton forgot about
that mpc832x_rdb platform which still uses the old style probing for
the SPI stuff.

I'll let them do a cleaner fix that probably involves changing the
probing method and getting rid of the platform device but for now
this will do to fix it.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-24 17:00:27 +11:00
arnd@arndb.de
dad2f2fb0f powerpc: Fix wrong error code from ppc32 select syscall
This patch was submitted, discussed, and eventually Acked by everyone, yet
still isn't in the tree.  See:

http://patchwork.ozlabs.org/patch/1240/

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Cc: Arnd Bergmann <arnd@anrdb.de>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-24 17:00:26 +11:00
Becky Bruce
2d7cf3ef87 powerpc: Fix DEBUG_HIGHMEM build break from d451564669
Code was added to mm/higmem.c that depends on several
kmap types that powerpc does not support.  We add dummy
invalid definitions for KM_NMI, KM_NM_PTE, and KM_IRQ_PTE.

According to list discussion, this fix should not be needed
anymore starting with 2.6.33.  The code is commented to this
effect so hopefully we will remember to remove this.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-24 17:00:25 +11:00
FUJITA Tomonori
7c31629fd6 powerpc: Kill unused swiotlb variable
We can kill unused swiotlb variable.

Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-24 17:00:24 +11:00
Stephen Rothwell
c38c2044b2 powerpc: do not export pci_alloc/free_consistent
Since they are static inline functions.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-24 17:00:23 +11:00
Benjamin Herrenschmidt
a0592d42fe powerpc: kill the obsolete code under is_global_init()
The code under "if (is_global_init())" is bogus, and is_global_init()
itself is not right in mt case.

Contrary to what the comment says, nowadays force_sig_info() does kill
init even if the handler is SIG_DFL. Note that force_sig_info() clears
SIGNAL_UNKILLABLE exactly for this case.

Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-24 17:00:22 +11:00
Gautham R Shenoy
3aa565f53c powerpc/pseries: Add hooks to put the CPU into an appropriate offline state
When a CPU is offlined on POWER currently, we call rtas_stop_self() and hand
the CPU back to the resource pool. This path is used for DLPAR which will
cause a change in the LPAR configuration which will be visible outside.

This patch changes the default state a CPU is put into when it is offlined.
On platforms which support ceding the processor to the hypervisor with
latency hint specifier value, during a cpu offline operation,
instead of calling rtas_stop_self(), we cede the vCPU to the hypervisor
while passing a latency hint specifier value. The Hypervisor can use this hint
to provide better energy savings. Also, during the offline
operation, the control of the vCPU remains with the LPAR as oppposed to
returning it to the resource pool.

The patch achieves this by creating an infrastructure to set the
preferred_offline_state() which can be either
- CPU_STATE_OFFLINE: which is the current behaviour of calling
  rtas_stop_self()

- CPU_STATE_INACTIVE: which cedes the vCPU to the hypervisor with the latency
  hint specifier.

The codepath which wants to perform a DLPAR operation can set the
preferred_offline_state() of a CPU to CPU_STATE_OFFLINE before invoking
cpu_down().

The patch also provides a boot-time command line argument to disable/enable
CPU_STATE_INACTIVE.

Signed-off-by: Gautham R Shenoy <ego@in.ibm.com>
Signed-off-by: Nathan Fontenot <nfont@austin.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-24 14:33:04 +11:00
Gautham R Shenoy
69ddb57cbe powerpc/pseries: Add extended_cede_processor() helper function.
This patch provides an extended_cede_processor() helper function
which takes the cede latency hint as an argument. This hint is to be passed
on to the hypervisor to cede to the corresponding state on platforms
which support it.

Signed-off-by: Gautham R Shenoy <ego@in.ibm.com>
Signed-off-by: Arun R Bharadwaj <arun@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-24 14:33:03 +11:00
Anton Blanchard
d95cacc599 powerpc: Move ehea hcall definitions into hvcall.h
Move ehea hcall definitions into hvcall.h.

Signed-off-by: Anton Blanchard <anton@samba.org>
Acked-by: Thomas Klein <tklein@de.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-24 14:33:03 +11:00
Thomas Gleixner
b27df67248 powerpc: Fixup last users of irq_chip->typename
The typename member of struct irq_chip was kept for migration purposes
and is obsolete since more than 2 years. Fix up the leftovers.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev@ozlabs.org
Acked-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-24 14:32:45 +11:00
Thomas Gleixner
293cfa44c3 powerpc: Replace old style lock initializer
SPIN_LOCK_UNLOCKED is deprecated. Init the lock array at runtime
instead.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev@ozlabs.org
Tested-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-24 14:31:28 +11:00
Thomas Gleixner
3b03fecd12 powerpc: Use unlocked ioctl in nvram_64
The ioctl is only used for powermac systems and reads a partition
number from an array which is initialized at boot time way before the
nvram code is initialized. So it's safe to switch to unlocked_ioctl.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev@ozlabs.org
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-24 14:31:26 +11:00
roel kluin
17e3767561 powerpc/spufs: Fix test in spufs_switch_log_read()
size_t len cannot be less than 0.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Acked-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-24 14:31:25 +11:00
H. Peter Anvin
eb41c8be89 x86, platform: Change is_untracked_pat_range() to bool; cleanup init
- Change is_untracked_pat_range() to return bool.
- Clean up the initialization of is_untracked_pat_range() -- by default,
  we simply point it at is_ISA_range() directly.
- Move is_untracked_pat_range to the end of struct x86_platform, since
  it is the newest field.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Jack Steiner <steiner@sgi.com>
LKML-Reference: <20091119202341.GA4420@sgi.com>
2009-11-23 17:09:59 -08:00
H. Peter Anvin
65f116f5f1 x86: Change is_ISA_range() into an inline function
Change is_ISA_range() from a macro to an inline function.  This makes
it type safe, and also allows it to be assigned to a function pointer
if necessary.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
LKML-Reference: <20091119202341.GA4420@sgi.com>
2009-11-23 17:09:59 -08:00
H. Peter Anvin
8a27138924 x86, mm: is_untracked_pat_range() takes a normal semiclosed range
is_untracked_pat_range() -- like its components, is_ISA_range() and
is_GRU_range(), takes a normal semiclosed interval (>=, <) whereas the
PAT code called it as if it took a closed range (>=, <=).  Fix.

Although this is a bug, I believe it is non-manifest, simply because
none of the callers will call this with non-page-aligned addresses.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Suresh Siddha <suresh.b.siddha@intel.com>
LKML-Reference: <20091119202341.GA4420@sgi.com>
2009-11-23 17:09:59 -08:00
H. Peter Anvin
55a6ca2547 x86, mm: Call is_untracked_pat_range() rather than is_ISA_range()
Checkin fd12a0d69a made the PAT
untracked range a platform configurable, but missed on occurrence of
is_ISA_range() which still refers to PAT-untracked memory, and
therefore should be using the configurable.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: Jack Steiner <steiner@sgi.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
LKML-Reference: <20091119202341.GA4420@sgi.com>
2009-11-23 17:09:59 -08:00
David S. Miller
bffbc94a4d sparc64: Fix definition of VMEMMAP_SIZE.
This was the cause of various boot failures on V480, V880, etc.
systems.

Kernel image memory was being overwritten because the vmemmap[]
array was being sized to small.  So if you had physical memory
addresses past a certain point, the early bootup would spam
all over variables in the kernel data section.

The vmemmap mappings map page structs, not page struct pointers.
And that was the key thinko in the macro definition.

This was fixable thanks to the help, reports, and tireless patience
of Hermann Lauer.

Reported-by: Hermann Lauer <Hermann.Lauer@iwr.uni-heidelberg.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-23 16:38:56 -08:00
Benjamin Herrenschmidt
d67ebe72c9 Merge commit 'jwb/next' into next 2009-11-24 10:02:16 +11:00
Nelson Elhage
78d7530ac3 ARM: Clean up linker script using new linker script macros.
This patch is mostly a straightforward translation. The primary side
effect to the resulting vmlinux should be to increase the alignment on
the initramfs to the standard PAGE_SIZE from 32 bytes.

Signed-off-by: Nelson Elhage <nelhage@ksplice.com>
Signed-off-by: Tim Abbott <tabbott@ksplice.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-23 20:33:38 +00:00
Tim Abbott
2abc1c50b6 ARM: convert to use __HEAD and HEAD_TEXT macros.
This has the consequence of changing the section name used for head
code from ".text.head" to ".head.text".  Since this commit changes all
users in the architecture, this change should be harmless.

The .text.head output section is eliminated and the head text code is
included at the start of the .init output section.

Signed-off-by: Tim Abbott <tabbott@ksplice.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-23 20:33:34 +00:00
Borislav Petkov
27c13ecec4 x86, cpu: mv display_cacheinfo -> cpu_detect_cache_sizes
display_cacheinfo() doesn't display anything anymore and it is used to
detect CPU cache sizes. Rename it accordingly.

Signed-off-by: Borislav Petkov <petkovbb@gmail.com>
LKML-Reference: <20091121130145.GA31357@liondog.tnic>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-11-23 11:59:53 -08:00
Jack Steiner
fd12a0d69a x86: UV SGI: Don't track GRU space in PAT
GRU space is always mapped as WB in the page table. There is
no need to track the mappings in the PAT. This also eliminates
the "freeing invalid memtype" messages when the GRU space is
unmapped.

Signed-off-by: Jack Steiner <steiner@sgi.com>
LKML-Reference: <20091119202341.GA4420@sgi.com>
[ v2: fix build failure ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-23 19:47:42 +01:00
Dimitri Sivanich
581f202bcd x86: UV RTC: Always enable RTC clocksource
Always enable the RTC clocksource on UV systems.

Signed-off-by: Dimitri Sivanich <sivanich@sgi.com>
LKML-Reference: <20091120214826.GA20016@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-23 19:41:30 +01:00
Jan Beulich
0444c9bd0c x86: Tighten conditionals on MCE related statistics
irq_thermal_count is only being maintained when
X86_THERMAL_VECTOR, and both X86_THERMAL_VECTOR and
X86_MCE_THRESHOLD don't need extra wrapping in X86_MCE
conditionals.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Cc: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Cc: Yong Wang <yong.y.wang@intel.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Borislav Petkov <borislav.petkov@amd.com>
Cc: Arjan van de Ven <arjan@infradead.org>
LKML-Reference: <4B06AFA902000078000211F8@vpn.id2.novell.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-23 19:40:06 +01:00
Cliff Wickman
e38e2af1c5 x86: SGI UV: Fix BAU initialization
A memory mapped register that affects the SGI UV Broadcast
Assist Unit's interrupt handling may sometimes be unintialized.

Remove the condition on its initialization, as that condition
can be randomly satisfied by a hardware reset.

Signed-off-by: Cliff Wickman <cpw@sgi.com>
Cc: <stable@kernel.org>
LKML-Reference: <E1NBGB9-0005nU-Dp@eag09.americas.sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-23 19:12:50 +01:00
Jean PIHET
3336f4f08e ARM: 5793/1: ARM: Check put_user fail in do_signal when enable OABI_COMPAT
Using OABI, the call to put_user in do_signal can fail causing the
calling app to hang.

The solution is to check if put_user fails and force the app to
seg fault in that case.

Tested with multiple sleeping apps/threads (using the nanosleep syscall)
and suspend/resume.

Signed-off-by: janboe <janboe.ye at gmail.com>
Signed-off-by: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-23 17:28:23 +00:00
K.Prasad
ba6909b719 hw-breakpoint: Attribute authorship of hw-breakpoint related files
Attribute authorship to developers of hw-breakpoint related
files.

Signed-off-by: K.Prasad <prasad@linux.vnet.ibm.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
LKML-Reference: <20091123154713.GA5593@in.ibm.com>
[ v2: moved it to latest -tip ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-23 18:18:29 +01:00
Russell King
29cb8d0d24 ARM: dma-mapping: split dma_unmap_page() from dma_unmap_single()
We will need to treat dma_unmap_page() differently from dma_unmap_single()

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-By: Jamie Iles <jamie@jamieiles.com>
2009-11-23 12:53:55 +00:00
Russell King
ef1baed887 ARM: dma-mapping: provide dma_to_page()
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-By: Jamie Iles <jamie@jamieiles.com>
2009-11-23 12:53:54 +00:00
Russell King
1c4a4f48a1 ARM: dma-mapping: simplify page_to_dma() and __pfn_to_bus()
The non-highmem() and the __pfn_to_bus() based page_to_dma() both
compile to the same code, so its pointless having these two different
approaches.  Use the __pfn_to_bus() based version.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-By: Jamie Iles <jamie@jamieiles.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
2009-11-23 12:53:26 +00:00
Russell King
719301ff1c ARM: provide phys_to_page() to complement page_to_phys()
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-By: Jamie Iles <jamie@jamieiles.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
2009-11-23 12:53:20 +00:00
Jiri Kosina
68ee87164e crypto: ghash-clmulni-intel - Put proper .data section in place
Lbswap_mask, Lpoly and Ltwo_one should clearly belong to
.data section, not .text.

Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2009-11-23 20:19:47 +08:00
Huang Ying
564ec0ec05 crypto: ghash-clmulni-intel - Use gas macro for PCLMULQDQ-NI and PSHUFB
Old binutils do not support PCLMULQDQ-NI and PSHUFB, to make kernel
can be compiled by them, .byte code is used instead of assembly
instructions. But the readability and flexibility of raw .byte code is
not good.

So corresponding assembly instruction like gas macro is used instead.

Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2009-11-23 19:55:22 +08:00
Joerg Roedel
be83129771 x86/amd-iommu: attach devices to pre-allocated domains early
For some devices the ACPI table may define unity map
requirements which must me met when the IOMMU is enabled. So
we need to attach devices to their domains as early as
possible so that these mappings are in place when needed.
This patch assigns the domains right after they are
allocated. Otherwise this can result in I/O page faults
before a driver binds to a device and BIOS is still using
it.

Cc: stable@kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-23 12:54:17 +01:00
Huang Ying
b369e52123 crypto: aesni-intel - Use gas macro for AES-NI instructions
Old binutils do not support AES-NI instructions, to make kernel can be
compiled by them, .byte code is used instead of AES-NI assembly
instructions. But the readability and flexibility of raw .byte code is
not good.

So corresponding assembly instruction like gas macro is used instead.

Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2009-11-23 19:54:06 +08:00
Joerg Roedel
9f800de38b x86/amd-iommu: un__init iommu_setup_msi
This function may be called on the resume path and can not
be dropped after booting.

Cc: stable@kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-11-23 12:45:25 +01:00
Daniel Mack
52939c03e5 ARM: MX3: fix CPU revision number detection
The macro mx31_revision() used to take the global variable system_rev to
determine the CPU revision number. However, this number is expected to
be set by the bootloader and is usually zero (at least on my MX31 based
boards here). More than that, it is usually taken to identify the
board's revision, not the CPU's.

Fix that by reading the the CPU's SREV register instead.

Right now, mx31_read_cpu_rev() is called from mx31_clocks_init() which
is admittedly not a good place for it. However, we need to enable the
IIM clock first, and the clock code also has conditional code that
depends on mx31_revision() returning the right thing.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-23 11:51:18 +01:00
Daniel Mack
2cc326833f ARM: MX3: lilly1131: move MC13783 device registration
Register the MC13783 device in the module code.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-23 11:51:00 +01:00
Jan Beulich
0e7810be30 x86: Suppress stack overrun message for init_task
init_task doesn't get its stack end location set to
STACK_END_MAGIC, and hence the message is confusing
rather than helpful in this case.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
LKML-Reference: <4B06AEFE02000078000211F4@vpn.id2.novell.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-23 11:45:34 +01:00
Ingo Molnar
6e3d8330ae perf events: Do not generate function trace entries in perf code
Decreases perf overhead when function tracing is enabled,
by about 50%.

Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-23 10:19:20 +01:00
Yinghai Lu
d9c2d5ac6a x86, numa: Use near(er) online node instead of roundrobin for NUMA
CPU to node mapping is set via the following sequence:

 1. numa_init_array(): Set up roundrobin from cpu to online node

 2. init_cpu_to_node(): Set that according to apicid_to_node[]
			according to srat only handle the node that
			is online, and leave other cpu on node
			without ram (aka not online) to still
			roundrobin.

3. later call srat_detect_node for Intel/AMD, will use first_online
   node or nearby node.

Problem is that setup_per_cpu_areas() is not called between 2 and 3,
the per_cpu for cpu on node with ram is on different node, and could
put that on node with two hops away.

So try to optimize this and add find_near_online_node() and call
init_cpu_to_node().

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Tejun Heo <tj@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: David Rientjes <rientjes@google.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
LKML-Reference: <4B07A739.3030104@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-23 10:06:24 +01:00
Yinghai Lu
021428ad14 x86, numa, bootmem: Only free bootmem on NUMA failure path
In the NUMA bootmem setup failure path we freed nodedata_phys
incorrectly.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: David Rientjes <rientjes@google.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
LKML-Reference: <4B07A739.3030104@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-23 10:00:48 +01:00
Yinghai Lu
163d3866cf x86: apic: Print out SRAT table APIC id in hex
Make it consistent with APIC MADT print out,
for big systems APIC id in hex is more readable.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4B07A739.3030104@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-23 09:56:30 +01:00
Yinghai Lu
37ef2a3029 x86: Re-get cfg_new in case reuse/move irq_desc
When irq_desc is moved, we need to make sure to use the right cfg_new.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4B07A739.3030104@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-23 09:56:05 +01:00
Yinghai Lu
e670761f12 x86: apic: Remove not needed #ifdef
Suresh made dmar_table_init() already have that protection.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4B07A739.3030104@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-23 09:54:15 +01:00
Yinghai Lu
44280733e7 x86: Change crash kernel to reserve via reserve_early()
use find_e820_area()/reserve_early() instead.

-v2: address Eric's request, to restore original semantics.
     will fail, if the provided address can not be used.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Acked-by: Eric W. Biederman <ebiederm@xmission.com>
LKML-Reference: <4B09E2F9.7040403@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-23 09:09:23 +01:00
Kalle Valo
a24e61a9ce omap3: rx51: Add wl1251 wlan driver support
wl1251 is connected to the SPI bus in rx51, add support for this.

Signed-off-by: Kalle Valo <kalle.valo@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
Tero Kristo
2000655ee7 omap3: rx51: Add SDRAM init
This patch adds board specific SDRAM init for RX51. This patch is a
collaboration of work from following people:

Juha Yrjola: Original code
Lauri Leukkunen: Port to RX51
Tero Kristo: Support for multiple OPP:s, merge of patches
Samu Onkalo: Fixed SDRAM parameters according to specs
Kalle Jokiniemi: A fix for rounding error

Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Cc: Samu Onkalo <samu.p.onkalo@nokia.com>
Cc: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
Cc: Lauri Leukkunen <lauri.leukkunen@nokia.com>
Cc: Juha Yrjola <juha.yrjola@solidboot.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
Cory Maccarrone
58c54e156c omap1: Add default kernel configuration for Herald
This adds a new defconfig for the HTC Herald series of devices.

Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
Cory Maccarrone
9c2816f7bd omap1: Add board support and LCD for HTC Herald
This patch introduces support for the HTC Herald (T-Mobile
Wing, etc.) series of smart phones -- board support and LCD
panel settings.

Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
vikram pandita
1ced4532c0 omap: zoom2: update defconfig for LL_DEBUG_NONE
Update DEBUG_LL for zoom2 board as CONFIG_OMAP_LL_DEBUG_NONE

Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
vikram pandita
d516aad1c3 omap: zoom3: defconfig creation
Create zoom3 defconfig file

Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
vikram pandita
5f35fbe8b8 omap3: zoom: Introduce zoom3 board support
Zoom3 is the next version of Zoom2 board.
There has been a silicon update from zoom2 to zoom3.
        Zoom2 has OMAP34xx
        Zoom3 has OMAP3630 [1]
Zoom3 = OMAP3630 SOM board [2] + same zoom2 main board [3] + same debugboard

Zoom3 has a SDRAM part from Hynix
Zoom2 had SDRAM part from micron

Hynix memory timings are contributed by:
Chalhoub, Nicole and Bour, Vincent

Reuse the zoom2 files as much for zoom3, as at board level,
there is no change at all.

References: (courtesy Nishant Menon)
[1] OMAP3630
http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12836&contentId=52606

[2] SOM boards
http://logicpd.com/products/system-modules/texas-instruments-omap35x-som-lv

[3] Zoom2 boards
http://logicpd.com/products/development-kits/texas-instruments-zoom%E2%84%A2-omap34x-ii-mdp
OMAP3630:

Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Cc: Nicole Chalhoub <n-chalhoub@ti.com>
Cc: Vincent Bour <v-bour@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
vikram pandita
6b61a83b31 omap3: zoom: Drop i2c-1 speed to 2400
The I2C-1 bus frequency on zoom2/zoom3/sdp3630 should be 2.4 MHz.
The speed is limited by TWL5030/GAIA; a higher speed could lead to errors
on the interface.

The maximum I2C speed depends on the system clock for GAIA:
2.2 MHz (sys-clk = 19.2 MHz)
2.4 MHz (sys-clk = 26 MHz)
2.9 MHz (sys-clk = 38.4 MHz)

For Zoom2/Zoom3/SDP3630 the system clock is 26Mhz
and hence choose 2.4Mhz for I2C1 bus speed

Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
vikram pandita
62d0b336d4 omap3: zoom: rename zoom2 name to generic zoom
Replace zoom2 with zoom name in board-zoom-peripherals.c file
and board-zoom-debugboard.c. Create mach/board-zoom.h.

This file has functions reused for boards: Zoom2/Zoom3/sdp3630.
Hence have all functions commonly named as zoom

Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
vikram pandita
479f12c9e2 omap3: zoom: split board file for software reuse
Split zoom2 board file into a base board file and a board-zoom-peripherals.c
file. That way the same peripherals file can be reused for zoom3 and sdp3630
in addition to zoom2.

Also remove unused struct omap_board_config_kernel entry.

NOTE: Keep the twl4030_madc_platform_data and twl4030_platform_data
entries in board-zoom2.c to avoid merge conflicts with the pending
patches in MFD tree. These entries will be removed later as a fix.

Following list shows the commonality across the three platforms and hence the
case for software reuse:

Peripheral    zoom2    zoom3  sdp3630
---------------------------------------
Ethernet        smsc    smsc    smc
NOR             n/a     n/a     B
Onenand         n/a     n/a     B
HDMI            A       A       B (present on different i2c)
NAND            A       A       A (same nand)
SDRAM           A       A       A (same sdram)
Keypad          A       A       A (same twl)
Camera          A       A       A (same sensor can be mounted)
LCD Display     A       A       A (same wvga display)
OPPs            A       A       A (same chip feature)
Audio           A       A       A (same audio via twl5030)

Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
Sriram
562138a448 omap3evm: MIgrate to smsc911x ethernet driver
Migrate to smsc911x ethernet driver instead of smc911x driver.
The smsc911x ethernet driver supports NAPI and performs better
under heavy traffic. With the smc911x driver we were witnessing
very high iowait time for high IO load over NFS.

Signed-off-by: Sriramakrishnan <srk@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
Mike Rapoport
1a7ec135d8 omap3evm: Initialize vmmc and vmmc_aux regulators
Initialize vmmc and vmmc_aux regulators

Note that the omap3evm_twldata.vmmc1 and omap3evm_twldata.vsim
are set in omap3_evm_i2c_init() to avoid a merge conflict
with the MFD tree. These will be initialized in omap3evm_i2c_boardinfo
as a fix later on.

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
Ajay Kumar Gupta
e8e51d2920 omap3evm: ehci: Update EHCI support on OMAP3EVM (Rev >= E)
Added runtime programming for the differences in EHCI interface between
OMAP3EVM revisions (Rev >= E) and (Rev < E).

Changes:
	- EHCI PHY reset GPIO pin is 21 on Rev >= E while Rev < E
	  uses GPIO pin 135.
	- Rev >= E uses EHCI Vbus enable GPIO22 line.
	- Rev >= E uses GPIO61 to select EHCI port either on main board or
	  on Mistral Daughter Card (MDC). OMAP3EVM Rev < E doesn't have
	  EHCI port on main board.
	- Currently GPIO61 it programmed to enable EHCI port on main
	  board only.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
2009-11-22 10:24:33 -08:00
Ajay Kumar Gupta
db408023b8 omap3evm: Add board revision function
Added function to differentiate between the OMAP3EVM revisions. The
chip-id of the ethernet PHY is being used for this purpose.

Rev A to D : 0x01150000
Rev >= E   : 0x92200000

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
Anand Gadiyar
50a1f7bfea omap3: Update 3430SDP defconfig
The mainline merge of the 3430SDP support (commit 6fdc29e2)
seems to have messed up the 3430 defconfig completely.

Update the defconfig using a known good version
(SDP defconfig from v2.6.26-omap2 and current beagle defconfig)
as reference.

The image size is now 1.9 MB down from 2.4 MB earlier, and
the number of modules is 8, down from 203. Build time also
scales proportionally.

Other support (OneNAND, etc) can be enabled as needed.

Note that this patch intentionally does not update CONFIG_FB
related options to avoid merge conflicts with the pending
omap_dss2 patches.

Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
vikram pandita
6502401d81 omap3: defconfigs: remove SYSFS_DEPRECATED flag
Remove the SYSFS_DEPRECATED flag from OMAP3 board defconfigs
This is a deprecated feature no longer needed.

Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
Charulatha V
058af1ea98 omap: GPIO module enable/disable
This patch disables a GPIO module when all pins of a GPIO
module are inactive (clock gating forced at module level) and
enables the module when any gpio in the module is requested.

The module is enabled only when "mod_usage" indicates that no GPIO
in that  module is currently active and the GPIO being requested
is the 1st one to be active in that module.

Each module would be disabled in omap_gpio_free() API when all
GPIOs in a particular module becomes inactive. The module is
re-enabled in omap_gpio_request() API when a GPIO is requested
from the module that was previously disabled.

Since individual GPIO's bookkeeping is added in this patch
via "mod_usage", the same is used in omap_set_gpio_debounce()
& omap_set_gpio_debounce_time() APIs to ensure that the gpio being
used is actually "requested" prior to being used (Nishant Menon's
<nm@ti.comSuggestion)

GPIO module level details are specific to hardware and hence
introducing this patch in low level layer (plat-omap/gpio.c)

Signed-off-by: Charulatha V <charu@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
Felipe Balbi
edeae658b2 omap: Cleanup the coding style in id.c
Cleanup the coding style in id.c while avoiding unneeded switch()
statements.

Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
C A Subramaniam
5ed8d32ea3 omap: mailbox: OMAP4 Mailbox-driver Patch to support tasklet implementation
This patch uses a tasklet implementation for
sending mailbox messages.

Signed-off-by: C A Subramaniam <subramaniam.ca@ti.com>
Signed-off-by: Ramesh Gupta G <grgupta@ti.com>
Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
C A Subramaniam
5e68382592 omap: mailbox: OMAP4 Mailbox Patch to change the IRQ flag from IRQF_DISABLED to IRQF_SHARED
Currently, this facilitates both the tesla and ducati
sides to request for the same irq through an
omap_mbox_get() call.

Signed-off-by: C A Subramaniam <subramaniam.ca@ti.com>
Signed-off-by: Ramesh Gupta G <grgupta@ti.com>
Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
C A Subramaniam
5f00ec64a3 omap: mailbox: Adds code changes to support OMAP4 mailbox
This patch adds code changes in the mailbox driver module to
add support for OMAP4 mailbox.

Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
Signed-off-by: C A Subramaniam <subramaniam.ca@ti.com>
Signed-off-by: Ramesh Gupta G <grgupta@ti.com>
Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
Hiroshi DOYU
eb18858ebd omap: mailbox: Expose omap_mbox_enable()/disable_irq()
Expose omap_mbox_enable()/disable_irq()

Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
2009-11-22 10:24:33 -08:00
C A Subramaniam
b2b6362e6c omap: mailbox: remove unnecessary arg for omap_mbox_msg_send
Also removed from tx_data

Signed-off-by: C A Subramaniam <subramaniam.ca@ti.com>
Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
Hiroshi DOYU
2775e467ff omap: mailbox: remove disable_/enable_mbox_irq in isr
No need to handle it in isr, since irq won't happen during isr.

Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
Hiroshi DOYU
c7c158e57b omap: mailbox: remove class interface
It's not used at present.

Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
Hiroshi DOYU
bfe1f6acb0 omap: mailbox: remove sequence bit checking
Any protocol should be handled in the upper layer and mailbox driver
shouldn't care about the contents of messages.

Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
C A Subramaniam
454bf340c9 omap: mailbox: Add resources and mailbox register base address for OMAP4 mailbox
This patch adds resource information of mailbox driver for
OMAP4 mailbox module. Register base address also added

Signed-off-by: C A Subramaniam <subramaniam.ca@ti.com>
Signed-off-by: Ramesh Gupta G <grgupta@ti.com>
Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:33 -08:00
C A Subramaniam
59fdc6ebda omap: mailbox: Add build specific changes to support omap mailbox
This patch adds changes to the build related files of mailbox
driver

Signed-off-by: C A Subramaniam <subramaniam.ca@ti.com>
Signed-off-by: Ramesh Gupta G <grgupta@ti.com>
Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Julia Lawall
20e11c2d1c arch/arm/plat-omap: Drop an unnecessary NULL test
map_iovm_area is only called from a context where its second argument is
known not to be NULL, so drop the unnecessary test.  If new could be NULL,
the initialization of da should be moved below the test.

A simplified version of the semantic match that detects this problem is as
follows (http://coccinelle.lip6.fr/):

// <smpl>
@match exists@
expression x, E;
identifier fld;
@@

* x->fld
  ... when != \(x = E\|&x\)
* x == NULL
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2009-11-22 10:24:32 -08:00
Paul Walmsley
13a0322957 omap3: drop all IVA-related address base definitions
All of the OMAP3 IVA physical address macros in
plat-omap/include/plat/omap34xx.h are wrong[1]:

OMAP34XX_IVA_INTC_BASE: The IVA interrupt controller does not appear
to be accessible from the L3 interconnect, and in any case is
definitely not at 0x40000000; the latter address appears to be the
internal IVA physical address base for the OMAP2420's interrupt control[2].

OMAP34XX_DSP_BASE: The section of L3 physical address space mapped to
the IVA starts at 0x5c000000, not 0x58000000.

OMAP34XX_DSP_MEM_BASE: It's not clear what this refers to, but it's not
in the L3 IVA address space.

OMAP34XX_DSP_IPI_BASE: The Intrusive Port Interface is a relic from
the OMAP2420 days and no longer applies to OMAP3.

OMAP34XX_DSP_MMU_BASE: The DSP MMU is mapped at 0x5d000000, not 0x5a000000.


Nothing that uses these can possibly be working, so drop them.  When
future code needs these, correct versions can be added in.

1. OMAP34xx Multimedia Device Silicon Revision 3.1.x Rev. W, Table 2-8:
   "L3 Interconnect View of the IVA2.2 Subsystem Memory Space."  p. 229.

2. OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (Rev. Q),
   section 2.2.4.1, "IVA Memory Space Seen by L3", p. 132.

3. ibid., section 4.3.11, "DSP IPI Overview", p. 200.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Kevin Hilman
cedf900d65 omap3: keep SoC features on the same line
When listing the various SoC features, print them on the same line.
So, instead of this

OMAP3430/3530 ES3.1
 - l2cache : Y
 - iva : Y
 - sgx : Y
 - neon : Y
 - isp : Y

you get this:

OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp )

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Nishanth Menon
05574bb27a omap3: move check_revision above check_features
omap3_check_revision() does not depend on omap3_check_features()
move this above so that we can add logic based on revision
detected in check_features.

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Mika Westerberg <mika.westerberg@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Sriram
839c978794 omap3: evm: make HSMMC driver built-in
For ease of use it is preferrable to build in HSMMC driver
rather than build it as kernel module. This patches updates
default configuration for omap3evm to reflect this change.

Signed-off-by: Sriramakrishnan <srk@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Madhu
4679232d3a omap3: HSMMC2 8-bit mux configuration
Add support for omap hsmmc2 8-bit mux configuration.

Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Madhu
555d503ff3 omap3630: Set omap3630 MMC1 I/O speed to 52Mhz
The speed ctrl bit for MMC I/O is part of CONTROL_PROG_IO1 register
in omap3630.This patch sets it up accordingly.

Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Madhu
41fd03d66e omap3630: Configure HSMMC1 to 4-bit
The HSMMC1 controller on omap3630 supprts only 4-bit mode. If cpu
is 3630 configure HSMMC1 wires to 4-bit.

Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Madhu
4596d14ad8 omap3630: Add HSMMC related checks
Change the cpu_is_omap3430() check to cpu_is_omap34xx() to allow HSMMC1/2
mux configuration for omap3630.

Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Peter Ujfalusi
eebfa9f239 omap: McBSP: Do not use extensive spin locks for dma_op_mode
The use of the spin lock, which supposed to protect the the
dma_op_mode causing "INFO: inconsistent lock state" on
playback start.
Remove the spin locks around the dma_op_mode, when it's
purpuse is to protect the dma_op_mode.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Felipe Contreras
a76e9a90e8 omap: iommu: reorganize
This way it's more object oriented and easier to see what is happening.
No functional changes.

Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Hiroshi DOYU
5934ba2dc0 omap: iovmm: remove cache flush operation
Cache flush operation is handled in the upper client layer and iovmm
modules doesn't have to care about it. This patch will improve some
performance with current camera isp driver.

Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Hiroshi DOYU
935e4739fc omap: iommu: avoid remapping if it's been mapped in MPU side
MPU side (v)-(p) mapping is necessary only if IOVMF_MMIO is set in
"flags".

Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Felipe Balbi
58a5491c93 omap: Add platform init code for EHCI driver
Add platform init code for EHCI driver.

Various fixes to the original patch by Ajay Kumar Gupta <ajay.gupta@ti.com>
and Anand Gadiyar <gadiyar@ti.com>.

Overo support added by Olof Johansson <olof@lixom.net>
Beagle support added by Koen Kooi <koen@beagleboard.org>
CM-T32 support added by Mike Rapoport <mike@compulab.co.il>

Signed-off-by: Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Koen Kooi <koen@beagleboard.org>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Anand Gadiyar
83720a8230 omap: update plat/usb.h to allow ehci driver to build
Add missing declarations to allow the recently introduced
ehci-omap driver to build on OMAP3

Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Cc: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-11-22 10:24:32 -08:00
Ranjith Lohithakshan
56190b609b omap3: AM35xx: Initialize omap_chip bits
AM35xx is functionally similar to OMAP3430 ES3.1 from a
powerdomain/clockdomain perspective. This patch initializes the
omap_chip bits on AM35xx for use by powerdomain and clockdomain code.

Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Sanjeev Premi
4cac601806 omap3: AM35xx: Runtime detection of the device
Add support to detect AM3505/AM3517 devices at runtime.
Also updates the CPU names printed during boot.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
vikram pandita
f18af0a847 omap3: 3630: update is_chip variable
3630 is getting treated like next rev of 3430
omap_chip.oc variable has to be updated for 3630 version

Otherwise the Core power domain is not getting registered.

This gets used in the registration of power domains in:
"arch/arm/mach-omap2/powerdomains34xx.h"
core_34xx_es3_1_pwrdm
OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1)

Core power doman will get registered for 3630 only when .oc is
populated correctly.

Tested on Zoom3(3630) board

Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Acked-by: Alexander Shishkin <virtuoso@slind.org>
Acked-by: Ari Kauppi <kauppi@papupata.org>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Nishanth Menon
2456a10fb3 omap3: Introduce OMAP3630
OMAP3630 is the latest in the family of OMAP3 devices
and among the changes it introduces are:

New OPP levels for new voltage and frequency levels. a bunch of
Bug fixes to various modules feature additions, notably with ISP,
sDMA etc.

Details about the chip is available here:
http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12836&contentId=52606

Strategy used:
Strategy to introduce this device into Linux was discussed here:
Ref: http://marc.info/?t=125343303400003&r=1&w=2

Two approaches were available:
a) Consider 3630 generation of devices as a new family of silicon
b) Consider 3630 as an offshoot of 3430 family of devices

As a common consensus, (b) seems to be more valid for 3630 as:
* There are changes which are easily handled by using "FEATURES"
  infrastructure.
  For details how to do this, see thread:
  http://marc.info/?t=125050998500001&r=1&w=2
* Most of existing 34xx infrastructure can be reused(almost 90%+)
	- so no ugly if (cpu_is_omap34xx() || cpu_is_omap36xx())
	  all over the place
	- lesser chance of bugs due to reuse of proven code flow
	- 36xx specific handling can still be done where required
	  within the existing infrastructure

NOTE:
* If additional 34xx series are added, OMAP3430_REV_ESXXXX can be
  added on top of the existing 3630 ones are renumbered

This patch was tested on SDP3430, boot tested on 3630 platform using
3430sdp defconfig

Signed-off-by: Madhusudhan Chikkature Rajashekar <madhu.cr@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Cc: Allen Pais <allen.pais@ti.com>
Cc: Anand Gadiyar <gadiyar@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Felipe Balbi <felipe.balbi@nokia.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Sanjeev Premi <premi@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Sergio Alberto Aguirre Rodriguez <saaguirre@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Sanjeev Premi
048f4bd760 omap3: Runtime detection of OMAP35x devices
Add runtime check for these OMAP35x variations
based on the detected Si features:
  OMAP3503, OMAP3515, OMAP3525 and OMA3530.

Also, delayed the call to pr_info() into actual
variant is detected in omap3_cpuinfo()

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Sanjeev Premi
8384ce0713 omap3: Runtime detection of Si features
The OMAP35x family has multiple variants differing
in the HW features. This patch detects these features
at runtime and prints information during the boot.

Since most of the code seemed repetitive, macros
have been used for readability.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Cory Maccarrone
45f780a061 omap1: omap_udc: Add clocking and disable vbus sense for omap7xx
The l3_ocpi_ck clock is needed on omap7xx processors for USB.
Additionally, bit 8 of the SOFT_REQ_REG needs to be enabled for
the usb_dc_ck on omap7xx, which is a different bit than that
of the omap16xx-defined clock of the same name.

I added a provision for the usb_dc_ck and l3_ocpi_ck clocks as
dc_clk and hhc_clk, respectively, for omap7xx CPUs.  Additionally,
I added a check in machine_without_vbus_sense for all omap7xx
devices, as presently I know of no omap7xx-based devices that
have vbus sense, and it made more sense to me to use a cpu check
here than to spell out each machine one at a time.  Finally, DMA
is disabled for omap7xx, as it causes problems with these chips.

Cc: linux-usb@vger.kernel.org
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Cory Maccarrone
490a566522 omap1: mmc: Add platform init for omap7xx
The MMC mux pins normally used by omap chips in devices.c
are different from what is needed by omap7xx chips.  This
change adds a conditional around the mux setup code to
enable the correct mux pins.

The omap730 and omap850 both use a different clock for the "fck"
clock of the MMC interface than other omap processors based on the
SOFT_REQ_REG, pin 12.  The "ick" clock is the same as that used
by other omap processors.

* Added the missing clock definition as mmc3_ck to clock.h
* Added the clock definition to omap_clks in clock.c
* Added CK_7XX to the mmci-omap.0 "ick" clock already in clock.c

With these changes, it is now possible to initialize and use MMC
cards with omap730 and omap850 devices.

Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
vikram pandita
d9f5007491 omap: introduce OMAP_LL_DEBUG_NONE DEBUG_LL config
Zoom2/Zoom3 kind of boards do not use omap uarts for console.
These use external debug board for console.

So these boards should not have "Uncompressing Kernel...."
log put on omap uarts.

By interoducing OMAP_LL_DEBUG_NONE option,
unnecessary writes to omap uarts is avoided.

In future, the DEBUG_LL interface will be enhanced
to use external debug board.

Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Alexander Shishkin
9d30b99f35 omap: Eliminate OMAP_MAX_NR_PORTS
Eliminate OMAP_MAX_NR_PORTS

Note that also the null terminator entry for omap1
serial_platform_data needs to be now removed to avoid
oopsing.

Note that mach-omap1 uses struct plat_serial8250_port
array, which requires a null terminator at the end,
and that's why we need to use ARRAY_SIZE - 1. This
is not needed on mach-omap2 as the array used is
struct omap_uart_state, and does not use a null
terminator.

Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-11-22 10:24:32 -08:00
Jani Nikula
f014ee320e ARM OMAP3: RX-51 board - add initialization of gpio keys
Initialize some of the RX-51 input GPIO lines as gpio keys. Enable gpio
keys as a module in rx51_defconfig.

Signed-off-by: Jani Nikula <ext-jani.1.nikula@nokia.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
2009-11-22 10:09:35 -08:00
Peter Ujfalusi
6df74efbb8 OMAP: Configure audio_mclk for twl4030-codec MFD
audio_mclk value is going to be handled by the
twl4030-codec MFD driver, configure the correct
value for boards, which is using the twl4030 audio.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-11-22 10:09:19 -08:00
Peter Ujfalusi
e86fa0b4a3 OMAP: Platform support for twl4030_codec MFD
Add needed platform data for the twl4030_codec MFD on boards,
where the audio part of the twl4030 codec is used.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-11-22 10:09:07 -08:00
Tony Lindgren
a76df42a67 Merge 7xx-iosplit-plat-merge with omap-fixes
Merge branch '7xx-iosplit-plat-merge' into omap-for-linus
2009-11-22 10:08:43 -08:00
Russell King
c8a79c3da1 Merge branch 'fix' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 2009-11-22 17:11:06 +00:00
Pavel Machek
81065518ed [ARM] pxa/spitz: fix compile regression on spitz
If CONFIG_AKITA is not set, spitz fails to compile. It worked ok in
rc5. Fix is one more ifdef...

Signed-off-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Stanislav Brabec <utx@penguin.cz>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-11-22 09:32:43 -06:00
Ingo Molnar
96200591a3 Merge branch 'tracing/hw-breakpoints' into perf/core
Conflicts:
	arch/x86/kernel/kprobes.c
	kernel/trace/Makefile

Merge reason: hw-breakpoints perf integration is looking
              good in testing and in reviews, plus conflicts
              are mounting up - so merge & resolve.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-21 14:07:23 +01:00
Masami Hiramatsu
6f5f67267d x86: insn decoder test checks objdump version
Check objdump version before using it for insn decoder build test,
because some older objdump can't decode AVX code correctly.

Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Randy Dunlap <rdunlap@xenotime.net>
Cc: Jim Keniston <jkenisto@us.ibm.com>
LKML-Reference: <20091120171314.6715.30390.stgit@dhcp-100-2-132.bos.redhat.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-11-20 23:01:04 -08:00
Masami Hiramatsu
80509e27e4 x86: Fix insn decoder test typos
Fix postest_verbose to posttest_verbose, and add posttest_64bit option
for CONFIG_64BIT != y, since old command just passed '-' instead
of '-n' when CONFIG_64BIT is not set.

Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Randy Dunlap <rdunlap@xenotime.net>
Cc: Jim Keniston <jkenisto@us.ibm.com>
LKML-Reference: <20091120171307.6715.66099.stgit@dhcp-100-2-132.bos.redhat.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-11-20 22:59:36 -08:00
Russell King
749f583f34 Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/xscaleiop into devel-stable 2009-11-20 23:53:11 +00:00
Kumar Gala
ab2f489294 powerpc/p4080: Add basic support for p4080ds platform
Add basic support for the P4080 DS reference board.  None of the data
path devices (ethernet, crypto, pme) are support at this time.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-20 16:45:38 -06:00
Martyn Welch
3bc265627a powerpc/86xx: Support for NVRAM on GE Fanuc's PPC9A
Add support for NVRAM on GE Fanuc's PPC9A.

Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-20 16:45:37 -06:00
Martyn Welch
9093067ad1 powerpc/86xx: Support for NVRAM on GE Fanuc's SBC310
Add support for NVRAM on GE Fanuc's SBC310.

Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-20 16:45:36 -06:00
Martyn Welch
0d81df8701 powerpc/86xx: Enable NVRAM on GE Fanuc's SBC610
This patch enables the NVRAM found on the GE Fanuc SBC610

Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-20 16:45:35 -06:00
Kumar Gala
a3f62bd2b2 powerpc/fsl: Add PCI device ids for new QoirQ chips
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-20 16:45:34 -06:00
Kumar Gala
8b27f0b61d powerpc/fsl-booke: Rework TLB CAM code
Re-write the code so its more standalone and fixed some issues:
* Bump'd # of CAM entries to 64 to support e500mc
* Make the code handle MAS7 properly
* Use pr_cont instead of creating a string as we go

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-20 16:45:33 -06:00
Kumar Gala
5753c082f6 powerpc/85xx: Kconfig cleanup
Introduce new FSL_SOC_BOOKE Kconfig to handle both 85xx and QorIQ
based chips.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-20 16:45:27 -06:00
Daniel Mack
68a31de302 [ARM] pxa/cpufreq: fix index assignments for end marker
I stumbled over two small things regarding the .index field assignment
in the dynamically created cpu frequency tables for pxa2xx and pxa3xx.

Even though that doesn't currently cause any problem, it should still be
fixed in case the logic in the CPUFREQ core changes.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2009-11-20 14:23:13 -06:00
Russell King
ef1a68848a Merge branch 'for-rmk' of git://github.com/at91linux/linux-2.6-at91 into devel-stable
Conflicts:
	arch/arm/mach-at91/Kconfig
2009-11-20 17:51:21 +00:00
Pavel Machek
5c43d49aec msm: Add memory map for HTC Dream
Add memory map to HTC Dream, so that boot can proceed further.

Signed-off-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2009-11-20 06:40:23 -08:00
Pavel Machek
348ee123a1 msm: add minimal board file for HTC Dream device
This is just enough to get the device booting and serial console
working.  Sufficient for debugging further MSM7k/Dream Support.
This will support HTC Dream / T-Mobile G1 / Android ADP1 (which
are all the same hardware, known as "trout" to the ARM machine
database).

Signed-off-by: Brian Swetland <swetland@google.com>
Reviewed-by: GeunSik Lim <geunsik.lim@samsung.com>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2009-11-20 06:40:19 -08:00
Pavel Machek
6339f6695f msm: make debugging UART (for DEBUG_LL) configurable
Provides options to select one of the three "lowspeed" UARTs
on MSM7k SoCs for DEBUG_LL output from the zImage decompressor
and kernel.

Signed-off-by: Brian Swetland <swetland@google.com>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2009-11-20 06:40:05 -08:00
Russell King
4ff1fa278b [ARM] kmap: fix build errors with DEBUG_HIGHMEM enabled
d451564 broke ARM by requiring KM_IRQ_PTE, KM_NMI and KM_NMI_PTE to
always be defined.  Solve this by providing invalid definitions for
these constants, but only if CONFIG_DEBUG_HIGHMEM is enabled.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-20 14:23:36 +00:00
Thomas Gleixner
746357d6a5 x86: Prevent GCC 4.4.x (pentium-mmx et al) function prologue wreckage
When the kernel is compiled with -pg for tracing GCC 4.4.x inserts
stack alignment of a function _before_ the mcount prologue if the
-march=pentium-mmx is set and -mtune=generic is not set. This breaks
the assumption of the function graph tracer which expects that the
mcount prologue

       push %ebp
       mov  %esp, %ebp

is the first stack operation in a function because it needs to modify
the function return address on the stack to trap into the tracer
before returning to the real caller.

The generated code is:

        push   %edi
        lea    0x8(%esp),%edi
        and    $0xfffffff0,%esp
        pushl  -0x4(%edi)
        push   %ebp
        mov    %esp,%ebp

so the tracer modifies the copy of the return address which is stored
after the stack alignment and therefor does not trap the return which
in turn breaks the call chain logic of the tracer and leads to a
kernel panic.

Aside of the fact that the generated code is horrible for no good
reason other -march -mtune options generate the expected:

        push   %ebp
        mov    %esp,%ebp
        and    $0xfffffff0,%esp

which does the same and keeps everything intact.

After some experimenting we found out that this problem is restricted
to gcc4.4.x and to the following -march settings:

i586, pentium, pentium-mmx, k6, k6-2, k6-3, winchip-c6, winchip2, c3,
geode

By adding -mtune=generic the code generator produces always the
expected code.

So forcing -mtune=generic when CONFIG_FUNCTION_GRAPH_TRACER=y is not
pretty, but at the moment the only way to prevent that the kernel
trips over gcc-shrooms induced code madness.

Most distro kernels have CONFIG_X86_GENERIC=y anyway which forces
-mtune=generic as well so it will not impact those.

References: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42109
	    http://lkml.org/lkml/2009/11/19/17

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
LKML-Reference: <alpine.LFD.2.00.0911200206570.24119@localhost.localdomain>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>,
Cc: Jeff Law <law@redhat.com>
Cc: gcc@gcc.gnu.org
Cc: David Daney <ddaney@caviumnetworks.com>
Cc: Andrew Haley <aph@redhat.com>
Cc: Richard Guenther <richard.guenther@gmail.com>
Cc: stable@kernel.org
2009-11-20 14:06:46 +01:00
Nicolas Ferre
985f37f827 AT91: add touchscreen support for at91sam9g45ekes
New at91sam9g45ekes board provides a LCD with resistive touchscreen.
This is the support of this feature by atmel_tsadcc driver. This also
sets up platform parameters to be passed to the driver.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
2009-11-20 00:55:38 -08:00
Nicolas Ferre
423c9b0dc3 AT91: add platform parameters for atmel_tsadcc in at91sam9rlek
Setup platform parameters in at91sam9rl-ek board to be passed to
atmel_tsadcc touchscreen.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
2009-11-20 00:55:29 -08:00
Masami Hiramatsu
ce64c62074 x86: Instruction decoder test should generate build warning
Since some instructions are not decoded correctly by older
versions of objdump, it may cause false positive error in insn
decoder posttest.

This changes build error of insn decoder test to build warning.

Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com>
Cc: systemtap <systemtap@sources.redhat.com>
Cc: DLE <dle-develop@lists.sourceforge.net>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Randy Dunlap <rdunlap@xenotime.net>
Cc: Jim Keniston <jkenisto@us.ibm.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
LKML-Reference: <20091116230631.5250.41579.stgit@harusame>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-19 21:40:13 +01:00
Daniel Mack
6d3e6601ba ARM: MX3: add NOR flash support via physmap mtd driver
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-19 17:11:02 +01:00
Daniel Mack
81057f3286 ARM: MX3: add support for GPIO LEDs on litekit db
The names are chosen to match the silkscreen.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-19 17:11:02 +01:00
Daniel Mack
a050c8e9b7 ARM: MX3: add USB functions for mx31litekit
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-19 17:11:01 +01:00
Daniel Mack
84677d114a ARM: MX3: add SPI devices for mx31lite
Some header files were reordered while I was at it.
The only device currently registered is the ATLAS PMIC (MC13783) chip.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-19 17:11:01 +01:00
Daniel Mack
364cd540f0 ARM: MX3: add MMC/SDHC support to mx31lite-db.c
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-19 17:11:01 +01:00
Daniel Mack
b7d91a62cb ARM: MX3: modularize 'mx31lite' code
This commit splits the support code for LogicPD's mx31lite hardware
into module and board specific parts.

This introduces a new mandatory coreparam called 'mx31lite_baseboard'
which specifies the base board support to use. For now, only the LiteKit
development board is supported, and developers of own boards are
encouraged to use that as reference.

The UART support moved to the board code.
Some comments were amended along the way.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-19 17:11:01 +01:00
Troy Kisky
1e224f322b ASoC: DaVinci: pcm, fix underrun by using sram
Fix underruns by using dma to copy 1st to sram
in a ping/pong buffer style and then copying from
the sram to the ASP. This also has the advantage
of tolerating very long interrupt latency on dma
completion.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-11-19 10:48:08 +00:00
Troy Kisky
0d6c977429 ASoC: DaVinci: i2s, reduce underruns by combining into 1 element
Allow the left and right 16 bit samples to be shifted out as 1
32 bit sample.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-11-19 10:47:38 +00:00
David S. Miller
3505d1a9fd Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
	drivers/net/sfc/sfe4001.c
	drivers/net/wireless/libertas/cmd.c
	drivers/staging/Kconfig
	drivers/staging/Makefile
	drivers/staging/rtl8187se/Kconfig
	drivers/staging/rtl8192e/Kconfig
2009-11-18 22:19:03 -08:00
Jan Beulich
350f8f5631 x86: Eliminate redundant/contradicting cache line size config options
Rather than having X86_L1_CACHE_BYTES and X86_L1_CACHE_SHIFT
(with inconsistent defaults), just having the latter suffices as
the former can be easily calculated from it.

To be consistent, also change X86_INTERNODE_CACHE_BYTES to
X86_INTERNODE_CACHE_SHIFT, and set it to 7 (128 bytes) for NUMA
to account for last level cache line size (which here matters
more than L1 cache line size).

Finally, make sure the default value for X86_L1_CACHE_SHIFT,
when X86_GENERIC is selected, is being seen before that for the
individual CPU model options (other than on x86-64, where
GENERIC_CPU is part of the choice construct, X86_GENERIC is a
separate option on ix86).

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Acked-by: Ravikiran Thirumalai <kiran@scalex86.org>
Acked-by: Nick Piggin <npiggin@suse.de>
LKML-Reference: <4AFD5710020000780001F8F0@vpn.id2.novell.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-11-19 04:58:34 +01:00
Linus Torvalds
66b00a7c93 Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq:
  [CPUFREQ] Fix stale cpufreq_cpu_governor pointer
  [CPUFREQ] Resolve time unit thinko in ondemand/conservative govs
  [CPUFREQ] speedstep-ich: fix error caused by 394122ab14
  [CPUFREQ] Fix use after free on governor restore
  [CPUFREQ] acpi-cpufreq: blacklist Intel 0f68: Fix HT detection and put in notification message
  [CPUFREQ] powernow-k8: Fix test in get_transition_latency()
  [CPUFREQ] longhaul: select Longhaul version 2 for capable CPUs
2009-11-18 18:49:49 -08:00
Linus Torvalds
d22966d067 Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
  OMAP: cs should be positive in gpmc_cs_free()
  omap: fix unlikely(x) < y
  omap3: clock: Fixed dpll3_m2x2 rate calculation
  omap3: clock: Fix the DPLL freqsel computations
  omap: Fix keymap for zoom2 according to matrix keypad framwork
2009-11-18 15:00:21 -08:00
Roel Kluin
e7fdc6052e OMAP: cs should be positive in gpmc_cs_free()
The index `cs' is signed, test whether it is negative before we release
gpmc_cs_mem[cs].

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2009-11-18 10:34:33 -08:00
Roel Kluin
d32b20fc7d omap: fix unlikely(x) < y
The closing parenthesis was not in the right location.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2009-11-18 10:33:41 -08:00
Eric W. Biederman
6d4561110a sysctl: Drop & in front of every proc_handler.
For consistency drop & in front of every proc_handler.  Explicity
taking the address is unnecessary and it prevents optimizations
like stubbing the proc_handlers to NULL.

Cc: Alexey Dobriyan <adobriyan@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Joe Perches <joe@perches.com>
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
2009-11-18 08:37:40 -08:00
Linus Torvalds
5cbb0601bf Merge branch 'sh/for-2.6.32' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh/for-2.6.32' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
  sh: Fixup last users of irq_chip->typename
  uio: pm_runtime_disable is needed if failed
2009-11-18 07:38:19 -08:00
Jassi Brar
acf1aef9ec ARM: S3C64XX: Defined PCM controller platform devices
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-11-18 13:35:05 +00:00
Jassi Brar
07e74c0ac8 ARM: S3C64XX: Added platform data header
Many SoCs have their I2S pins MUXed with other functions. So we need
to pass a callback for driver to configure the pins appropriately.
Hence, the need of platform data and this header.

As and when needed new callbacks and structure pointers maybe added to this
header.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-11-18 13:35:04 +00:00
Jassi Brar
93f85130e1 ARM: S3C64XX: Define PCM Controller base registers
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-11-18 13:35:04 +00:00
Thomas Gleixner
89a7183d08 sparc: Fixup last users of irq_chip->typename
The typename member of struct irq_chip was kept for migration purposes
and is obsolete since more than 2 years. Fix up the leftovers.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-18 05:09:59 -08:00
Thomas Gleixner
070e5c3f99 x86: vmiclock: Fix printk format
clockevents.mult became u32. Fix the printk format.
    
Pointed-out-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2009-11-18 12:31:06 +01:00
Thomas Gleixner
6dbfe5a57d x86: Fixup last users of irq_chip->typename
The typename member of struct irq_chip was kept for migration purposes
and is obsolete since more than 2 years. Fix up the leftovers.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2009-11-18 11:45:29 +01:00