The "cooling-min-level" and "cooling-max-level" properties are not
parsed by any part of the kernel currently and the max cooling state of
gpio-fan cooling device is found by referring to the
"gpio-fan,speed-map" instead.
Remove the unused properties from the gpio-fan node.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The "cooling-min-level" and "cooling-max-level" properties are not
parsed by any part of the kernel currently and the max cooling state of
gpio-fan cooling device is found by referring to the
"gpio-fan,speed-map" instead.
Remove the unused properties from the gpio-fan node.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The "cooling-min-level" and "cooling-max-level" properties are not
parsed by any part of the kernel currently and the max cooling state of
a CPU cooling device is found by referring to the cpufreq table instead.
Remove the unused properties from the CPU nodes.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
define the VGA and panel connectors in preparation for DRM.
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Merge tag 'armsoc-versatile-drm-dts' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt
Pull "DTS changes for RealView+Versatile" from Linus Walleij:
This augments the RealView and Versatile device trees to properly
define the VGA and panel connectors in preparation for DRM.
* tag 'armsoc-versatile-drm-dts' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: Augment panel setting for Versatile
ARM: dts: Add Versatile IB2 device tree
ARM: dts: Augment VGA connector bridge on Realview PBX
ARM: dts: Augment VGA connector bridge on Realview EB
ARM: dts: Augment VGA connector bridge on PB1176
ARM: dts: Augment VGA connector bridge on PB11MPcore
- Add registers clock for all the peripheral nodes that had been yet
converted for CP110 (Armada 7K/8K)
- Document URL for schematic for the EspressoBin (Armada 3720)
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Merge tag 'mvebu-dt64-4.17-2' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt64 for 4.17 (part 2)" from Gregory CLEMENT:
- Add registers clock for all the peripheral nodes that had been yet
converted for CP110 (Armada 7K/8K)
- Document URL for schematic for the EspressoBin (Armada 3720)
* tag 'mvebu-dt64-4.17-2' of git://git.infradead.org/linux-mvebu:
arm64: dts: armada-3720-espressobin: Document URL for schematic
ARM64: dts: marvell: armada-cp110: Add registers clock for the PCIe nodes
ARM64: dts: marvell: armada-cp110: Add registers clock for the NAND node
ARM64: dts: marvell: armada-cp110: Add registers clock for the crypto node
ARM64: dts: marvell: armada-cp110: Add registers clock for the trng node
ARM64: dts: marvell: armada-cp110: Add registers clock for XOR engine nodes
ARM64: dts: marvell: armada-cp110: Add registers clock for USB host nodes
* Silk board with R-Car E2 (r8a7794) SoC
- Add r1ex24002 EEPROM to DT
Magnus Damm says "Extend the Silk board support to include U14 which is
an I2C based EEPROM hooked up to the I2C1 bus."
- Add GPIO keys to DT
Magnus Damm says "Extend the Silk board support to include SW3, SW4,
SW6 and SW12. They are all connected via GPIO lines and handled by the
gpio-keys driver"
* Marzen board with R-Car H1 (r7a7779) SoC
- Add SDHI0 VCCQ Regulator
Magnus Damm says "Add support for the on-board voltage regulator hooked
up to GPIO3_20 on r8a7779 Marzen. The board schematics describes the
regulator as U4 TPS2110A. Input wise, U4 has D0 fixed to ground, D1
tied to GPIO3_20 while IN1 is fixed to 3.3V and IN2 is fixed to 1.8V.
OUT goes to the pull-ups for the data pins of SDHI0."
* Porter board with R-Car M3W (r8a7791) SoC
- Fix HDMI output routing
Laurent Pinchart says "The HDMI encoder is connected to the RGB output
of the DU, which is port@0, not port@1."
* iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM) and
iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
- Enable cmt0
* Stout board with R-Car H2 (r8a7790) SoC
- Initial support
* Lager board with R-Car H2 (r8a7790) SoC
- Add CEC clock for HDMI transmitter
Niklas Söderlund says "The adv7511 on the Lager board has a 12 MHz
fixed clock for the CEC block. Specify this in the dts to enable CEC
support."
- Move cec_clock to root node
By definition nodes without a bus address do not belong on the bus
* kzm9d board with EMMA Mobile EV2 (EMEV2) SoC
- Fix "debounce-interval" property misspelling
* RZ/G1M (r8a7743) and RZ/G1H (r8a7745) SoCs
- Add IPMMU DT nodes
- Add VSP support
* R-Car Gen2 boards
- Use I2C demuxer for
This allows run-time switching between alternate I2C IP blocks
* R-Car Gen2 and RZ/G1 SoCs
- Clean up DT files to ease future maintenance
+ add soc node for IP attached to the bus
+ sort subnodes of soc and root node
+ consistently use single space after =
* R-Car H2 (r8a7790), M3-W (r8a7791) and M3-N (r7a7793) SoCs
- Reduce size of thermal registers
According to the "User's Manual: Hardware" v2.00 the registers at base
0xe61f0000 extend to an offset of 0x10, rather than 0x14 which is the
case on the r8a73a4 (R-Mobile APE6).
This should not have any runtime affect as mapping granularity is
PAGE_SIZE.
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Merge tag 'renesas-dt-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Renesas ARM Based SoC DT Updates for v4.17" from Simon Horman:
* Silk board with R-Car E2 (r8a7794) SoC
- Add r1ex24002 EEPROM to DT
Magnus Damm says "Extend the Silk board support to include U14 which is
an I2C based EEPROM hooked up to the I2C1 bus."
- Add GPIO keys to DT
Magnus Damm says "Extend the Silk board support to include SW3, SW4,
SW6 and SW12. They are all connected via GPIO lines and handled by the
gpio-keys driver"
* Marzen board with R-Car H1 (r7a7779) SoC
- Add SDHI0 VCCQ Regulator
Magnus Damm says "Add support for the on-board voltage regulator hooked
up to GPIO3_20 on r8a7779 Marzen. The board schematics describes the
regulator as U4 TPS2110A. Input wise, U4 has D0 fixed to ground, D1
tied to GPIO3_20 while IN1 is fixed to 3.3V and IN2 is fixed to 1.8V.
OUT goes to the pull-ups for the data pins of SDHI0."
* Porter board with R-Car M3W (r8a7791) SoC
- Fix HDMI output routing
Laurent Pinchart says "The HDMI encoder is connected to the RGB output
of the DU, which is port@0, not port@1."
* iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM) and
iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
- Enable cmt0
* Stout board with R-Car H2 (r8a7790) SoC
- Initial support
* Lager board with R-Car H2 (r8a7790) SoC
- Add CEC clock for HDMI transmitter
Niklas Söderlund says "The adv7511 on the Lager board has a 12 MHz
fixed clock for the CEC block. Specify this in the dts to enable CEC
support."
- Move cec_clock to root node
By definition nodes without a bus address do not belong on the bus
* kzm9d board with EMMA Mobile EV2 (EMEV2) SoC
- Fix "debounce-interval" property misspelling
* RZ/G1M (r8a7743) and RZ/G1H (r8a7745) SoCs
- Add IPMMU DT nodes
- Add VSP support
* R-Car Gen2 boards
- Use I2C demuxer for
This allows run-time switching between alternate I2C IP blocks
* R-Car Gen2 and RZ/G1 SoCs
- Clean up DT files to ease future maintenance
+ add soc node for IP attached to the bus
+ sort subnodes of soc and root node
+ consistently use single space after =
* R-Car H2 (r8a7790), M3-W (r8a7791) and M3-N (r7a7793) SoCs
- Reduce size of thermal registers
According to the "User's Manual: Hardware" v2.00 the registers at base
0xe61f0000 extend to an offset of 0x10, rather than 0x14 which is the
case on the r8a73a4 (R-Mobile APE6).
This should not have any runtime affect as mapping granularity is
PAGE_SIZE.
* tag 'renesas-dt-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (47 commits)
ARM: dts: silk: Add GPIO keys to DT
ARM: dts: silk: Add r1ex24002 EEPROM to DT
ARM: dts: marzen: Add SDHI0 VCCQ Regulator
ARM: dts: stout: Initial r8a7790 Stout board support
ARM: dts: lager: Move cec_clock to root node
ARM: dts: kzm9d: Fix "debounce-interval" property misspelling
ARM: dts: gose: use demuxer for I2C4
ARM: dts: gose: use demuxer for I2C2
ARM: dts: silk: use demuxer for I2C1
ARM: dts: alt: use demuxer for I2C1
ARM: dts: porter: use demuxer for I2C2
ARM: dts: koelsch: use demuxer for I2C4
ARM: dts: koelsch: use demuxer for I2C2
ARM: dts: lager: use demuxer for IIC3/I2C3
ARM: dts: lager: use demuxer for IIC2/I2C2
ARM: dts: r8a7745: Add VSP support
ARM: dts: r8a7743: Add VSP support
ARM: dts: r8a7745: Add IPMMU DT nodes
ARM: dts: r8a7743: Add IPMMU DT nodes
ARM: dts: r8a7745: sort subnodes of soc node
...
* R-Car Gen3 boards and SoCs
- Make phy-mode of EtherAVB a board-specific property.
The SoC DTs file now uses "rgmii" and boards override this with
"rgmii-txid" as appropriate. Previously "rgmii-txid" was used
in SoC DTs but this did not describe that more sophiticated
functionality is a board rather than SoC property.
* Condor board with R-Car V3H (r8a77980) SoC
- Initial upstream support
* Condor board with R-Car V3H (r8a77980) SoC
- Initial upstream support
* R-Car D3 (r8a77995)
- Add I2C nodes and then describing the PCA9654 I/O expander connected to
the I2C0 bus.
* Eagle board with R-Car V3M (r8a77970) SoC
- Enable PFC support for configuring SCIF0 pins
This uses PFC support added to the V3M DT
- Describe EtherAVB PHY IRQ
This uses support for GPIO added to the V3M DT
- Enable I2C0 support
Sergei Shtylyov says "The I2C0 bus is populated by ON Semiconductor
PCA9653 I/O expander and Analog Devices ADV7511W HDMI transmitter (but
we're only describing the former chip now)."
* R-Car V3M (r8a77970) SoCs
- Add PFC support
- Describe GPIO devices
- Describe I2C devices
- Srt subnodes of root node alphabetically to eas future maintence overhead
* Draak board with R-Car D3 (r8a77995) SoC
- Enable SDHI2
Wolfram Sang says "The single SDHI controller is connected to eMMC."
- Enable DU
Kieran Bingham says "Enable the DU, providing only the VGA output for
now."
* R-Car D3 (r8a77995) and V3M (r8a77970) SoCs
- Move nodes which have no reg property out of bus
By deffinition the bus only has hardware with an address on the bus
- Remove non-existing STBE region from EtherAVB
Stream Buffer for EtherAVB-IF (STBE) is not present on these SoCs
* R-Car D3 (r8a77995) SoC
- Add FCPV, VSP and DU support
Kieran Bingham says "The r8a77995-d3 platform supports 3 VSP instances.
One VSPBS can be used as a dual-input image blender, while two VSPD
instances can be utilised as part of a display (DU) pipeline.
Add support for these, along with their required FCPV nodes."
* Salvator-X and Salvator-XS boards with R-Car Gen3 SoCs
- Add GPIO extender
This is a basis for follow-up work to configure the GPIOs of the extender
* Salvator-X and Salvator-XS board with R-Car M3-N (r8a77965) SoC
- Initial upstream support
* R-Car H3 (r8a7795) and M3-W (r8a7796) SoCs
- Add OPPs table for cpu devices
This, along with recently upstreamed Z and Z2 clock support allows
use of CPUFreq with both A57 and A53 CPUs.
- Add thermal cooling management
Allows the use of CPUFreq as a cooling device on A57 CPUs
- Correct register size of thermal node
Niklas Söderlund says "To be able to read fused calibration values from
hardware the size of the register resource of TSC1 needs to be
incremented to cover one more register which holds the information if
the calibration values have been fused or not.
Instead of increasing TSC1 size to the value from the datasheet update
all TSC's size to the smallest granularity of the address decoder
circuitry"
- Fix register mappings on VSPs
Kieran Bingham says "The VSPD includes a CLUT on RPF2. Ensure that the
register space is mapped correctly to support this."
* R-Car H3 (r8a7795) SoC
- Move SCIF node into alphabetical order to ease future maintenance overhead
- Add IPMMU-PV1 device node
This resolves an oversight when IPMMU nodes were added to the H3 DT.
All IPMMU devices should now be described in DT.
- Add missing SYS-DMAC2 dmas
Geert Uytterhoeven says "On R-Car H3, on-chip peripheral modules that
can make use of DMA are wired to either SYS-DMAC0 only, or to both
SYS-DMAC1 and SYS-DMAC2.
Add the missing DMA properties pointing to SYS-DMAC2 for HSCIF[0-2],
SCIF[0125], and I2C[0-2]. These were initially left out because early
firmware versions prohibited using SYS-DMAC2. This restriction has
been lifted in IPL and Secure Monitor Rev1.0.6 (released on Feb 25,
2016)."
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Merge tag 'renesas-arm64-dt-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Renesas ARM64 Based SoC DT Updates for v4.17" from Simon Horman:
* R-Car Gen3 boards and SoCs
- Make phy-mode of EtherAVB a board-specific property.
The SoC DTs file now uses "rgmii" and boards override this with
"rgmii-txid" as appropriate. Previously "rgmii-txid" was used
in SoC DTs but this did not describe that more sophiticated
functionality is a board rather than SoC property.
* Condor board with R-Car V3H (r8a77980) SoC
- Initial upstream support
* Condor board with R-Car V3H (r8a77980) SoC
- Initial upstream support
* R-Car D3 (r8a77995)
- Add I2C nodes and then describing the PCA9654 I/O expander connected to
the I2C0 bus.
* Eagle board with R-Car V3M (r8a77970) SoC
- Enable PFC support for configuring SCIF0 pins
This uses PFC support added to the V3M DT
- Describe EtherAVB PHY IRQ
This uses support for GPIO added to the V3M DT
- Enable I2C0 support
Sergei Shtylyov says "The I2C0 bus is populated by ON Semiconductor
PCA9653 I/O expander and Analog Devices ADV7511W HDMI transmitter (but
we're only describing the former chip now)."
* R-Car V3M (r8a77970) SoCs
- Add PFC support
- Describe GPIO devices
- Describe I2C devices
- Srt subnodes of root node alphabetically to eas future maintence overhead
* Draak board with R-Car D3 (r8a77995) SoC
- Enable SDHI2
Wolfram Sang says "The single SDHI controller is connected to eMMC."
- Enable DU
Kieran Bingham says "Enable the DU, providing only the VGA output for
now."
* R-Car D3 (r8a77995) and V3M (r8a77970) SoCs
- Move nodes which have no reg property out of bus
By deffinition the bus only has hardware with an address on the bus
- Remove non-existing STBE region from EtherAVB
Stream Buffer for EtherAVB-IF (STBE) is not present on these SoCs
* R-Car D3 (r8a77995) SoC
- Add FCPV, VSP and DU support
Kieran Bingham says "The r8a77995-d3 platform supports 3 VSP instances.
One VSPBS can be used as a dual-input image blender, while two VSPD
instances can be utilised as part of a display (DU) pipeline.
Add support for these, along with their required FCPV nodes."
* Salvator-X and Salvator-XS boards with R-Car Gen3 SoCs
- Add GPIO extender
This is a basis for follow-up work to configure the GPIOs of the extender
* Salvator-X and Salvator-XS board with R-Car M3-N (r8a77965) SoC
- Initial upstream support
* R-Car H3 (r8a7795) and M3-W (r8a7796) SoCs
- Add OPPs table for cpu devices
This, along with recently upstreamed Z and Z2 clock support allows
use of CPUFreq with both A57 and A53 CPUs.
- Add thermal cooling management
Allows the use of CPUFreq as a cooling device on A57 CPUs
- Correct register size of thermal node
Niklas Söderlund says "To be able to read fused calibration values from
hardware the size of the register resource of TSC1 needs to be
incremented to cover one more register which holds the information if
the calibration values have been fused or not.
Instead of increasing TSC1 size to the value from the datasheet update
all TSC's size to the smallest granularity of the address decoder
circuitry"
- Fix register mappings on VSPs
Kieran Bingham says "The VSPD includes a CLUT on RPF2. Ensure that the
register space is mapped correctly to support this."
* R-Car H3 (r8a7795) SoC
- Move SCIF node into alphabetical order to ease future maintenance overhead
- Add IPMMU-PV1 device node
This resolves an oversight when IPMMU nodes were added to the H3 DT.
All IPMMU devices should now be described in DT.
- Add missing SYS-DMAC2 dmas
Geert Uytterhoeven says "On R-Car H3, on-chip peripheral modules that
can make use of DMA are wired to either SYS-DMAC0 only, or to both
SYS-DMAC1 and SYS-DMAC2.
Add the missing DMA properties pointing to SYS-DMAC2 for HSCIF[0-2],
SCIF[0125], and I2C[0-2]. These were initially left out because early
firmware versions prohibited using SYS-DMAC2. This restriction has
been lifted in IPL and Secure Monitor Rev1.0.6 (released on Feb 25,
2016)."
* tag 'renesas-arm64-dt-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (69 commits)
arm64: dts: renesas: v3msk: add SCIF0 pins
arm64: dts: renesas: r8a7795: Add missing SYS-DMAC2 dmas
arm64: dts: renesas: r8a7795: Add IPMMU-PV1 device node
arm64: dts: renesas: r8a77970: sort subnodes of root node alphabetically
arm64: dts: renesas: eagle: add I2C0 support
arm64: dts: renesas: r8a77970: add I2C support
arm64: dts: renesas: r8a77965-salvator-xs: Add SoC name to file header
arm64: dts: renesas: r8a77965: Add EtherAVB device node
arm64: dts: renesas: r8a77970: Set EtherAVB phy mode to "rgmii"
arm64: dts: renesas: r8a77995: Set EtherAVB phy mode to "rgmii"
arm64: dts: renesas: r8a7795: Set EtherAVB phy mode to "rgmii"
arm64: dts: renesas: r8a7796: Set EtherAVB phy mode to "rgmii"
arm64: dts: renesas: v3msk: Override EtherAVB phy-mode
arm64: dts: renesas: eagle: Override EtherAVB phy-mode
arm64: dts: renesas: draak: Override EtherAVB phy-mode
arm64: dts: renesas: ulcb: Override EtherAVB phy-mode
arm64: dts: renesas: salvator-common: Override EtherAVB phy-mode
arm64: dts: renesas: r8a77965: Add INTC-EX device node
arm64: dts: renesas: r8a77965: Add IIC-DVFS device node
arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-N
...
Adds initial support for the P2972-0000 development board based on
Tegra194 and enables the AHCI controller on Jetson TX1.
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Merge tag 'tegra-for-4.17-arm64-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Pull "arm64: tegra: Device tree changes for v4.17-rc1" from Thierry Reding:
Adds initial support for the P2972-0000 development board based on
Tegra194 and enables the AHCI controller on Jetson TX1.
* tag 'tegra-for-4.17-arm64-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Enable AHCI on Jetson TX1
arm64: tegra: Add SATA node for Tegra210
arm64: tegra: Add device tree for the Tegra194 P2972-0000 board
arm64: tegra: Add Tegra194 chip device tree
Support for the VDE is added on Tegra30 along with some general cleanup
and some improvements to the various Toradex boards.
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Merge tag 'tegra-for-4.17-arm-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Pull "ARM: tegra: Device tree changes for v4.17-rc1" from Thierry Reding:
Support for the VDE is added on Tegra30 along with some general cleanup
and some improvements to the various Toradex boards.
* tag 'tegra-for-4.17-arm-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: apalis-tk1: Support v1.2 hardware revision
ARM: tegra: apalis-tk1: Copyright period, spurious newlines
ARM: tegra: apalis-tk1: Hog group for ethernet, PCIe, reset GPIOs
ARM: tegra: apalis-tk1: Add missing as3722 gpio0 configuration
ARM: tegra: apalis-tk1: Activate PWM pin muxing for pwm3
ARM: tegra: apalis-tk1: Set critical trips
ARM: tegra: apalis/colibri: Remove unneeded reg property
ARM: tegra: apalis/colibri: Use correct compatible for RTC
ARM: tegra: Fix I2C bus frequencies on Apalis/Colibri
ARM: tegra: venice2: Remove duplicate pcie-1 node
ARM: tegra: beaver: Remove invalid uses of rsvd1
ARM: tegra: Use proper IRQ type definitions
ARM: tegra: Fix ULPI regression on Tegra20
ARM: tegra: Add unit address to VDE IRAM area
ARM: tegra: Add video decoder node on Tegra30
ARM: tegra: Add IRAM node on Tegra30
Mostly cleanup of existing bindings and initial support for Tegra194.
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Merge tag 'tegra-for-4.17-dt-bindings' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Pull "dt-bindings: Tegra changes for v4.17-rc1" from Thierry Reding:
Mostly cleanup of existing bindings and initial support for Tegra194.
* tag 'tegra-for-4.17-dt-bindings' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt/bindings: Fix binding examples for Tegra GMI controller
dt-bindings: phy: Clarify ULPI PHY source clock
dt-bindings: tegra: Add documentation for nvidia,tegra194-pmc
dt-bindings: tegra: Add missing chips and NVIDIA boards
This adds the actual VGA DAC bridge that is used in the
Versatile AB, and sets the mode to 640x480 VGA.
The "clcd" clock was incorrectly named, the proper name
(from bindings) is "clcdclk". So far drivers survived
by just getting the first clock, but future drivers will
use named clocks.
We add the panel connector to the
"arm,versatile-tft-panel" as well, the signals actually
fork on the board, reaching both the VGA DAC and the
display connector.
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Versatile board can be equipped with a interface board
just named "IB2". This was created in the early 2000s for
prototyping GSM candybar phone form factor products.
The IB2 board contains:
- Cascaded interrupt controller
- Enfora Enabler GSM0308 quad-band module with antenna and
separate audio jack
- Keypad with joystick
- Sanyo 2.5" color display
- A 28-pin connector for mounting a camera
This adds a DTS file for the combination of the Versatile AB
with an IB2 daughterboard mounted, making the LED blink and
making the system controller available for drivers, such as
the panel driver.
The device tree bindings already exist in
Documentation/devicetree/bindings/arm/arm-boards.
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The PL111 in the ARM reference platforms are connected to
"panels" that are actually dumb VGA DAC connector bridges.
Now that we can support the proper bridges in the DRM driver,
fix this up.
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The PL111 in the ARM reference platforms are connected to
"panels" that are actually dumb VGA DAC connector bridges.
Now that we can support the proper bridges in the DRM driver,
fix this up.
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The PL111 in the ARM reference platforms are connected to
"panels" that are actually dumb VGA DAC connector bridges.
Now that we can support the proper bridges in the DRM driver,
fix this up.
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The PL111 in the ARM reference platforms are connected to
"panels" that are actually dumb VGA DAC connector bridges.
Now that we can support the proper bridges in the DRM driver,
fix this up.
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
efuse is one time programmable, so it is safer to deny write request
to this memory, unless the user is savvy enough to remove the read-only
flag from DTB
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Mali-450 IP can run up to 744MHz, bump the frequency using
the GP0 PLL clock.
Cc: Michal Lazo <michal.lazo@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The schematic of the espressobin is publicly available, add a comment
where to find it.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the PCIe host
controller used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "PCI: armada8k: Fix clock resource by adding
a register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the NAND controller
used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "mtd: nand: marvell: Fix clock resource by adding
a register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the safexcel EIP97
used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "crypto: inside-secure - fix clock resource by
adding a register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the harware RNG
used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "hwrng: omap - Fix clock resource by adding a
register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the XOR engine
controller used on CP110 component of the Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "dmaengine: mv_xor_v2: Fix clock resource by
adding a register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This extra clock is needed to access the registers of the USB host
controller used on Armada 7K/8K SoCs.
This follow the changes already made in the binding documentation (as
well as in the driver): "usb: host: xhci-plat: Fix clock resource by
adding a register clock"
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds some device nodes for the PCIe function block and updates
related pinmux.
Moreover, we add interrupt-map properties in both parent and children as
the chip only has one IRQ per slot that is connected to all INTx and get
propagated through the bridges and it also represents the root ports own
interrupts.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
It should be good that no use "_" is in DT node name. Consequently,
those nodes in certain files which have an inappropriate name containing
"_" are all being replaced with "-".
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The property pinctrl-names is totally superfluous. It would be good to
remove the property to keep the node neatness. There is actually
unnecessary to set up any pins for data path TRGMII between main SoC and
MT7530. Furthermore, it's more reasonable for the pin setup of control
path MDIO bus is being placed inside the node of ethernet controller.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
On bpi-r2 board, totally there're four UARTs which we usually called
uart[0-3] helpful to extend slow-I/O devices. Among those ones, uart2 has
dedicated pin slot which is used to console log. uart[0-1] appear at the
40-pins connector and uart3 has no pinout, but just has test points (TP47
for TX and TP48 for RX, respectively) nearby uart2, but we don't enable
uart3 in the patch. The missing pinctrl is also being supplemented for
those newly added devices.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Both mmc devices on bananapi-r2 board should all use the fixed regulators
as their power source instead of PMIC MT6323 exports.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
All ethsys, pciesys and ssusbsys internally include reset controller, so
explicitly add back these missing cell definitions to related bindings
and examples.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Extend the Silk board support to include SW3, SW4, SW6 and SW12. They
are all connected via GPIO lines and handled by the gpio-keys driver.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Extend the Silk board support to include U14 which is an I2C based EEPROM
hooked up to the I2C1 bus.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for the on-board voltage regulator hooked up to GPIO3_20
on r8a7779 Marzen. The board schematics describes the regulator as U4
TPS2110A. Input wise, U4 has D0 fixed to ground, D1 tied to GPIO3_20
while IN1 is fixed to 3.3V and IN2 is fixed to 1.8V. OUT goes to the
pull-ups for the data pins of SDHI0.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Stout base board support making use of 1 GiB of memory,
the Renesas H2 r8a7790 SoC with the SCIFA0 serial port
and CA15 with ARM architected timer.
Furthermore, this device tree contains entries for:
- 4x LEDs
- SDHI SD/MMC controller
- Display unit with HDMI output
- SH fast ethernet controller
- QSPI controller with S25FL512S attached to it
- I2C controller with DA9210 and DA 9063 PMICs
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
cec-clock is a fixed clock generator that is not controlled by i2c-12
and thus should not be a child of the i2c-12 bus node. Rather, it should
be a child of the root node of the DT.
Fixes: c5aa879776 ("ARM: dts: lager: Add CEC clock for HDMI transmitter")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
"debounce_interval" was never supported.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
dtc now gives the following warnings:
arch/arm/boot/dts/stih410-b2120.dtb: Warning (sound_dai_property): /soc/sound/simple-audio-card,dai-link@0/codec: Missing property '#sound-dai-cells' in node /soc/sti-display-subsystem/sti-hdmi@8d04000 or bad phandle (referred from sound-dai[0])
arch/arm/boot/dts/stih407-b2120.dtb: Warning (sound_dai_property): /soc/sound/simple-audio-card,dai-link@0/codec: Missing property '#sound-dai-cells' in node /soc/sti-display-subsystem/sti-hdmi@8d04000 or bad phandle (referred from sound-dai[0])
arch/arm/boot/dts/stih410-b2260.dtb: Warning (sound_dai_property): /soc/sound/simple-audio-card,dai-link@0/codec: Missing property '#sound-dai-cells' in node /soc/sti-display-subsystem/sti-hdmi@8d04000 or bad phandle (referred from sound-dai[0])
Add the missing #sound-dai-cells property.
Cc: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "Freescale arm64 device tree updates for 4.17" from Shawn Guo:
- Move cpu_thermal device out of bus node to fix DTC simple_bus_reg
warning seen with W=1 switch.
- Fix IFC child nodes' unit-address to eliminate DTC simple_bus_reg
warnings.
- Add a dummy size memory 'reg' property for LS1046A device tree to
avoid unit_address_vs_reg DTC warning, and the real size will be
filled by bootloader.
- Update ls208xa-qds board device tree to fix unit_address_vs_reg
warnings with DSPI device.
- Add idle-states for LS1012A and LS1043A, and correct
arm,psci-suspend-param setting for already added idle-states.
- DPAA QBMan portal and watchdog device addition.
* tag 'imx-dt64-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: ifc: Fix the unit address format in the examples
arm64: dts: ls1046a: add a dummy memory 'reg' property
arm64: dts: fsl: fix ifc simple-bus unit address format warnings
arm64: dts: fsl: update the cpu idle node
arm64: dts: ls1043a: add cpu idle support
arm64: dts: ls1012a: add cpu idle support
arm64: dts: ls208xa-qds: Fix the 'reg' property
arm64: dts: ls208xa-qds: Pass unit name to dspi child nodes
arm64: dts: ls208xa: Move cpu_thermal out of bus node
arm64: dts: ls1088a: Move cpu_thermal out of bus node
arm64: dts: ls1046a: Move cpu_thermal out of bus node
arm64: dts: ls1043a: Move cpu_thermal out of bus node
arm64: dts: ls1012a: Move cpu_thermal out of bus node
arm64: dts: Add DPAA QBMan portal 9
arm64: dts: ls1088a: add DT node of watchdog
