- Enable SPIFI Flash and JFFS2 to support rootfs on Flash memory
- Enable USB Phy, mass storage and SCSI to support USB memory
- Enable PCF857x and JC42 I2C devices found on Hitex board
- Enable PL172 to support memory mapped NOR Flash
- New LPC18xx drivers: I2C, Watchdog, SCT PWM and RTC
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "Broadcom soc changes for v4.4 (try 2)" from Florian Fainelli:
This pull request contains the following Broadcom SoC platform and driver changes:
- Brian Norris create a drivers/soc/brcmstb/ stub as a place holder for SoC-specific
code which is coming next
- Florian Fainelli adds support for configuring the BCM7xxx SoCs Bus Interface Unit
with their specific write-pairing setting, which must be saved and restored during
system-wide suspend/resume, and consequently updates the brcmstb machine code to
initialize the BIU
- Jon Mason adds support for the Northstar Plus SoCs by introducing a custom machine
descriptor matching their compatible string and setting up the PL310 L2 cache and
enabling the relevant ARM errata for their Cortex-A9
* tag 'arm-soc/for-4.4/soc' of http://github.com/Broadcom/stblinux:
ARM: brcmstb: Setup BIU control registers during boot
soc: brcmstb: Add Bus Interface Unit control setup
soc: add stubs for brcmstb SoC's
ARM: NSP: Add basic support for Broadcom Northstar Plus SoC
L2 caches optimization for Armada XP
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Merge tag 'mvebu-soc-4.4-1' of git://git.infradead.org/linux-mvebu into next/soc
Merge "mvebu soc for 4.4 (part 1)" from Gregory CLEMENT:
L2 caches optimization for Armada XP
* tag 'mvebu-soc-4.4-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add support to clear shared L2 bit on Armada XP
- Remove legacy omap3 ISP code as the driver is DT only
- Remove VoiceBlue board support as it's been unused over
10 years now
- Remove unused polarity control macros for TWL
- Remove two unneeded semicolons
- Remove unused core dpll code for reprogramming the rates
Note that this branch is against v4.3-rc4 as that contains critical
MMC related fixes to boot with MMC working on most omaps.
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Merge tag 'omap-for-v4.4/cleanup-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Merge "Clean-up for omaps for v4.4 merge window" from Tony Lindgren:
- Remove legacy omap3 ISP code as the driver is DT only
- Remove VoiceBlue board support as it's been unused over
10 years now
- Remove unused polarity control macros for TWL
- Remove two unneeded semicolons
- Remove unused core dpll code for reprogramming the rates
Note that this branch is against v4.3-rc4 as that contains critical
MMC related fixes to boot with MMC working on most omaps.
* tag 'omap-for-v4.4/cleanup-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP3: clock: remove un-used core dpll re-program code
ARM: OMAP2+: Remove unneeded semicolons
ARM: OMAP3: vc: Remove unused macros
ARM: OMAP1: Remove board support for VoiceBlue board
ARM: OMAP2+: Remove legacy OMAP3 ISP instantiation
use the CR_C define instead of a literal value
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Merge tag 'mvebu-cleanup-4.4-1' of git://git.infradead.org/linux-mvebu into next/cleanup
Merge "mvebu cleanup for 4.4 (part 1)" from Gregory CLEMENT:
use the CR_C define instead of a literal value
* tag 'mvebu-cleanup-4.4-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Use a CR_C constant instead of a hard-coded one
Add cpu hotplug support for berlin SoCs such as BG2 and BG2Q. These SoC
don't support power off cpu independently, but we also want cpu hotplug
support in these SoCs. We achieve this goal by putting the dying CPU in
WFI state after the coherency is disabled, then asserting the dying CPU
reset bit to put the CPU in reset state.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
In Berlin SoCs, there are two kinds of cpu reset control registers: the
first one's corresponding bits will be self-cleared after some cycles,
while the second one's bits won't. Previously the first kind of reset
control register is used, this patch uses the second kind one to prepare
for the next hotplug commit.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
While the addition of these properties is technically correct it unveils
a bug with deferred probe. The problem is that the presence of the gpio-
range property causes the gpio-tegra driver to defer probe (it needs the
pinctrl driver to be ready). That's technically correct, but it causes a
couple of issues:
- The keyboard on Chromebooks stops working. The reason for that is
that the gpio-tegra device has not registered an IRQ domain by the
time the EC SPI device is registered, hence the interrupt number
resolves to 0. This is technically a bug in the SPI core, since it
should really resolve the interrupt at probe time and defer if the
IRQ domain isn't available yet. This is similar to what's done for
I2C and platform device already.
- The gpio-tegra device deferring probe means that it is moved to the
end of the dpm_list. This list defines the suspend/resume order for
devices. However the core lacks a way to move all users of the
gpio-tegra device to the end of the dpm_list at the same time. This
in turn results in a subtle bug on Jetson TK1, where the gpio-keys
device is used to expose the power key as input. The power key is a
convenient way to wake the system from suspend. Interestingly, the
gpio-keys device ends up getting probed at a point after gpio-tegra
has been probed successfully from having been deferred earlier. As
such the driver doesn't need to defer the probe itself, and hence
the device isn't moved to the end of the dpm_list. This causes the
gpio-tegra device to be suspended before gpio-keys, which in turn
leaves gpio-keys unable to wake the system from suspend.
There are patches in the works to fix both of the above issues, but they
are too involved to make it into v4.3, so in the meantime let's fix the
regressions by commenting out the gpio-ranges properties until the fixes
have landed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Enable the following on the porter board:
I2C2, PCI, PCIe, QSPI, SATA0, SDHI0/2, USB PHY and VIN0/ADV7180.
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Merge tag 'renesas-dt2-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.4" from Simon Horman:
* Enable the following on the porter board:
I2C2, PCI, PCIe, QSPI, SATA0, SDHI0/2, USB PHY and VIN0/ADV7180.
* tag 'renesas-dt2-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: porter: enable internal PCI and USB PHY
ARM: shmobile: porter: enable PCIe
ARM: shmobile: porter: add QSPI DT support
ARM: shmobile: porter: add VIN0/ADV7180 DT support
ARM: shmobile: porter: add I2C2 DT support
ARM: shmobile: porter: enable SATA0
ARM: shmobile: porter: add SDHI0/2 DT support
In UniPhier SoCs before ProXstream2 and PH1-LD6b, two address spaces
0x00000000 - 0x0fffffff
0x40000000 - 0x4fffffff
are both mapped to the external bus (also called system bus),
so either was OK.
In the newest two SoCs, the former (0x00000000 - 0x0fffffff) is
assigned for the serial NOR interface.
For the consistency, use the latter for all the SoCs.
Also, fix the range properties to reflect the real address mapping,
where the support card is located at the offset address 0x01f00000
of CS1 of the external bus.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Regulator fix for beagle-x15 to fix HDMI without a SD card being
inserted
- GPMC fix for showing proper timings and to allow enabling debug
options that somehow was unselectable earlier
- Add minimal documentation for new MMC1 dependency on
REGULATOR_PBIAS as it may not be obvious for people with
targeted .config files
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Merge tag 'omap-for-v4.3/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "Fixes for omap against v4.3-rc5" from Tony Lindgren:
- Regulator fix for beagle-x15 to fix HDMI without a SD card being
inserted
- GPMC fix for showing proper timings and to allow enabling debug
options that somehow was unselectable earlier
- Add minimal documentation for new MMC1 dependency on
REGULATOR_PBIAS as it may not be obvious for people with
targeted .config files
* tag 'omap-for-v4.3/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Documentation: ARM: List new omap MMC requirements
memory: omap-gpmc: dump "before" state before first modification
memory: omap-gpmc: Fix unselectable debug option for GPMC
ARM: dts: am57xx-beagle-x15: set VDD_SD to always-on
The IRQ signal from external devices on this board is connected to
the XIRQ4 pin of the SoC. The IRQ number should be 52, not 50.
Fixes: a5e921b477 ("ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board support")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add support for new PLL-type for stih418 A9-PLL.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The B2199 board is mounted with Realtek RTL8367 switch.
We consider the bootloader will have intiliazed the switch before jumping into
the kernel, so we declare it as a fixed link.
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
These boards are mounted with Realtek RTL8367 switch.
We consider the bootloader will have intiliazed the switch before jumping into
the kernel, so we declare it as a fixed link.
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This is not needed anymore. Handling a potentially pending imprecise
external abort left behind by the bootloader is now done in a slightly
safer way inside the common ARM startup code.
[gregory.clement@free-electrons.com: Beside the Armada 375 Z1 which
initially required this, is no more supported]
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit enables standby support on Armada 385 DB-AP board, because
the PM initalization routine requires "marvell,armada380" compatible
string for all Armada 38x-based platforms.
Beside the compatible "marvell,armada38x" was wrong and should be fixed
in the stable kernels too.
[gregory.clement@free-electrons.com: add information, about the fixes]
Fixes: e5ee12817e ("ARM: mvebu: Add Armada 385 Access Point
Development Board support")
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: <stable@vger.kernel.org>
This patch adds a label for uart0 to allow changing of uart0 pins.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
The pasic3-leds driver was never in vanilla kernel. Actual configuration
data for a hypothetical driver does not describe hardware completely, so
remove them.
This patch prepare HTC Magician machine code to pasic3-leds driver
addition.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
A PXA27x SoC supports USB device mode, this patch adds support for that.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
HTC Magician contains a MAX1587A voltage regulator for a Vcore supply.
The Vcore regulation is required for a CPU speed switching. This patch adds
declaration for the max1586 driver.
Notice:
- MAX1587A version does not support the V6 (USIM) output.
- A boost resistor was directly measured for a board_id 0x3a.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This patch changes the comments in the HTC Magician machine source code
to better describe used devices and interfaces.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This patch moves platform_add_devices() (standard declaration of devices)
outside of the platform specific device declarations. Moving to the end
of the magician_init() clarifies the source code (standard and specific
declaration are not mixed).
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Add a fake regulator, which is required for the correct initialization
of the PWM backlight driver.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
[ added a missing include for fixed regulator ]
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Add a debug message for the backlight brightness function.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Magician STUART port is connected to the infraport and used by the FICP
driver. The FICP driver uses its own definition.
Required for correct initialization of the pxaficp_ir driver after
planned dmaengine conversion.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
USB host ports on the HTC Magician are wrongly enabled. Port 1 is for
bluetooth and port 2 is for OTG (mux in the charger connector).
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Old definition for the physmap-flash driver is incomplete:
- Use of an EGPIO without previous request
- Missing the MTD partitions
This patch fixes it. Read functionality was tested on the machine with
board_id 0x3a. Writing was not tested.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The pxaficp_ir driver requests a power GPIO for the transceiver internally,
so a global GPIO allocation in magician_init() is redundant.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This patch changes fast_mode settings for the normal and power I2C
controller on the HTC Magician machine.
Connected device on the Power I2C:
- MAX1587A: working in the fast mode
Connected devices on the Normal I2C:
- UDA1380: working in the fast mode
- OV9640: bus became stuck in the fast mode
The OV9640 is not using a standard I2C protocol, but an SCCB variant. Maybe
it is not fully compatible in the fast mode. Therefore fast mode for normal
I2C is disabled. If you not using the OV9640 then you can enable the fast
mode for the UDA1380.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
[included Philipp Zabel's comment change]
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This patch fixes the charging detection functions for pda_power driver
(according to newly discovered EGPIOs) and add NiCd backup accumulator
charging support.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Change the default Samsung LCD refresh from an unrealistic 117Hz to 50Hz
as no video applications on the HTC Magician can work that fast.
The optimalization lowers the RAM latency at least by 3%.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This patch renames EGPIOs, which are used for the charging cable presence
and type detection. Old names did not correspond with an observed
functionality (on board_id 0x3a). The behavior is not:
- AC charger
- USB charger
- Cable detection
, but:
- AC/USB type
- Cable detection1
- Cable detection2
This patch fixes a possible typo in the bit offset for the cable detection
EGPIO declaration, too.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Delays for the Samsung LCD are greater than needed. These values were
extracted from a datasheet.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This patch renames GPIOs, which are used to control the power lines to
the LCD screen. New names correspond to a real functionality, which was
measured on the HTC Magician board_id 0x3a.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This patch adds EGPIO pins: Infra transceiver power, NiCD charging and
inserted charger cable.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This patch changes the description of the LCD power GPIO to be more
specific.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Optimize the debug messages for the LCD power.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Print more specific error message for global GPIOs.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This patch fixes the indentation for the HTC Magician machine definition.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
[ split pwm_remove_table() call on 2 lines ]
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The DTS erronously uses the wrong reg mapping and IRQ numbers for some
UART, WDT and timer nodes. Fix this.
Reported-by: John Wehle <john@feith.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SMEM is a software construct built on top of a DDR reserved region
and sometimes a device memory region called RPM message ram. Having
the RPM message ram in the smem DT node's reg property leads to the
smem node being located in different places depending on if the
message ram is being used or not. Let's add a qcom specific
property, qcom,rpm-msg-ram, and point to the device memory from
the SMEM node via a phandle. As SMEM is a software construct, it
really needs to reside at the root of the DT regardless of whether
it's using the message ram or not.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Remove the OMAP3 core DPLL re-program code, and the associated SRAM
code that does the low-level programming of the DPLL divider, idling
of the SDRAM etc.
This code was never fully implemented in the kernel; things missing
were driver side handling of core clock changes (they need to account
for their functional clock rate being changed on-the-fly), and the whole
framework required for handling this. Thus, there is not much point
to keep carrying the low-level support code either.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the macro instead of absolute register offsets to make the code more
readable as the values now match register addresses from the datasheet.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- New board support
: add exynos5250-snow-rev5 DT file to support Snow Rev5+ board
: add exynos5422-odroidxu4 DT file to support Odroid XU4 board
: split exynos5422-odroidxu3-audio DT file from odroidxu3-common
- USE GPIO constants for flags cells for exynos boards
- fix cpu compatible value to 'arm926ej-s' for s3c2416
- add DMA support for serial ports for exynos4
- add suspend opp for exynos4412
- remove regulator-compatible usage for exynos4412-trats2
- enable EC vboot context support for Peach boards
- move display-timings node to DP for exynos5250-arndale, smdk5250 and smdk5420
- for exynos4412-odroid/odroidu3
: unify voltage regulator style and
: remove redundant pinctrl settings
: add pwm-fan node and use it as a colling device
- for exynos5422-odroidxu3
: fix power off method and LEDs
- dt-bindings
: grounded AC0KB pin on S2MPS11
: entry how to use PWM FAN as a cooling device
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Merge tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung DT updates for v4.4" from Kukjin Kim:
- New board support
: add exynos5250-snow-rev5 DT file to support Snow Rev5+ board
: add exynos5422-odroidxu4 DT file to support Odroid XU4 board
: split exynos5422-odroidxu3-audio DT file from odroidxu3-common
- USE GPIO constants for flags cells for exynos boards
- fix cpu compatible value to 'arm926ej-s' for s3c2416
- add DMA support for serial ports for exynos4
- add suspend opp for exynos4412
- remove regulator-compatible usage for exynos4412-trats2
- enable EC vboot context support for Peach boards
- move display-timings node to DP for exynos5250-arndale, smdk5250 and smdk5420
- for exynos4412-odroid/odroidu3
: unify voltage regulator style and
: remove redundant pinctrl settings
: add pwm-fan node and use it as a colling device
- for exynos5422-odroidxu3
: fix power off method and LEDs
- dt-bindings
: grounded AC0KB pin on S2MPS11
: entry how to use PWM FAN as a cooling device
* tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (22 commits)
ARM: dts: Use GPIO constants for flags cells in exynos5440 boards
ARM: dts: Use GPIO constants for flags cells in exynos5420/5422/5800 boards
ARM: dts: Use GPIO constants for flags cells in exynos4412 boards
ARM: dts: Use GPIO constants for flags cells in exynos4120 boards
ARM: dts: Use GPIO constants for flags cells in exynos3250 boards
ARM: dts: Enable EC vboot context support on Peach boards
ARM: dts: Remove regulator-compatible usage in exynos4412-trats2
ARM: dts: Move display-timings node from fimd to dp in exynos5250-arndale, smdk5250 and smdk5420
ARM: dts: Add Exynos5250 Snow Rev5+ support on exynos5250-snow-rev5
ARM: dts: Unify voltage regulator style in exynos4412-odroid
ARM: dts: Remove redundant pinctrl settings in exynos4412-odroid
ARM: dts: Fix cpu compatible value for s3c2416
ARM: dts: Add support Odroid XU4 board for exynos5422-odroidxu4
ARM: dts: Split audio configuration to separate exynos5422-odroidxu3-audio
ARM: dts: Fix power off method for exynos5422-odroidxu3-common
dt-bindings: Document grounded ACOKB pin on S2MPS11
ARM: dts: use pwm-fan device as a cooling device for exynos4412-odroidu3
ARM: dts: Add pwm-fan node for exynos4412-odroidu3
dt-bindings: Documentation entry to explain how to use PWM FAN as a cooling device
ARM: dts: add suspend opp to exynos4412
...
The DTS erronously uses the wrong reg mapping and IRQ numbers for some
UART, WDT and timer nodes. Fix this.
Reported-by: John Wehle <john@feith.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
DT patches for the 4.4 merge window, most notably:
- Enable the OTG controller on more boards
- Create new DTSI for the q8's design
- Added RSB support to the A23 and A33 SoCs
- New boards: Olimex A20 EVB, Yones bs1078v2
Plus the usual random patches enabling and / or enhancing a few things in
particular boards.
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Merge tag 'sunxi-dt-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT changes for 4.4" from Maxime Ripard:
DT patches for the 4.4 merge window, most notably:
- Enable the OTG controller on more boards
- Create new DTSI for the q8's design
- Added RSB support to the A23 and A33 SoCs
- New boards: Olimex A20 EVB, Yones bs1078v2
Plus the usual random patches enabling and / or enhancing a few things in
particular boards.
* tag 'sunxi-dt-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (59 commits)
ARM: dts: sun6i: hummingbird: Drop AXP221 DC1SW and DC5LDO supplies
ARM: dts: sun8i: sinlinx-sina33: Enable Reduced Serial Bus controller
ARM: dts: sun8i: q8-common: Enable RSB controller for A23/A33 Q8 tablets
ARM: dts: sun8i: Add Reduced Serial Bus controller device node to A23/A33 dtsi
ARM: dts: sun4i: Add AXP209 PMU regulators for pcDuino1/2
ARM: sun7i: dt: Add new Olimex A20 EVB device
ARM: dts: sun6i: hummingbird: Add aliases for rtc devices
ARM: dts: sun7i: Add dts file for Wits Pro A20 DKT
ARM: dts: sun7i: Enable USB DRC on Wexler TAB7200
ARM: dts: sun7i: Enable USB DRC on the Orange pi
ARM: dts: sun7i: Enable USB DRC on orangepi-mini
ARM: dts: axp209: Add usb_power_supply child node to the ax209 node
ARM: dts: sun8i: Make ippo-q8h-v1.2.dts a symlink to q8-tablet.dts
ARM: dts: sun8i: Add sun8i-a33-q8-tablet.dts file
ARM: dts: sun6i: Add support for Yones Toptech bs1078v2 tablets
ARM: dts: sun4i: Enable USB DRC on the Marsboard A10
ARM: dts: sun4i: gemei-g9: Add accelerometer (bma250) IRQ
ARM: dts: sun8i-a33: Add security system crypto engine clock and device nodes
ARM: dts: sun8i: Add pwm-backlight device for A23/A33 Q8 format tablets
ARM: sun8i: A23: Add missing msgbox gate
...
- use serial aliases and stdout path
- add cpufreq properties to all SoCs
- add pwm nodes for all SoCs
This depends on topic branch berlin-cpuclk-for-4.4-1
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Merge tag 'berlin-dt-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Merge "Marvell Berlin DT for 4.4 take 1" from Sebastian Hesselbarth:
- use serial aliases and stdout path
- add cpufreq properties to all SoCs
- add pwm nodes for all SoCs
This depends on topic branch berlin-cpuclk-for-4.4-1
* tag 'berlin-dt-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: berlin: add a PWM node on the BG2CD
ARM: berlin: add a PWM node on the BG2
ARM: berlin: add a PWM node on the BG2Q
ARM: berlin: dts: add the cpufreq-dt bindings on the BG2CD
ARM: berlin: dts: add the cpufreq-dt bindings on the BG2
ARM: berlin: dts: add the cpufreq-dt bindings on the BG2Q
arm: dts: berlin: use stdout-path
arm: dts: berlin: add aliases for serial
Update dts to use the new crypto driver on mvebu SoCs
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Merge tag 'mvebu-dt-4.4-1' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt for 4.4 (part 1)" from Gregory CLEMENT:
Update dts to use the new crypto driver on mvebu SoCs
* tag 'mvebu-dt-4.4-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: modify Orion and Kirkwoord crypto compatible strings
ARM: mvebu: use new bindings for existing crypto devices
ARM: mvebu: define crypto SRAM ranges for all armada-38x boards
ARM: mvebu: add crypto related nodes to armada 38x dtsi
ARM: mvebu: define crypto SRAM ranges in armada-375-db.dts
ARM: mvebu: add crypto related nodes to armada 375 dtsi
ARM: mvebu: define crypto SRAM ranges for all armada-370 boards
ARM: mvebu: add crypto related nodes to armada 370 dtsi
ARM: mvebu: define crypto SRAM ranges for all armada-xp boards
ARM: mvebu: add crypto related nodes to armada-xp.dtsi
ARM: mvebu: add CPU config registers in the Armada 370/XP Device Tree
Some recently added code to avoid a bug introduced a build error
when CONFIG_PM is disabled and a macro is hidden:
arch/arm/mach-pxa/pxa3xx.c: In function 'pxa3xx_init':
arch/arm/mach-pxa/pxa3xx.c:439:3: error: 'NDCR' undeclared (first use in this function)
NDCR = (NDCR & ~NDCR_ND_ARB_EN) | NDCR_ND_ARB_CNTL;
^
This moves the macro outside of the #ifdef so it can be
referenced correctly.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: adf3442cc8 ("ARM: pxa: fix DFI bus lockups on startup")
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
It includes a single fix for i.MX7D, which corrects the base address of
UART2 in device tree.
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Merge tag 'imx-fixes-4.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Pull "The i.MX fixes for 4.3, 2nd round:" from Shawn Guo:
It includes a single fix for i.MX7D, which corrects the base address of
UART2 in device tree.
* tag 'imx-fixes-4.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx7d: Fix UART2 base address
- BG2Q USB PHY compatible fix (also tagged for stable v4.2)
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Merge tag 'berlin-fixes-for-4.3-1' of git://git.infradead.org/users/hesselba/linux-berlin into fixes
Merge "Marvell Berlin fixes for v4.3 take 1" from Sebastian Hesselbarth:
- BG2Q USB PHY compatible fix (also tagged for stable v4.2)
* tag 'berlin-fixes-for-4.3-1' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: dts: berlin: change BG2Q's USB PHY compatible
Move the code out from arch/arm/common and merge it inside of the dmaengine
driver.
This change is done with as minimal (if eny) functional change to the code
as possible to avoid introducing regression.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
The upcoming change to merge the arch/arm/common/edma.c into
drivers/dma/edma.c will need this change when booting daVinci devices in
no DT mode.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Convert the eDMA platform device creation to use
struct platform_device_info XXXXXX __initconst and
platform_device_register_full()
This will allow us to cleanly specify the dma_mask for the devices in an
upcoming patch.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Since the driver stack no longer depends on lookup with id number in a
global array of pointers, the limitation for the number of eDMAs are no
longer needed. We can handle as many eDMAs in legacy and DT boot as we have
memory for them to allocate the needed structures.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Instead of relying on indexes pointing to edma private date in the global
pointer array, pass the private data pointer via the public API.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Merge the iomem into the 'struct edma' and change the internal (static)
functions to use pointer to the edma_cc instead of the ctlr number.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
If the of_dma_controller is registered in the non dmaengine driver we could
have race condition:
the of_dma_controller has been registered, but the dmaengine driver is not
yet probed. Drivers requesting DMA channels during this window will fail
since we do not yet have dmaengine drivers registered.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Currently we have one device created to handle all (maximum 2) eDMAs in the
system.
With this change all eDMA instance will have it's own device/driver.
This change is needed for further cleanups in the eDMA driver stack since
the one device/driver to handle all eDMAs in the system was not flexible
enough and prevents the upcoming work.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
We no longer have users for these functions so they can be removed.
Remove also unused enums from the header file.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
In case when the interrupt happened for the second eDMA the channel
number was incorrectly passed to the client driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
CC: <stable@vger.kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
New bindings and driver have been created for STM32 series parts. This
patch integrates this changes.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add support for booting secondary CPUs on mt6589, mt8127
and mt8135.
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
We enable GTP6 which ungates the arch timer clock.
In the future this should be done in the bootloader.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Replace "disable" by "disabled" in the Qualcomm MSM8974 dtsi
Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
clock controller nodes which also support power domains (gdscs') need
to have a #power-domain-cells property. Add these for gcc and mmcc
nodes of msm8974, gcc of apq8084 and msm8916.
Also update gcc and mmcc bindings for it.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch adds notify led support on IFC6410, whose trigger can be
configured from userspace.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Add pwrseq support to sdcc4 which would enable a proper reset of WLAN
without ugly hacks in the board support file.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch adds pwrseq for WLAN which resets the WLAN just before the
SDIO bus is up.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
CM-QS600.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch adds missing gsbi7 uart pinctrl, this is the default debug
uart on most boards.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Usage of generic names like "uart_pins" is confusing to the reader, given
the fact that there could be more than one uart on APQ8064.
This patch adds gsbi prefix to uart pinctrl nodes so as to avoid such
confusion.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch adds support to pm8921 power button.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch adds rtc node for pmic8921.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch removes unnecessary eeprom label, which is not used
anywhere in the board file.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch removes unnecessary eeprom label, which is not used
anywhere in the board file.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch removes i2c pinctrl properties from board which which are now
mentioned in the SOC specific file. This will avoid redundant properties
across multiple board fiiles.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This doesn't match the binding, and the driver doesn't look to
be using it. Remove the extra element.
CC: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Add low priority accumulator channel that can monitor multiple QMSS
queues. User for example could use the accumular queue for Netcp
Rx completion. While at it, also add an extra line end of each top
level node in DTS to make it more readable.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Enable fpga manager framework and low level driver for
socfpga in socfpga_defconfig
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
The DC5LDO regulator supplies VDD-CPUS, which is for the embedded
controller in the A31 SoC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we have axp22x.dtsi describing common axp22x hardware, use
it and reference the nodes instead of declaring the whole tree.
Also drop the "always-on" from the vdd-gpu regulator, since we don't
support the GPU anyway.
And add a regulator reference for cpu0.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The power configuration on this board is the same as the pcDuino v3.
This will enable frequency/voltage scaling over the standard A20
operating points from 144 MHz to 960 MHz.
Tested using cpufreq-ljt-stress-test on two pcDuino v3 Nano boards; also
tested successfully with voltages reduced by 0.025 V.
Signed-off-by: Adam Sampson <ats@offog.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
We've everything we need to support the gmac on Colombus, turn it on.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
A33 Q8 tablets with the et-q8-v1.6 pcb will work fine with the
generic q8-tablet.dts and given the many variants of PCBs found in
Q8 tablets using such a specific dts name was a mistake in hindsight.
We cannot just drop the et-q8-v1.6.dtb as existing u-boot configs
may very well point to it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
A23 Q8 tablets with the ippo-q8h-v* pcb will work fine with the
generic q8-tablet.dts and given the many variants of PCBs found in
Q8 tablets using such a specific dts name was a mistake in hindsight.
We cannot just drop the ippo-q8h-v*.dtb as existing u-boot configs
may very well point to it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This is a generic dts file for A23 based q8 formfactor tablets,
this is intended to replace both sun8i-a23-ippo-q8h-v5.dts and
sun8i-a23-ippo-q8h-v1.2.dts (these can be fully dropped after a
transition period).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Since we now have a generic data structure to express an
interrupt specifier, convert all hierarchical irqchips that
are OF based to use a fwnode_handle as part of their alloc
and xlate (which becomes translate) callbacks.
As most of these drivers have dependencies (they exchange IRQ
specifiers), change them all in a single, massive patch...
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-and-tested-by: Hanjun Guo <hanjun.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Tomasz Nowicki <tomasz.nowicki@linaro.org>
Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Cc: Graeme Gregory <graeme@xora.org.uk>
Cc: Jake Oshins <jakeo@microsoft.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Link: http://lkml.kernel.org/r/1444737105-31573-6-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The struct irq_domain contains a "struct device_node *" field
(of_node) that is almost the only link between the irqdomain
and the device tree infrastructure.
In order to prepare for the removal of that field, convert all
users to use irq_domain_get_of_node() instead.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-and-tested-by: Hanjun Guo <hanjun.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Tomasz Nowicki <tomasz.nowicki@linaro.org>
Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Cc: Graeme Gregory <graeme@xora.org.uk>
Cc: Jake Oshins <jakeo@microsoft.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Link: http://lkml.kernel.org/r/1444737105-31573-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This enables the SPDIF optical audio output on the Radxa Rock
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Actviate HDMI output of the RCar DU (and LVDS while we are here).
Enable the HDMI encoder chip found on Lager/Koelsch boards.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached
to them and also enable USB PHY device for the Porter board. We have to
enable everything in one patch since EHCI/OHCI devices are already linked
to the USB PHY device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In DRA74x, DRA72x and AM57xx EVMs the card detect gpio is
designed as active low gpio. So correcting the dt card detect
gpio definition.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In AM43xx the card detect gpio is designed as active low gpio.
So correcting the dt card detect gpio definition.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In AM335x the card detect gpio is designed as active low gpio.
So correcting the dt card detect gpio definition.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
uart2 pinmux is already defined in omap3-igep0020-common.dtsi, remove
the duplicate node.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use tabs instead of spaces for indentation.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The card detect GPIO is using IRQ_TYPE_LEVEL_LOW in the GPIO flag cells
but this defined constant is meant to be used for a IRQ and not a GPIO.
So instead use GPIO_ACTIVE_LOW that seems to be the original intention.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
LDO1 regulator (VDD_SD) is connected to SoC's vddshv8. vddshv8 needs to
be kept always powered (see commit 5a0f93c657 ("ARM: dts: Add
am57xx-beagle-x15"), but at the moment VDD_SD is enabled/disabled
depending on whether an SD card is inserted or not.
This patch sets LDO1 regulator to always-on.
This patch has a side effect of fixing another issue, HDMI DDC not
working when SD card is not inserted:
Why this happens is that the tpd12s015 (HDMI level shifter/ESD
protection chip) has LS_OE GPIO input, which needs to be enabled for the
HDMI DDC to work. LS_OE comes from gpio6_28. The pin that provides
gpio6_28 is powered by vddshv8, and vddshv8 comes from VDD_SD.
So when SD card is not inserted, VDD_SD is disabled, and LS_OE stays
off.
The proper fix for the HDMI DDC issue would be to maybe have the pinctrl
framework manage the pin specific power.
Apparently this fixes also a third issue (copy paste from Kishon's
patch):
ldo1_reg in addition to being connected to the io lines is also
connected to the card detect line. On card removal, omap_hsmmc
driver does a regulator_disable causing card detect line to be
pulled down. This raises a card insertion interrupt and once the
MMC core detects there is no card inserted, it does a
regulator disable which again raises a card insertion interrupt.
This happens in a loop causing infinite MMC interrupts.
Fixes: 5a0f93c657 ("ARM: dts: Add am57xx-beagle-x15")
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reported-by: Louis McCarthy <compeoree@gmail.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The cpuidle tracepoints are called within a rcu_idle_exit() section, and
must be denoted with the _rcuidle() version of the tracepoint.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DRA74x family of SoCs have a second DSP, that also has
two MMUs just like the DSP1 subsystem. Add the IOMMU nodes
for this DSP2 subsystem in disabled state to the DRA74x
specific DTS file, the nodes would need to be enabled
appropriately in the respective board DTS files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DRA7xx family of SOCs have two IPUs and one DSP processor
subsystems in common. The IOMMU DT nodes have been added for
these processor subsystems, and have been disabled by default.
These MMUs are very similar to those on OMAP4 and OMAP5, with
the only difference being the presence of a second MMU within
the DSP subsystem for the EDMA port. The DSP IOMMUs also need
an additional 'ti,syscon-mmuconfig' property compared to the
IPU IOMMUs.
NOTE: The enabling of these nodes is left to the respective
board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DSP_SYSTEM sub-module is a dedicated system control logic
module present within a DRA7 DSP processor sub-system. This
module is responsible for power management, clock generation
and connection to the device PRCM module.
Add a syscon node for this module for the DSP2 processor
sub-system. This is added as a syscon node as it is a common
configuration module that can be used by the different IOMMU
instances and the corresponding remoteproc device.
The node is added to the dra74x.dtsi file, as the DSP2 processor
subsystem is usually present only on the DRA74x variants of the
DRA7 SoC family.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DSP_SYSTEM sub-module is a dedicated system control logic
module present within a DRA7 DSP processor sub-system. This
module is responsible for power management, clock generation
and connection to the device PRCM module.
Add a syscon node for this module for the DSP1 processor
sub-system. This is added as a syscon node as it is a common
configuration module that can be used by the different IOMMU
instances and the corresponding remoteproc device.
The node is added to the common dra7.dtsi file, as the DSP1
processor sub-system is mostly common across all the variants
of the DRA7 SoC family.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Many OMAP2+ DTS are not using the defined constants to express
the GPIO polarity. Replace these so the DTS are easier to read.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
SeeedStudio BeagleBone Green (BBG) is clone of the BeagleBone Black (BBB) minus
the HDMI port and addition of two Grove connectors (i2c2 and usart2).
This board can be identified by the 1A value after A335BNLT (BBB) in the at24 eeprom:
1A: [aa 55 33 ee 41 33 33 35 42 4e 4c 54 1a 00 00 00 |.U3.A335BNLT....|]
http://beagleboard.org/greenhttp://www.seeedstudio.com/wiki/Beaglebone_green
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tony Lindgren <tony@atomide.com>
CC: Jason Kridner <jkridner@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the System Mailboxes 5 and 6 and the corresponding child
sub-mailbox (IPC 3.x) nodes for the Beagle X15 EVM boards. This
is needed to enable communication with the respective remote
processors IPU1, IPU2, DSP1 and DSP2 from the MPU.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the System Mailboxes 5 and 6 and the corresponding
child sub-mailbox (IPC 3.x) nodes for the DRA72 EVM board.
This is needed to enable communication with the respective
remote processors IPU1, IPU2, and DSP1 from the MPU.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the System Mailboxes 5 and 6 and the corresponding
child sub-mailbox (IPC 3.x) nodes for the DRA7 EVM board.
This is needed to enable communication with the respective
remote processors IPU1, IPU2, DSP1 and DSP2 from the MPU.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the sub-mailbox nodes that are used to communicate between
MPU and the remote processors IPU1, IPU2 and DSP1. These match the
respective node definitions on DRA74x to maintain compatibility for
the equivalent remote processors. There is no DSP2 on DRA72x, and
so the corresponding sub-mailbox node is not added.
These sub-mailbox nodes are added to match the hard-coded mailbox
configuration used within the TI IPC 3.x software package. The
Dual-Cortex M4 IPU1 and IPU2 processor sub-systems are assumed to
be running in SMP-mode, and hence only a single sub-mailbox node
is added for each.
All these sub-mailbox nodes are left in disabled state, and should
be enabled (and modified if needed) as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the sub-mailbox nodes that are used to communicate between
MPU and the remote processors IPU1, IPU2, DSP1 and DSP2.
The sub-mailbox nodes utilize the System Mailbox instances 5 and 6.
These sub-mailbox nodes are added to match the hard-coded mailbox
configuration used within the TI IPC 3.x software package. The
Dual-Cortex M4 IPU1 and IPU2 processor sub-systems are assumed to
be running in SMP-mode, and hence only a single sub-mailbox node
is added for each.
All these sub-mailbox nodes are left in disabled state, and should
be enabled (and modified if needed) as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cleaned up the regulators on the wega board. Created a simple bus,
renamed the regulators according to the schematics and added missing
regulator on wega.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
dra7-evm has 2 gpio keys wired through TS_LCD_GPIO3, TS_LCD_GPIO4
which in turn connected to PCF8575 GPIO pcf_lcd: gpio@20 expander
pins 2 and 3.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
dra7-evm has 4 user gpio leds connected to PCF8575 GPIO pcf_lcd:
gpio@20 expander pins [4,5,6,7], so add corresponding DT nodes.
Do not enable any triggers by default as not all of them are proved
to work on -RT.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds DT definition for CF8575 GPIO pcf_lcd: gpio@20
expander which is connected to i2c bus 1 and has slave address 0x20.
It allows to control:
- tc_lcd gpios, pins p0-p3
- user leds, pins p4-p7
- control LCD panel power, p15
PCF8575 GPIO pcf_lcd: gpio@20 expander supports interrupt controller
functionality and its INT line is connected to dra7 GPIO6.11 pin.
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The analog audio setup consists of:
McASP3 <-> tlv320aic3104 codec
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DVDD is supplied via TPS77018DBVT fixed regulator from vdd_3v3
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The board uses tlv320aic3106 codec connected to McASP3. The master clock
for the codec and McASP3 is coming from ATL2.
McASP3 is the master on the I2S bus.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The GPIO expander's p1 on i2c5 bus 0x26 address is used for selecting
between audio and VIN6 functionality. For VIN6 use an add on card is
needed while audio is present on the board itself.
Select the audio functionality over the VIN6 in the dts file.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DVDD is supplied via TPS77018DBVT fixed regulator from evm_3v3
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The board uses tlv320aic3106 codec connected to McASP3. The master clock
for the codec and McASP3 is coming from ATL2.
McASP3 is the master on the I2S bus.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This GPIO expander is used for controlling various muxes on the board.
By default select audio functionality over VIN6 by setting the P1
(vin6_sel_s0) pin to low.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
TPS77018DBVT is used to create 1.8V from avm_3v3_sw's 3.3V connected to
aic3106's DVDD.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the name for the supply as it is in the schematics since the same
supply is used for other peripherals than MMC2, like audio.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
On each next iteration of for_each_compatible_node() the reference
counter for current device node is already decreased by the loop
iterator. The manual call to of_node_get() is required only on loop
break which is not happening here.
The double of_node_get() (with enabled CONFIG_OF_DYNAMIC) lead to
decreasing the counter below expected, initial value.
Fixes: fe4034a3fa ("ARM: EXYNOS: Add missing of_node_put() when parsing power domains")
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Remove the unneded semicolons since they are clearly a typo error.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The PRM_POLCTRL_TWL_MASK and PRM_POLCTRL_TWL_MASK
macros are not used so they can be deleted.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Remove board support files for 10 years discontinued VoiceBlue board.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add arch timer node to enable arch-timer support. MT8127 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add arch timer node to enable arch-timer support. MT8135 firmware
doesn't correctly setup arch-timer frequency and CNTVOFF, add
properties to workaround this.
This also set cpu enable-method to enable SMP.
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The OMAP3 ISP is now fully supported in DT, remove its instantiation
from C code.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This cosmetic patch reorder nodes under internal-regs by increasing
address order, as expected.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
By default, armada-370-xp.dtsi file has internal RTC enabled.
NETGEAR ReadyNAS 102, 104 and 2120 all use an Intersil ISL12057
I2C RTC chip. The internal RTC not being disabled in the .dts
files of those devices result in the following useless first
line during boot:
[ 4.500056] rtc-mv d0010300.rtc: internal RTC not ticking
[ 4.505684] i2c /dev entries driver
[ 4.513246] rtc-isl12057 0-0068: rtc core: registered rtc-isl12057 as rtc0
This patch marks Armada internal RTC as disabled in individual .dts
files of those devices.
Reported-by: TuxOholic <tuxoholic@hotmail.de>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch enables the following options needed by the Seagate
Personal Cloud 1 and 2-Bay and the Seagate NAS 2 and 4-Bay:
SATA_AHCI
POWER_RESET_GPIO
RTC_DRV_DS1307
RTC_DRV_PCF8563
Additionnally this patch also enables NEW_LEDS which was missing for
some reasons.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch adds DT support for the Seagate Personal Cloud 1 and 2-Bay.
Here are some information allowing to identify these devices:
Product name | Personal Cloud | Personal Cloud 2-Bay
Code name (board/PCB) | Cumulus | Cumulus Max
Model name (case sticker) | SRN21C | SRN22C
Material desc (product spec) | STCRxxxxxxx | STCSxxxxxxx
Chipset list:
- SoC Marvell Armada 370 88F6707, CPU @1GHz
- SDRAM memory: 512MB DDR3 667MHz (16-bits bandwidth)
- SPI flash 1MB (Macronix MX25L8006E)
- 1 or 2 SATA internal ports
- 1 Ethernet Gigabit port (PHY Marvell 88E1518)
- 1 USB3 host port (PCIe controller ASM1042)
- 1 USB2 host port (SoC)
- 2 push buttons (power and reset)
- 1 SATA LED (bi-color, white and red)
Note that support for the white SATA LED is missing. A dedicated LED
driver is needed.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch adds DT support for the Seagate NAS 2 and 4-Bay.
Here are some information allowing to identify these devices:
Product name | Seagate NAS 2-Bay | Seagate NAS 4-Bay
Code name (board/PCB) | Dart 2-Bay | Dart 4-Bay
Model name (case sticker) | SRPD20 | SRPD40
Material desc (product spec) | STCTxxxxxxx | STCUxxxxxxx
Chipset list (common):
- SoC Marvell Armada 370 88F6707, CPU @1.2GHz
- SDRAM memory: 512MB DDR3 600MHz (16-bits bandwidth)
- NAND flash 256MB, 8-bits (Micron MT29F2G08AAB or Hinyx H27U2G8F2CTR-BC)
- 2 SATA II ports (SoC)
- 1 Ethernet Gigabit ports (PHY Marvell 88E1518)
- 2 USB3 host ports (PCIe controller ASM1042)
- GPIO fan (4 speeds)
- External I2C RTC (MCP7940NT)
- 3 push buttons (power, backup and reset)
- 2 SATA LEDs (bi-color, blue and red)
- 1 power LED (bi-color, blue and red)
Only on 4-Bay models:
- 2 extra SATA III ports (PCIe AHCI controller Marvell 88SE9170)
- 1 extra Ethernet Gigabit ports (PHY Marvell 88E1518)
- I2C GPIO expander (PCA9554A)
- 2 extra SATA LEDs (bi-color, blue and red)
Note that support for the white SATA LEDs associated with HDDs 0 and 1
is missing. A dedicated LED driver is needed.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
All A13 based q8 formfactor tablets use the same backlight setup, add
a backlight devicetree node for controlling the backlight on these devices.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Q8 format tablets use channel 0 of the PWM controller for backlight dimming.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a pinmux setting for the first pwm channel. This is often used for
backlight dimming on tablets.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add dts nodes for the PWM controller on the A13 / A10s.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add cpufreq device for i.MX6UL. Using the common
cpufreq of i.MX6 SOC.
Signed-off-by: Bai Ping <b51503@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The C.H.I.P. is a small SBC with an Allwinner R8, 8GB of NAND, 512MB of
RAM, USB host and OTG, a wifi / bluetooth combo chip, an audio/video jack
and two connectors to plug additional boards on top of it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The AXP22x family of PMIC is used with some Allwinner SoCs. This
includes the AXP221, AXP221s and AXP223. They differ in the host
interface, maximum supply current for DCDC1 regulator, and default
voltage and state for various LDO regulators. Also, the AXP221s
does not support fine calibration of the battery fuel gauge.
This patch adds a dtsi file for all the common bindings for these
PMICs. Currently this is just listing all the regulator nodes. The
regulators are initialized based on their device node names.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Actviate HDMI output of the RCar DU (and LVDS while we are here).
Enable the HDMI encoder chip found on Lager/Koelsch boards.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
for_each_child_of_node performs an of_node_get on each iteration, so
a break out of the loop requires an of_node_put.
The semantic patch that fixes this problem is as follows
(http://coccinelle.lip6.fr):
// <smpl>
@@
expression root,e;
local idexpression child;
@@
for_each_child_of_node(root, child) {
... when != of_node_put(child)
when != e = child
(
return child;
|
+ of_node_put(child);
? return ...;
)
...
}
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the PCIe controller and clock for the Porter board.
This patch is analogous to the commit 485f3ce67c ("ARM: shmobile:
henninger: Enable PCIe Controller & PCIe bus clock") as there are no
differences between the boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Porter board dependent part of the QSPI device node.
Add device nodes for Spansion S25FL512S SPI flash and the MTD partitions
on it.
This patch is mostly analogous to the commit f59838d448 ("ARM:
shmobile: henninger: add QSPI DT support") as there are no differences
between the boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The LinkSprite pcDuino v3 Nano's two USB host ports are powered by a
single RT9701GB regulator, which has its enable input tied to the A20's
PD2 pin, pulled up to 3v3 via a 10k resistor.
However, the script.bin that shipped with the device listed PH11 and PH3
as Vbus control pins for the two USB ports. Neither of these are
actually connected to anything.
Siarhei Siamashka spotted this problem while reviewing the other
LinkSprite boards. This patch fixes it by only defining a single
regulator, controlled by PD2. Testing shows that the USB ports are now
(correctly) only powered up once the USB PHY driver is loaded.
Reported-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Adam Sampson <ats@offog.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a separate pinctrl node for the UART3 CTS and RTS pins shared between
the A10s and A13.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
The uart3 pins are shared between the A10s and A13, move the pinctrl node
to the common DTSI to avoid duplication.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
The R8 is very close to the A13, but it still has a few differences,
notably a composite output, which the A13 lacks.
Add a DTSI based on the A13's to hold those differences.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Enable the otg/drc usb controller on the pcDuino1/2 board. Note
that the pcDuino1 FEX file from the vendor contains the following
information in the [usbc0] section:
usb_id_gpio = port:PH04<0><1><default><default>
usb_det_vbus_gpio = port:PH05<0><0><default><default>
usb_drv_vbus_gpio = port:PB09<1><0><default><0>
While the pcDuino2 FEX has:
usb_id_gpio = port:PH04<0><1><default><default>
usb_det_vbus_gpio = port:PH05<0><0><default><default>
usb_drv_vbus_gpio = port:PD02<1><0><default><0>
The ID pin is indeed PH4. The PD2 pin can be used to switch power
on/off for the USB Type A receptacle on pcDuino2, but it has nothing
to do with the MicroUSB OTG receptacle. The VBUS pin of the MicroUSB
receptacle is always connected to 5V according to the schematics
(both pcDuino1 and pcDuino2) and confirmed by doing some tests on
pcDuino2. The PH5 pin is just one of the pins on the J8 expansion
header and has nothing to do with USB OTG. The PB9 pin is pulled
up and connected to the N_VBUSEN pin of AXP209 PMIC, while the
VBUS pin of AXP209 only has a capacitor between it and the
ground (this pin is not used for anything else).
To sum it up. Only the ID pin (PH4) has a real use. And 5V voltage
is always served to the MicroUSB OTG receptacle no matter what is
the state of the PB9/PD2 pins.
This patch has been tested on pcDuino2 to work fine in a host role
with a USB keyboard connected via an OTG cable. It also works fine
in a device role (cdc_ether) with a regular Micro-B cable connected
to a desktop PC.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The LinkSprite pcDuino2 board is almost identical to the older
LinkSprite pcDuino1 board according to the schematic pdf files.
So we just include the existing "sun4i-a10-pcduino.dts" file and
make the necessary adjustments.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The pcDuino1 board does not use any power switches at all for its
two USB host ports and the VBUS pins are always connected to 5V.
The pcDuino2 board uses the RT9701GB power switch for its single
USB host port, but the USB_EN pin (PD2) is pulled up with a 10K
resistor. So that the USB power is still enabled by default,
resulting in the same behaviour as pcDuino1 if nobody touches
the PD2 pin. This minor difference is going to be handled in a
follow-up patch, introducing a separate dts file for pcDuino2.
The primary reason for this fix is that the current dts file
unnecessarily meddles with the PH3 and PH6 pins. But the PH6 pin
is available on the Arduino-compatible expansion header and may
have a better use for other purposes. This patch fixes the
problem and now the PH6 pin can be used with the GPIO sysfs
interface. Tested on a pcDuino2 board with a multimeter:
echo 230 > /sys/class/gpio/export
echo "out" > /sys/class/gpio/gpio230/direction
echo 0 > /sys/class/gpio/gpio230/value
echo 1 > /sys/class/gpio/gpio230/value
USB still works as expected too.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the otg/drc usb controller on the Bananapi.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
sun7i-a20-bananapi.dts doesn't contain regulator nodes for the AXP209 PMU
driver, so add them to allow for voltage-scaling with cpufreq-dt. Also
add board-specific OPP to use slightly higher voltages at lower
frequencies since Kevin Hilman reported that not all BananaPi boards run
stable at the default voltages inherited by sun7i-a20.dtsi.
Signed-off-by: Timo Sigurdsson <public_timo.s@silentcreek.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch allows ARM guests to use GICv3 on an arm64 host
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Implement the system and memory-mapped register accesses in
asm/arch_gicv3.h for 32bit architectures.
This patch is a straightforward translation of the arm64 header. 64bit
accesses are done in two times and don't need atomicity: TYPER is
read-only, and the upper-word of IROUTER is always zero on 32bit
architectures.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Call brcmstb_biuctrl_init() in brcmstb's init_irq machine descriptor
callback since we need to setup the Bus Interface Unit before SMP in
particular, but we also need to be able to remap registers.
Acked-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Replace console with stdout-path so that we don't have to put the
console on the kernel command line.
Remove earlyprintk to allow the kernel to boot on a system even
if DEBUG_LL is configured for another system.
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Since support for half-word atomic exchange was not there and Qspinlock
on ARM requires it, modified __xchg() to add support for that as well.
ARMv6 and lower does not support ldrex{b,h} so, added a guard code to
prevent build breaks.
Signed-off-by: Sarbojit Ganguly <ganguly.s@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rename feat_c3stop to twd_features to match the other variables in this
file. Initialise it with the standard features that we always support,
and arrange to set the CLOCK_EVT_FEAT_C3STOP when appropriate.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In 5388a6b266 ("ARM: SMP: Always enable clock event broadcast support")
Russell noted that "the TWD local timers are unable to wake up the CPU
when it is placed into a low power mode".
However, some platforms do not stop the TWD block in low-power mode,
and can thus use the TWD timer in one-shot mode, without setting up
a broadcast device.
Make the driver check for the "always-on" boolean property, and set
the CLOCK_EVT_FEAT_C3STOP flag accordingly.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Merge "Broadcom devicetree changes for v4.4" from Florian Fainelli:
This pull requests contains the following Broadcom SoCs Device Tree changes:
- Brian Norris documents the BCM7445 SoCs Power Management controllers and
hardware and updates the reference BCM7445 Device Tree with these nodes
- Florian Fainelli documents the BCM7xxx write-pairing feature in the top-level
BCM7xxx binding document
- Hauke Merthens enables the NAND controller for the Asus RT-AC87U and adds the
GPIO pin controlling the USB power supply on Netgear R6250
- Jon Mason adds support for the NorthStar Plus SoC by providing a top-level
binding document and the minimalist device tree skeleton for these SoCs
- Rafal Milecki adds support for the Netgear R7000 (BCM5301x SoC)
- Ray Jui provides a set of Cygnus DT changes that make the Device Tree clearer
and more correct with respect to how the hardware is designed. He also enables
the NAND controller on the bcm911360_entphn design, enables a bunch of
peripherals on the bcm958305k evaluation board, and adds a skeleton .dtsi file
for the touchscreen extansion board(s)
* tag 'arm-soc/for-4.4/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: move aliases back to .dts in Cygnus
ARM: dts: fix Cygnus nand device node
ARM: dts: enable touchscreen support on Cygnus
ARM: dts: Enable NAND support on bcm911360_entphn
ARM: dts: Enable various peripherals on bcm958305k
ARM: dts: Reorder Cygnus peripherals
ARM: dts: Move all Cygnus peripherals into axi bus
ARM: dts: Put Cygnus core components under core bus
ARM: dts: Use label for device nodes in Cygnus dts
ARM: dts: consolidate aliases for Cygnus dt files
ARM: BCM5301X: Netgear R6250 add USB GPIO
Documentation: bindings: brcmstb: Document write-pairing
ARM: dts: brcmstb: add BCM7445 system PM DT nodes
Documentation: dt: brcmstb: add system PM bindings
ARM: BCM5301X: add NAND flash chip description for Asus RT-AC87U
ARM: BCM5301X: Add DT for Netgear R7000
ARM: NSP: add minimal Northstar Plus device tree
dt-bindings: Create Documentation for NSP DT bindings
system-on-module as well as the square baseboard. On top of that
a lot of mmc-related changes to improve speeds on the Cortex-A9
socs and also setting up the supplies for rk3288 mmc-controllers
for the following mmc-tuning support. And of course the dts-part
of the rk3288 power-domains.
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Merge tag 'v4.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "Rockchip dts32 changes for 4.4" from Heiko Stuebner:
DTS changes including one new Veyron-board and the Radxa Rock2
system-on-module as well as the square baseboard. On top of that
a lot of mmc-related changes to improve speeds on the Cortex-A9
socs and also setting up the supplies for rk3288 mmc-controllers
for the following mmc-tuning support. And of course the dts-part
of the rk3288 power-domains.
* tag 'v4.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add the support power-domain node on RK3288 SoCs
ARM: dts: rockchip: add rk3288-firefly iodomains
ARM: dts: rockchip: fixup firefly mmc supplies
ARM: dts: rockchip: add rk3288-popmetal iodomains
ARM: dts: rockchip: add rk3288-popmetal mmc supplies
ARM: dts: rockchip: add rk3288-popmetal board to dtb list
ARM: dts: rockchip: Add dtb for the Radxa Rock 2 Square board
ARM: dts: rockchip: support highspeed sd-cards on rk3066a boards
ARM: dts: rockchip: support highspeed sd-cards for rk3188-radxarock
ARM: dts: rockchip: Add the hdmi-ddc pinctrl settings for rk3288
ARM: dts: rockchip: Remove specific cts pullup from veyron
ARM: dts: rockchip: pull up cts lines on rk3288
ARM: dts: rockchip: add veyron-jaq board
ARM: dts: rockchip: Add support for SD/MMC on MarsBoard-RK3066
dt-bindings: add power-domain header for RK3288 SoCs
Explicitly use the SoC specific compatible strings in kirkwood.dtsi and
dove.dtsi, so that the crypto devices have access to the TDMA feature
when attached to the new CESA driver.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The new bindings split the crypto and sram node in two separate devices.
Modify the existing crypto nodes to match the new representation.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Define the crypto SRAM ranges so that the resources referenced by the
sa-sram node can be properly extracted from the DT.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add crypto related nodes in armada-38x.dtsi.
[gregory.clement@free-electrons.com: Fix typo for compatible string
armada38x instead of armada375]
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Define the Porter board dependent part of the VIN0 device node.
Add the device node for Analog Devices ADV7180 video decoder to I2C2 bus.
Add the necessary subnodes to interconnect VIN0 and ADV7180 devices.
This patch is analogous to the commit 8d62f4f753 ("ARM: shmobile:
henninger: add VIN0/ADV7180 DT support") as there are no differences
between the boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Porter board dependent part of the I2C2 device node.
This patch is analogous to the commit 29a647c396 ("ARM: shmobile:
henninger: add I2C2 DT support") as there are no differences between
the boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
We can add more domains node in the future.
This patch add the needed clocks into power-controller.
As the discuess about all the device clocks being listed in
the power-domains itself.
There are several reasons as follows:
Firstly, the clocks need be turned off to save power when
the system enter the suspend state. So we need to enumerate
the clocks in the dts. In order to power domain can turn on and off.
Secondly, the reset-circuit should reset be synchronous on RK3288,
then sync revoked. So we need to enable clocks of all devices.
In other words, we have to enable the clocks before you operate them
if all the device clocks are included in someone domians.
Thirdly, as the chip designs for PM hardhare. we need turn on the noc
clocks, if we are operating the "pd_vio" domain to enter the idle status.
The device's clock be included in domains that needed turn on if do that.
The clocks in the dts are needed to enable before you want to happy work.
At the moment, This patch is very good work for PM hardware.
Also, we can add these clocks in the future if we have some hidden clocks.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
[add necessary power-domain properties to keep drm subsys working]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the iodomains node and reference the correct regulator for each
domain. This also includes adding the currently unused dvp regulators.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Fix some incorrect references to mmc regulators.
vccio_wl for example is the io-voltage supply not the core supply
of the wifi module itself, which is vbat_wl instead.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the iodomains node and reference the correct regulator for each
domain. This also includes adding the currently unused dvp regulators
and fixing up two regulators to follow the naming in the schematics.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The popmetal board was not included in the list of Rockchip boards,
so was only built when explicitly called with make rk3288-popmetal.dtb
but not in a generic make dtbs, so add the missing entry.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Radxa Rock 2 Square board is a combination of the Radxa Rock 2 SoM
with the Square baseboard. Add a dtsi for the SoM which can be included
into the dts for the various baseboards (e.g. full and square) and a dts
for the square board.
Currently supported are serial console, wired networking, hdmi output,
eMMC and SD storage and USB.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add cap-sd-highspeed and cap-mmc-highspeed for rk3066a-bqcurie2
and rk3066a-rayeager boards to make sd cards run faster.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add cap-sd-highspeed and cap-mmc-highspeed for rk3188-radxarock
board to make sd cards running faster.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The pins for i2c5 can either be configured as "I2C5" which means that
they're controlled by the normal RK3288 I2C controller or as "EDP / HDMI
I2C". It's unclear why EDP is referenced here since apparently setting
the mux to this position enables I2C communication using the dw_hdmi
block with a patch like <https://patchwork.kernel.org/patch/7098101/>.
There appear to be some reasons why using the builtin I2C controller in
dw_hdmi is better than using the normal RK3288 I2C controller, so boards
based on rk3288 might eventually want to use this pinmux if it's known
to work.
Once driver support in dw_hdmi lands, boards would use this by selecting
this pinctrl for the HDMI block and then _not_ specifying a ddc-i2c-bus
and _not_ setting the status to "okay" for i2c5 (which uses the same
pins).
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
With the previous patch ("rk3288: pull up cts lines") this is redundant,
I sent that patch for the same reason this existed here, so the lines don't
wiggle randomly when disconnected.
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The flow control lines from a user accessible UART are optional,
the user might not have anything connected to those pins.
In order to prevent random interrupts happening and noise affecting
the cts pin should be pulled up.
Note that the default state for that pin on the rk3288 is pulled up,
so this patch merely restores them.
This is similar to what we're already doing with the RX pin,
so it should be safe. At worst it might be a slightly higher power usage
(through ~50 kohms) when the cts is low.
Suggested-by: Neil Hendin <nhendin@chromium.org>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
a.k.a. Haier Chromebook 11, and others
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This enables SDMMC0 on the board and gives a basic support for SD cards.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
DaVinci clock code. And a fix to use a more appropiate
format specifier in a debug message.
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Merge tag 'davinci-for-v4.4/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/fixes-non-critical
Merge "DaVinci non-critical fixes for v4.4" from Sekhar Nori:
Fix for incorrect handling of NULL clk pointer in
DaVinci clock code. And a fix to use a more appropiate
format specifier in a debug message.
* tag 'davinci-for-v4.4/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: clock: Correct return values for API functions
ARM: davinci: re-use %*ph specifier
* Add missing CPG/MSTP Clock Domain for sound on r8a779[01] SoCs
* Tidy up SCI resource region on r8a779[018] SoCs
* Add pinmux for iic0 on Lager board
* Use CCF for audio clock on Lager and Koelsch boards
* Use serial0 and 1 as serial ports on Marzen board
* Use adxl345-specific compatible property for KZM9G board
* Document compat string for Silk board
* Enable GPIO, I2C, PCI, QSPI, USB PHY and HS, and VIN support on r8a7794/Silk
* Add initial support for r8a7791/porter
* Add common file for AA121TD01 panel
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Merge tag 'renesas-dt-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v4.4" from Simon Horman:
* Add missing CPG/MSTP Clock Domain for sound on r8a779[01] SoCs
* Tidy up SCI resource region on r8a779[018] SoCs
* Add pinmux for iic0 on Lager board
* Use CCF for audio clock on Lager and Koelsch boards
* Use serial0 and 1 as serial ports on Marzen board
* Use adxl345-specific compatible property for KZM9G board
* Document compat string for Silk board
* Enable GPIO, I2C, PCI, QSPI, USB PHY and HS, and VIN support on r8a7794/Silk
* Add initial support for r8a7791/porter
* Add common file for AA121TD01 panel
* tag 'renesas-dt-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (28 commits)
ARM: shmobile: porter: add Ether DT support
ARM: shmobile: fix SILK board name
ARM: shmobile: r8a7794: add HS-USB DT support
ARM: shmobile: dts: Add common file for AA121TD01 panel
ARM: shmobile: r8a7794: link PCI USB devices to USB PHY
ARM: shmobile: silk: enable USB PHY
ARM: shmobile: r8a7794: add USB PHY DT support
ARM: shmobile: porter: initial device tree
ARM: shmobile: add Porter board DT bindings
ARM: shmobile: silk: enable internal PCI
ARM: shmobile: r8a7794: add internal PCI bridge nodes
ARM: shmobile: r8a7790: lager: add pinmux for iic0
ARM: shmobile: r8a7778: tidyup SSI resource region
ARM: shmobile: r8a7791: tidyup SSI resource region
ARM: shmobile: r8a7790: tidyup SSI resource region
ARM: shmobile: lager: use CCF for audio clock
ARM: shmobile: koelsch: use CCF for audio clock
ARM: shmobile: silk: add VIN0/ADV7180 DT support
ARM: shmobile: r8a7794: add VIN DT support
ARM: shmobile: silk: add I2C1 DT support
...
The cns3xxx_pcie_hw_init function uses excessive kernel
stack space because of a hack that puts a fake struct
pci_sys_data and struct pci_bus on the stack in order to
call the generic pci_bus_read_config accessors, which causes
a warning in ARM allmodconfig builds:
arch/arm/mach-cns3xxx/pcie.c:266:1: warning: the frame size of 1080 bytes is larger than 1024 bytes
I've spent a few hours trying to find out what exactly this
code is wants to achieve here. The obvious part is setting
up the host_regs using config space accessors, and this can
simply be changed to use direct MMIO accesses, as I do
in this patch.
The second part is how the driver sets up the Max_Read_Request_Size
value for the first device/function on bus 1, i.e. the device
plugged directly into the PCIe root port.
For all I can tell, this is in fact incomplete, as it does not
perform the same setting on devices attached to a PCIe switch,
or multi-function devices.
The solution for this part fortunately is even easier: if we
just set the global pcie_bus_config variable to PCIE_BUS_PEER2PEER,
all PCIe devices in the system are limited to 128 byte MPS, which
in turn limits the MRRS to 128 bytes for all devices, and we
no longer even need to touch any devices.
With those two changes in place, we no longer need the fake
pci_sys_data/pci_bus structures for faking config space writes,
and the stack usage goes down as well.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Krzysztof Halasa <khalasa@piap.pl>
Enable SATA0 device for the Porter board.
This patch is analogous to the commit 5a62ec5700 ("ARM: shmobile:
henninger: enable SATA0") as there are no differences between the boards
in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The Peach boards use the EC to store the vboot context information,
so add the corresponding properties on the EC node to indicate so.
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Emilio Lopez <emilio.lopez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
1. Enable DMA on Exynos4 serial ports. This old patch uncovered
a number of other issues in dmaengine and samsung serial driver.
All of known issues are resolved so finally enable the DMA for UART.
2. Fix incorrect location of display-timings node (FIMD->DP node)
on Arndale, SMDK5250 and SMDK5240 boards.
3. Minor cleanups.
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Merge tag 'samsung-dt-4.4-2' of http://github.com/krzk/linux into v4.4-next/dt-samsung
Device Tree improvements for Exynos based boards (updated pull request):
1. Enable DMA on Exynos4 serial ports. This old patch uncovered
a number of other issues in dmaengine and samsung serial driver.
All of known issues are resolved so finally enable the DMA for UART.
2. Fix incorrect location of display-timings node (FIMD->DP node)
on Arndale, SMDK5250 and SMDK5240 boards.
3. Minor cleanups.
Fix the values returned by the publicly used functions.
These function should return 0 when they are called with clk == NULL in
similar manner as the clock API does to avoid different behavior in drivers
used by daVinci and other architectures.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
%*ph specifier allows to dump data in hex format using the pointer
to a buffer. This is suitable to use here.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
"dcdc1-supply" and "dcdc5-supply" have been dropped, as they are
internally connected and should not be represented in the device
tree.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Reduced Serial Bus controller is used to talk to the onboard PMIC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Reduced Serial Bus controller is used to talk to the onboard PMIC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds a device node for the Reduced Serial Bus (RSB)
controller and the defacto pinmux setting to the A23/A33 dtsi.
Since there is only one possible pinmux setting for RSB, just
set it in the dtsi.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Define the Porter board dependent part of the SDHI0/2 device nodes along
with the necessary voltage regulators (note that the Vcc regulators are
dummy -- they are required but don't actually exist on the board). Also,
GPIOs have to be used for the CD and WP signals due to the SDHI driver
constraints...
This patch is analogous to the commit 1299df03d7 ("ARM: shmobile:
henninger: add SDHI0/2 DT support") as there are no differences between
those boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The ID and period for the backlight PWM are obtained from a PWM lookup
table, so the corresponding values don't need to be duplicated into the
platform data.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
With future SoCs of keystone2 family, the generic compatible match
may not be sufficient to handle SoC specific handling. So introduce
matches based on SoC compatiblity.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
- a MAINTAINER addition to cover SAMA5 SoCs
- removal of one unneeded header file
- for low-level serial output, use the DEBUG_UART_PHYS
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Merge tag 'at91-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/soc
Merge "First little batch of SoC changes for 4.4" from Nicolas Ferre:
- a MAINTAINER addition to cover SAMA5 SoCs
- removal of one unneeded header file
- for low-level serial output, use the DEBUG_UART_PHYS
* tag 'at91-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91: debug: use DEBUG_UART_PHYS
ARM: at91: remove useless includes in platform_data/atmel.h
MAINTAINERS: explicitly add Atmel SAMA5
* ARM: shmobile: R-Mobile: Use CPG/MSTP Clock Domain attach/detach helpers
This part of a multi-stage effort by Geert Uytterhoeven to add:
"Clock Domain support to the Clock Pulse Generator (CPG) Module Stop
(MSTP) Clocks driver using the generic PM Domain, to be used on shmobile
SoCs without device power domains (R-Car Gen1 and Gen2, RZ). This allows
to power-manage the module clocks of SoC devices that are part of the
CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume,
similar to SoCs with device power domains (SH-Mobile and R-Mobile)."
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Merge tag 'renesas-soc-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Merge "Renesas ARM Based SoC Updates for v4.4" from Simon Horman:
* ARM: shmobile: R-Mobile: Use CPG/MSTP Clock Domain attach/detach helpers
This part of a multi-stage effort by Geert Uytterhoeven to add:
"Clock Domain support to the Clock Pulse Generator (CPG) Module Stop
(MSTP) Clocks driver using the generic PM Domain, to be used on shmobile
SoCs without device power domains (R-Car Gen1 and Gen2, RZ). This allows
to power-manage the module clocks of SoC devices that are part of the
CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume,
similar to SoCs with device power domains (SH-Mobile and R-Mobile)."
* tag 'renesas-soc-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: R-Mobile: Use CPG/MSTP Clock Domain attach/detach helpers
clk: shmobile: mstp: Consider "zb_clk" suitable for power management
- Add base arm64 dts for Statrix 10
- Peripheral updates for Arria10(USB,I2C,UART)
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Merge tag 'socfpga_dts_for_v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
Merge "SoCFPGA DTS updates for v4.4" from Dinh Nguyen:
- Add base arm64 dts for Statrix 10
- Peripheral updates for Arria10(USB,I2C,UART)
* tag 'socfpga_dts_for_v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: Add base stratix 10 dtsi
ARM: socfpga: dts: enable USB and I2C on Arria10 SoCDK
ARM: socfpga: dts: add clock fields for I2C, UART and USB on Arria10
- some DT fixes: dma declaration, led labels
- disable some nodes: PMIC on sama5d3 Xplained, unused i2c1 on at91sam9n12ek
- add some others that were missing: touchscreen, cryto nodes, LCD panels or
image capture properties on various boards
- as the new pinmux for sama5d2 was accepted, we can now add the definitions
and the actual muxing for sama5d2 Xplained board
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Merge tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "First batch of DT changes for 4.4:" from Nicolas Ferre:
- some DT fixes: dma declaration, led labels
- disable some nodes: PMIC on sama5d3 Xplained, unused i2c1 on at91sam9n12ek
- add some others that were missing: touchscreen, cryto nodes, LCD panels or
image capture properties on various boards
- as the new pinmux for sama5d2 was accepted, we can now add the definitions
and the actual muxing for sama5d2 Xplained board
* tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: sama5d2 Xplained: add device pin muxing
ARM: at91/dt: add sama5d2 pinmux
ARM: at91/dt: ov2640: add hsync/vsync-active property
ARM: at91/dt: sama5d4 xplained: enable the led D8
ARM: at91/dt: sama5d4ek: Add support of QT1070 and Maxtouch
ARM: at91/dt: sama5d4: enable crypto nodes
ARM: at91/dt: sama5d4: add pioD pin mux mask and enable pioD
ARM: at91/dt: sama5d3: update iio config for touchscreen
ARM: at91/dt: sama5d3 xplained: disable pmic
ARM: at91/dt: at91sam9x5: enable iio touchscreen for 9x5ek
ARM: at91/dt: at91sam9n12ek: disable i2c1
ARM: at91/dt: at91sam9n12ek: fix the led labels name
ARM: at91/dt: corrections to i2c1 declaration to sama5d4
DSA expects the host_dev pointer to be the device structure associated
with the MDIO bus controller driver. First commit breaking that was
c3a07134e6 ("mv643xx_eth: convert to use the Marvell Orion MDIO
driver"), and then, it got completely under the radar for a while.
Reported-by: Frans van de Wiel <fvdw@fvdw.eu>
Fixes: c3a07134e6 ("mv643xx_eth: convert to use the Marvell Orion MDIO driver")
CC: stable@vger.kernel.org
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Similar to the power management situation on Rockchip boards, there are
two common RTC setups. For boards using the RK808 chip as a PMIC that
chip also serves as the RTC, while boards using the ACT8846 typically use
the Haoyu Microelectronics HYM8563 chip as their RTC.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Most Rockchip SoCs have a DesignWare HS OTG USB 2.0 controller, enable
the driver for the Rockchip USB 2.0 PHY to make that functional.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable options needed for HDMI out on rockchip: DRM driver, Rockchip
DesignWare HDMI glue and the rockchip IOMMU (dependency of the DRM
driver).
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Rockchip boards seem to have two common regulator setups. Various board
used the Active Semi act8846 often in combination with Silergy syr82x
regulators (e.g. Radxa Rock Pro/Rock 2, Firefly, and Netxeon R89 etc),
while others use regulator part of the Rockchip RK808 chip (e.g. the
various Veyron based chromebooks, Chipspark Popmetal etc)
Enable all these regulators.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable Rockchip I2C, SPI, PWM, thermal drivers.
Builtin are I2C (as it often required to control the pmic) and Thermal
drivers (to prevent thermal damage). SPI and PWM drivers configured as
modules
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds few missing essential configs in the multi_v7_defconf,
absense of some configs like PINCTRL_APQ8064 would prevent the board from
getting access to serial.
cc: Kevin Hilman <khilman@kernel.org>
cc: Tyler Baker <tyler.baker@linaro.org>
Tested-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "Broadcom defconfig changes for v4.4" from Florian Fainelli:
This pull request contains the following changes for the multi_v7_defconfig:
- Jon adds support for the NorthStar Plus SocS to the multi_v7_defconfig file
* tag 'arm-soc/for-4.4/defconfig' of http://github.com/Broadcom/stblinux:
ARM: multi_v7_defconfig: Add NSP to defconfig
* Remove now non-existent MACH_MARZEN from defconfigs
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Merge tag 'renesas-defconfig-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/defconfig
Merge "Renesas ARM Based SoC Defconfig Updates for v4.4" from Simon Horman:
* Remove now non-existent MACH_MARZEN from defconfigs
* tag 'renesas-defconfig-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: multi_v7_defconfig: Remove Marzen
ARM: shmobile: Remove Marzen from shmobile_defconfig
These are just two followup cleanups for commits that are in v3.17-rc1 and
waited in my private tree for application since that time.
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Merge tag 'efm32-for-4.4-rc1' of git://git.pengutronix.de/git/ukl/linux into next/cleanup
Merge "efm32 cleanups for 4.4-rc1" from Uwe Kleine-Koenig:
These are just two followup cleanups for commits that are in v3.17-rc1 and
waited in my private tree for application since that time.
* tag 'efm32-for-4.4-rc1' of git://git.pengutronix.de/git/ukl/linux:
ARM: efm32: switch to vendor,device compatible strings
ARM: efm32: switch to properly namespaced location property
* Add Add CPG/MSTP Clock Domain for sound on r8a779[01] SoCs.
This allows sound to work once again.
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Merge tag 'renesas-fixes-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Merge "Renesas ARM Based SoC Fixes for v4.3" from Simon Horman
* Add Add CPG/MSTP Clock Domain for sound on r8a779[01] SoCs.
This allows sound to work once again.
* tag 'renesas-fixes-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791 dtsi: Add CPG/MSTP Clock Domain for sound
ARM: shmobile: r8a7790 dtsi: Add CPG/MSTP Clock Domain for sound
Two patches, one that fixes one of the DT build, and the other raising the
voltage of the lowest OPP of the A20 to remain within the SoC operating
boundaries
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Merge tag 'sunxi-fixes-for-4.3' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Merge "Allwinner fixes for 4.3" from Maxime Ripard:
Two patches, one that fixes one of the DT build, and the other raising the
voltage of the lowest OPP of the A20 to remain within the SoC operating
boundaries
* tag 'sunxi-fixes-for-4.3' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dts: Fix Makefile target for sun4i-a10-itead-iteaduino-plus
ARM: dts: sunxi: Raise minimum CPU voltage for sun7i-a20 to meet SoC specifications
- fix invalid clock used for FIMD IOMMU
- fix thermal boot issue smdk5250-smdk5250
- fix S2R on exynos4412 trats2 boards
- fix LEDs on exynos5422-odroidxu3-common
- fix booting of all 8 cores on exynos542x
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Merge tag 'samsung-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
Merge "Samsung fixes for v4.3" from Kukjin Kim:
- fix invalid clock used for FIMD IOMMU
- fix thermal boot issue smdk5250-smdk5250
- fix S2R on exynos4412 trats2 boards
- fix LEDs on exynos5422-odroidxu3-common
- fix booting of all 8 cores on exynos542x
* tag 'samsung-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Fix wrong clock binding for sysmmu_fimd1_1 on exynos5420
ARM: dts: Fix bootup thermal issue on smdk5250
ARM: dts: add suspend opp to exynos4412
ARM: dts: Fix LEDs on exynos5422-odroidxu3
ARM: EXYNOS: reset Little cores when cpu is up
On the Arria10 Devkit, the I2C bus has a serial EEPROM and an RTC
hanging off it. Also, enable the USB node.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Add the required clock fields for all the I2C nodes. Also add missing clock
fields for UART0 and USB1.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
The regulator-compatible property from the regulator DT binding was
deprecated and the correct approach is to use the node's name.
This patch has no functional changes but by not using a deprecated
property, new DTS based on this one will not carry the same issue.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch moves the display-timings node from fimd to dp to reflect the
device tree bindings change.
Signed-off-by: Sean Paul <seanpaul@chromium.org>
[tomeu.vizoso@collabora.com: Rebased]
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Define the Porter board dependent part of the Ether device node.
Enable DHCP and NFS root for the kernel booting.
This patch is analogous to the commit 26b0d2cf73 ("ARM: shmobile:
henninger: add Ether DT support") as there are no differences between
those boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This patch adds a PWM node in the Berlin BG2CD device tree, using the
newly added Berlin PWM driver.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This patch adds a PWM node in the Berlin BG2 device tree, using the
newly added Berlin PWM driver.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This patch adds a PWM node in the Berlin BG2Q device tree, using the
newly added Berlin PWM driver.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
For ARMv7 with UDIV instruction support, generate an UDIV instruction
followed by an MLS instruction.
For other ARM variants, generate code calling a C wrapper similar to
the jit_udiv() function used for BPF_ALU | BPF_DIV instructions.
Some performance numbers reported by the test_bpf module (the duration
per filter run is reported in nanoseconds, between "jitted:<x>" and
"PASS":
ARMv7 QEMU nojit: test_bpf: #3 DIV_MOD_KX jited:0 2196 PASS
ARMv7 QEMU jit: test_bpf: #3 DIV_MOD_KX jited:1 104 PASS
ARMv5 QEMU nojit: test_bpf: #3 DIV_MOD_KX jited:0 2176 PASS
ARMv5 QEMU jit: test_bpf: #3 DIV_MOD_KX jited:1 1104 PASS
ARMv5 kirkwood nojit: test_bpf: #3 DIV_MOD_KX jited:0 1103 PASS
ARMv5 kirkwood jit: test_bpf: #3 DIV_MOD_KX jited:1 311 PASS
Signed-off-by: Nicolas Schichan <nschichan@freebox.fr>
Acked-by: Alexei Starovoitov <ast@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Without this patch, if the only instructions using r_X are of the
BPF_LD | BPF_IND type, r_X would not be reset to 0, using whatever
value was there when entering the jited code. With this patch, r_X
will be correctly marked as used so it will be reset to 0 in the
prologue code.
This fix also makes the test "LD_IND byte default X" pass in the
test_bpf module when the ARM JIT is enabled.
Signed-off-by: Nicolas Schichan <nschichan@freebox.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
This allows voltage-scaling with cpufreq-dt. The reliability of
voltage-scaling has been checked by reducing the voltage of all
operating points by 0.025V (for extra safety headroom) and running
libjpeg-turbo decoding tests on 5 pcDuino2 boards. It means that
the standard sun4i voltages should be perfectly fine too.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Define the R8A7794 generic part of the HS-USB device node.
It is up to the board file to enable the device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
When highmem is enabled, there's little reason not to also enable
highpte support as well. Rather than leaving this to chance, make
it an expert option, and default it to be enabled if highmem is
enabled. Add some help text to the option while we're here.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Mimicking the same config option on x86, this allows for 1GB systems to
have their RAM entirely mapped as low memory.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Currently on ARM when <SysRq-L> is triggered from an interrupt handler
(e.g. a SysRq issued using UART or kbd) the main CPU will wedge for ten
seconds with interrupts masked before issuing a backtrace for every CPU
except itself.
The new backtrace code introduced by commit 96f0e00378 ("ARM: add
basic support for on-demand backtrace of other CPUs") does not work
correctly when run from an interrupt handler because IPI_CPU_BACKTRACE
is used to generate the backtrace on all CPUs but cannot preempt the
current calling context.
This can be fixed by detecting that the calling context cannot be
preempted and issuing the backtrace directly in this case. Issuing
directly leaves us without any pt_regs to pass to nmi_cpu_backtrace()
so we also modify the generic code to call dump_stack() when its
argument is NULL.
Acked-by: Hillf Danton <hillf.zj@alibaba-inc.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Dumping registers from other sleeping tasks in KGDB was totally
failing for me. All registers were reported as 0 in many cases.
The code was using task_pt_regs(task) to try to get other thread
registers. This doesn't appear to be the right place to look. From
my tests, I saw non-zero values in this structure when we were looking
at a kernel thread that had a userspace task associated with it, but
it contained the register values from the userspace task. So even in
the cases where registers weren't reported as 0 we were still not
showing the right thing.
Instead of using task_pt_regs(task) let's use task_thread_info(task).
This is the same place that is referred to when doing a dump of all
sleeping task stacks (kdb_show_stack() -> show_stack() ->
dump_backtrace() -> unwind_backtrace() -> thread_saved_sp()).
As further evidence that this is the right thing to do, you can find
the following comment in "gdbstub.c" right before it calls
sleeping_thread_to_gdb_regs():
Pull stuff saved during switch_to; nothing else is accessible (or
even particularly relevant). This should be enough for a stack
trace.
...and if you look at switch_to() it only saves r4-r11, sp and lr.
Those are the same registers that I'm getting out of the
task_thread_info().
With this change you can use "info thread" to see all tasks in the
kernel and you can switch to other tasks and examine them in gdb.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Tested-by: Stephen Boyd <sboyd@codeurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
IOMMU-based dma_mmap() implementation lacked proper support for offset
parameter used in mmap call (it always assumed that mapping starts from
offset zero). This patch adds support for offset parameter to IOMMU-based
implementation.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: stable@vger.kernel.org # v3.6+
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
dma_mmap() function in IOMMU-based dma-mapping implementation lacked
a check for valid range of mmap parameters (offset and buffer size), what
might have caused access beyond the allocated buffer. This patch fixes
this issue.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: stable@vger.kernel.org # v3.6+
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Mark Brand reports that a NEEDS_SYSCALL_FOR_CMPXCHG enabled kernel would
open a security hole in the ghost syscall used to implement cmpxchg, as
it fails to validate the user pointer.
However, in order for this option to be enabled, you'd need to be
building a pre-ARMv6 kernel with SMP support. There is only one system
known which fits that, which is an early ARM SMP FPGA implementation
based on the ARM926T.
In any case, the Kconfig does not allow SMP to be enabled for pre-ARMv6
systems.
Moreover, even if NEEDS_SYSCALL_FOR_CMPXCHG were to be enabled, the
kernel would not build as __ARM_NR_cmpxchg64 is not defined.
The simple answer is to remove the buggy code.
Reported-by: Mark Brand <markbrand@google.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add unwinding annotations so that unwinding from this function
works properly.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Header <asm/kdebug.h> is not needed for arm/hw_breakpoint.c, so remove
the pointless #include.
Signed-off-by: Maninder Singh <maninder1.s@samsung.com>
Reviewed-by: Vaneet Narang <v.narang@samsung.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This reverts commit 904464b91e.
The problem pointed out by commit 904464b91e ("ARM: 7655/1:
smp_twd: make twd_local_timer_of_register() no-op for nosmp")
doesn't exist anymore.
We can safely boot with nosmp and the warning won't show up.
The other side benefit of this patch is that TWD has a chance
to probe on single-core A9 systems such as AM437x which sport
TWD.
While at that, also drop SMP dependency from TWD's Kconfig entry.
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As we need to add further flags to the bpf_prog structure, lets migrate
both bools to a bitfield representation. The size of the base structure
(excluding insns) remains unchanged at 40 bytes.
Add also tags for the kmemchecker, so that it doesn't throw false
positives. Even in case gcc would generate suboptimal code, it's not
being accessed in performance critical paths.
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Alexei Starovoitov <ast@plumgrid.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Commit 72daceb9a1 ("net: rfkill: gpio: Add default GPIO driver mappings
for ACPI") removed possibility to request GPIO by table index for non-ACPI
platforms without changing its users. As result "shutdown" GPIO request
will fail if request for "reset" GPIO succeeded or "reset" will be
requested instead of "shutdown" if "reset" wasn't defined. Fix it by
making gpiod_lookup_table use con_id's instead of indexes.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Fixes: 72daceb (net: rfkill: gpio: Add default GPIO driver mappings for ACPI)
Cc: <stable@vger.kernel.org> # v3.19+
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Marc Dietrich <marvin24@gmx.de>
Tested-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Mitsubishi AA121TD01 panel is commonly used with the Marzen, Lager
and Koelsch boards. Create a .dtsi file that describe the panel and its
connection to the board.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
CPU id can be negative, so it cannot be assigned to unsigned variable.
The problem has been detected using proposed semantic patch
scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1].
[1]: http://permalink.gmane.org/gmane.linux.kernel/2038576
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the PCI USB devices that are behind the PCI bridges, adding necessary
links to the USB PHY device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable USB PHY device for the SILK board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the R8A7794 generic part of the USB PHY device node. It is up to the
board file to enable the device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the R8A7791 SoC based Porter low cost board
(which is a slightly modified version of the Henninger board).
SCIF0 serial port support is included, so that the serial console can work.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a new type of clocks that can be provided to a peripheral.
In addition to the peripheral clock, this new clock that can use several
input clocks as parents can generate divided rates.
This would allow a peripheral to have finer grained clocks for generating
a baud rate, clocking an asynchronous part or having more
options in frequency.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[sboyd@codeaurora.org: Transition to new clk_hw provider APIs]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Currently, BG2Q shares a compatible with BG2. This is incorrect, since
BG2 and BG2Q use different USB PLL dividers. In reality, BG2Q shares a
divider with BG2CD. Change BG2Q's USB PHY compatible string to reflect
that.
Cc: <stable@vger.kernel.org> # v4.2.0-
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The A20-SOM-EVB is a reference design of a 2-layer board for the
A20-SOM.
It expands the features of A20-SOM by adding VGA connector, HDMI
connector, audio In/Out, LCD connector, 2 Mpix camera, gigabit
Ethernet, SATA, USB-OTG and 2 USB hosts.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The hummingbird A31 has 2 rtc devices available: one in the SoC,
and a pcf8563 external rtc on i2c2.
For some unknown reason, the onboard backup battery alone can not
supply enough power to the internal rtc. When external power is
removed, the internal rtc would reset. Hence we want to use the
external one by default.
Add aliases for the rtc devices with the external one as rtc0.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
As of commit c99cd90d98 ("ARM: shmobile: r8a7779: Remove legacy
SoC code"), r8a7779_init_pm_domains() is no longer called.
Remove all related legacy PM Domain code.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As of commit 4baadb9e05 ("ARM: shmobile: r8a7778: remove obsolete
setup code"), r8a7778_init_irq_dt() is no longer used outside
setup-r8a7778.c.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
shmobile_smp_apmu_cpu_shutdown() is used inside platsmp-apmu.c only.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Seeing the 'of' characters in a symbol that is being called from
ACPI seems to freak out people. So let's do a bit of pointless
renaming so that these folks do feel at home.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Add the I2C0 bus and the some of the I2C devices on the Hitex
LPC4350 eval board.
Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
The Hitex LPC4350 eval board has a Spansion S25SL064P SPI-NOR Flash connected
to the SPIFI perherial.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Most of the peripherals on LPC18xx/43xx devices have their reset
lines hooked up to internal reset controller (RGU). Add reset
entries to the device nodes so a driver can use the reset line.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
NXP LPC SoCs family, which includes LPC18xx/LPC43xx, provides a State
Configurable Timer (SCT) which can be configured as a Pulse Width
Modulator.
Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Add node for the watchdog timer found on LPC18xx/LPC43xx.
Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Add dmas entries to the four UART peripherals on LPC18xx/43xx devices
so that DMA can be used to transfer data.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Add dmas entries to the two SSP peripherals on LPC18xx/43xx devices
so that DMA can be used to transfer data.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
This patch configure correctly the MMC-0 clock for STiH418 platform.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached to
them.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add device nodes for the R8A7794 internal PCI bridge devices.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now we have default pinconfig groups for each SPI
controller ensure it is used by the SPI controller
node.
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the RMII pinctrl support for the Synopsys
MAC on STiH407 SoCs.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the pinconfig for IRB TX and IRB UHF.
Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the missing SD pinctrl config
for mmc/sd controller 0. This is required to enable the
B2144A daughter board that exposes this controller as a sd
slot.
Signed-off-by: Nebil BEN MEFTEH <nebil.ben-mefteh@st.com>
Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the pin config for systrace for
STiH407 family silicon.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds NAND flash support controller pin configuration
for STiH407 family silicon.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the pin configuration for the NOR flash controller.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Add missing serial 3 pinctrl config. This can be used
on b2206 HVK, where it defaults to PIO31[3] & PIO31[4],
alternate 1.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: Carmelo Amoroso <carmelo.amoroso@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the spi pinctrl configurations for all SPI
controllers, and also the alternate muxings which
can be used depending on board design.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
i2c3 controller can use several sets of pins depending
on board design. This patch adds the missing alternate
pinconfigs.
Signed-off-by: Seraphin Bonnaffe <seraphin.bonnaffe@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This pin setup provides the correct configuration in order to
interact with the CEC HW.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Nicolas Vanhaelewyn <nicolas.vanhaelewyn@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
There are 2 revisions of the Exynos5250 Snow Chromebook that were
shipped: Rev4 and Rev5. The only difference between these 2 revisions
is the codec, Rev4 has a max98095 codec while Rev5 has a max98090.
Mainline only supports Rev4 so this patch moves the common device
nodes to a DTSI file and adds a DTS for the Exynos5250 Snow Rev5.
The Snow Rev5 DTS is based on the DTS found in the ChromiumOS 3.8
tree.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
1. Finally fix booting of all 8 cores on Exynos Octa (Exynos542x): all
8 cores are booting and can be used. The fix, based on vendor
code and bootloader behavior, is as for time being only
for MCPM enabled path.
2. Fix thermal boot issue on SMDK5250.
3. Fix invalid clock used for FIMD IOMMU.
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Merge tag 'samsung-fixes-4.3' of http://github.com/krzk/linux into v4.3-samsung-fixes
Fixes for Exynos (DT and mach code):
1. Finally fix booting of all 8 cores on Exynos Octa (Exynos542x): all
8 cores are booting and can be used. The fix, based on vendor
code and bootloader behavior, is as for time being only
for MCPM enabled path.
2. Fix thermal boot issue on SMDK5250.
3. Fix invalid clock used for FIMD IOMMU.
The UART2 memory space starts at address 0x30890000 (UART2_URXD).
Fix it so that UART2 can be used.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fixes: 9496734502 ("ARM: dts: add imx7d soc dtsi file")
Cc: <stable@vger.kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Merge tag 'v4.3-rc3' into next
Merge with Linux 4.3-rc3 to bring in MFD DA9062 changes to merge DA9062
OnKey driver.
Fix the armada_370_xp_pmsu_idle_enter() function to use a CR_C
constant instead of a hard-coded constant in the assembly part.
This clean-up was suggested by Russell King.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
A board might not expose the USB2.0 ports, so disable them by default in SoC
file, and enable them in b2120 board.
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Define the crypto SRAM ranges so that the resources referenced by the
sa-sram node can be properly extracted from the DT.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add crypto related nodes in armada-375.dtsi.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Define the crypto SRAM ranges so that the resources referenced by the
sa-sram node can be properly extracted from the DT.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Define the crypto SRAM ranges so that the resources referenced by the
sa-sram node can be properly extracted from the DT.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The display nodes are common to both STiH407 and STiH410, move them to the
family file.
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The PWM may not be used on some boards, so enable them only the board file.
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Add crypto related nodes to armada-xp.dtsi.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit adds the description of the CPU config registers in the
Armada 370 and Armada XP Device Tree. Since the registers are in fact
different between the two SoCs, a different compatible string is used.
Note that the Armada 370 node is currently unused, but it is
nonetheless added for consistency with the addition on the Armada XP
side.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
For optimal performance, in a HW I/O coherency context such as the one
used on Armada XP, the shared L2 bit of the CPU configuration register
should be cleared.
This commit adjusts the coherency fabric code used by Marvell EBU
processors to clear this bit on Armada XP. Since it's a per-CPU
register, it's cleared in set_cpu_coherent() for the boot CPU, and
through a CPU notifier for the non-boot CPUs.
[gregory.clement@free-electrons.com: rebasd on 4.3-rc1]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Wits Pro A20 DKT is an A20 Development KiT with 1G RAM, 4G NAND,
sdio wifi, 1Gbit ethernet, 1024x768 lcd screen with ft5x_ts touchscreen
and a ton of IO connectors.
Note there seem to be multiple sdcard slots on the board (4 in total), but
other then mmc0 none of these are hooked up by default, there is a ton of
dip-switches which likely allow hooking some of these up, but the
documentation of the board only describes the use of a fraction of them,
so for now we only support mmc0.
Signed-off-by: Jelle de Jong <jelledejong@powercraft.nl>
[hdegoede@redhat.com: Use pwrseq instead of a regulator for the wifi-en pin]
[hdegoede@redhat.com: Add support for OOB irq for the sdio wifi]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the otg/drc usb controller on the Wexler TAB7200 tablet.
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add usb otg support for Orange pi, based on Orange pi mini.
Signed-off-by: Reinder de Haan <patchesrdh@mveas.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the otg/drc usb controller on the orangepi-mini.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a node representing the usb power supply part of the axp209 pmic, note
that the usb power supply and the (to be added later) ac power supply will
each have their own child-node, so that they can be separately specified
as power-supply for other nodes using a power-supply property with a
phandle pointing to the right axp209 child-node.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Use 'ldoN_reg: LDON' syntax and drop the deprecated
'regulator-compatible' property.
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The pinctrl settings in i2c_0 and i2c_1 are already provided
through the exynos4 dtsi.
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The change corrects cpu compatible property to a defined one,
see Documentation/devicetree/bindings/arm/cpus.txt
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The sysmmu_fimd1_1 should bind the clock CLK_SMMU_FIMD1M1, not the clock
CLK_SMMU_FIMD1M0. CLK_SMMU_FIMD1M0 is a clock for the sysmmu_fimd1_0.
This wrong clock binding causes the problem that is blocked in iommu_map
function when IOMMU is enabled and exynos-drm driver tries to allocate
buffer via DMA mapping API on Odroid-XU3 board.
Fixes: b700451678 ("ARM: dts: add sysmmu nodes for exynos5420")
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Cc: <stable@vger.kernel.org> # v4.2
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
With default config on smdk5250 latest tree throws below message:
[ 2.226049] thermal thermal_zone0: critical temperature reached(224 C),shutting down
[ 2.227840] reboot: Failed to start orderly shutdown: forcing the issue
and hangs randomly because it reads wrong temperature value.
I can't figure out any direct relation between LDO10 and TMU from board
schematics which I have. So making LDO10 always-on to fix issue for now.
Signed-off-by: Yadwinder Singh Brar <yadi.brar01@gmail.com>
[pankaj.dubey: resubmitted after rebasing to latest kgene tree]
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Tested-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
797a0626e0 ("ARM: shmobile: r8a7791 dtsi: Add CPG/MSTP Clock Domain")
added CPG/MSTP clock-cells domain support, but it was missing sound
support. This patch adds it.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms: updated commit id referred to in changelog]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
484adb0058 ("ARM: shmobile: r8a7790 dtsi: Add CPG/MSTP Clock Domain")
added CPG/MSTP clock-cells domain support, but it was missing sound
support. This patch adds it.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms: Updated commit id referred to in changelog]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- One fix for i.MX6 Rex Pro board to remove a duplicated pinctrl entry
which causes error for USB pinctrl setup.
- Fix MC34708 PMIC interrupt level for imx53-qsrb board.
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Merge tag 'imx-fixes-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
The i.MX fixes for 4.3:
- One fix for i.MX6 Rex Pro board to remove a duplicated pinctrl entry
which causes error for USB pinctrl setup.
- Fix MC34708 PMIC interrupt level for imx53-qsrb board.
* tag 'imx-fixes-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: fix usb pin control for imx-rex dts
ARM: imx53: qsrb: fix PMIC interrupt level
ARM: imx53: include IRQ dt-bindings header
Signed-off-by: Olof Johansson <olof@lixom.net>
RiscPC fails to build if MMU is disabled:
arch/arm/mach-rpc/ecard.c: In function 'ecard_init_pgtables':
arch/arm/mach-rpc/ecard.c:229:2: error: implicit declaration of function 'pgd_offset' [-Werror=implicit-function-declaration]
arrange for RiscPC to depend on MMU.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
A33 Q8 tablets with the ippo-q8h-v1.2 pcb will work fine with the
generic q8-tablet.dts and given the many variants of PCBs found in
Q8 tablets using such a specific dts name was a mistake in hindsight.
We cannot just drop the ippo-q8h-v1.2.dtb as existing u-boot configs
may very well point to it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This is a generic dts file for A33 based q8 formfactor tablets,
this is intended to replace both sun8i-a33-ippo-q8h-v1.2.dts and
sun8i-a33-et-q8-v1.6.dts (these can be fully dropped after a
transition period).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that the driver respects IRQ trigger settings from device tree, let's
fix them up in individual DTSes (note that the driver is still compatible
with older DTSes).
Acked-by: Felipe Balbi <balbi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Add node for the DMA multiplexer placed in front of the PL080 DMA
controller on lpc18xx/43xx devices.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Add the NXP LPC1773 SPIFI (SPI Flash Interface) flash controller
node to the dtsi for all lpc18xx/43xx devices.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Add the NXP LPC1850 RGU (Reset Generation Unit) reset controller
node to the dtsi for all lpc18xx/43xx devices.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
this driver has long ago became dwc2.ko with
both peripheral and host roles, there's no point
in keeping the old function names.
Acked-by: John Youn <johnyoun@synopsys.com>
Tested-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
The regulator-compatible property from the regulator DT binding was
deprecated and the correct approach is to use the node's name.
This patch has no functional changes since the values of the node's
name and the regulator-compatible match for all the regulators.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Pull ARM fixes from Russell King:
"Just two fixes: wire up the new system calls added during the last
merge window, and fix another user access site"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: alignment: fix alignment handling for uaccess changes
ARM: wire up new syscalls
Our first real batch of fixes this release cycle. There's a collection of
them here:
- A fixup for a build breakage that hits on arm64 allmodconfig in QCOM SCM
firmware drivers
- MMC fixes for OMAP that had quite a bit of breakage this merge window.
- Misc build/warning fixes on PXA and OMAP
- A couple of minor fixes for Beagleboard X15 which is now starting to see
a few more users in the wild
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Our first real batch of fixes this release cycle. Nothing really
concerning, and diffstat is a bit inflated due to some DT contents
moving around on STi platforms.
There's a collection of them here:
- A fixup for a build breakage that hits on arm64 allmodconfig in
QCOM SCM firmware drivers
- MMC fixes for OMAP that had quite a bit of breakage this merge
window.
- Misc build/warning fixes on PXA and OMAP
- A couple of minor fixes for Beagleboard X15 which is now starting
to see a few more users in the wild"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits)
ARM: sti: dt: adapt DT to fix probe/bind issues in DRM driver
ARM: dts: fix omap2+ address translation for pbias
firmware: qcom: scm: Add function stubs for ARM64
ARM: dts: am57xx-beagle-x15: use palmas-usb for USB2
ARM: omap2plus_defconfig: enable GPIO_PCA953X
ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets
ARM: OMAP2+: AM43XX: Enable autoidle for clks in am43xx_init_late
ARM: dts: am57xx-beagle-x15: Update Phy supplies
ARM: pxa: balloon3: Fix build error
ARM: dts: Fixup model name for HP t410 dts
ARM: dts: DRA7: fix a typo in ethernet
ARM: omap2plus_defconfig: make PCF857x built-in
ARM: dts: Use ti,pbias compatible string for pbias
ARM: OMAP5: Cleanup options for SoC only build
ARM: DRA7: Select missing options for SoC only build
ARM: OMAP2+: board-generic: Remove stale of_irq macros
ARM: OMAP4+: PM: erratum is used by OMAP5 and DRA7 as well
ARM: dts: omap3-igep: Move eth IRQ pinmux to IGEPv2 common dtsi
ARM: dts: am57xx-beagle-x15: Add wakeup irq for mcp79410
ARM: dts: am335x-phycore-som: Fix mpu voltage
...
The bs1078v2 is a pcb found in 10.1" tablets with an A31 soc, 1G RAM
and 8G NAND, rtl8723as usb wifi, 1 micro USB OTG port, 1 USB HOST port
This commit adds a dts for v2 of the bs1078 pcb.
Signed-off-by: Lawrence Yu <lyu@micile.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the otg/drc usb controller on the Marsboard A10.
Similar to Cubieboard, the 5V of the otg is directly connected to the
general 5V, so we only use the id pin.
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add IRQ configuration for bma250 accelerometer.
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
A33 has the same "Security System" crypto engine as A10/A20, but with a
separate reset control.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The LCD backlight on the A23/A33 Q8 format tablets is enabled
with a GPIO controlled regulator, and brightness controlled with
the SoC's PWM controller.
The backlight is powered from the AXP223 PMIC's DC1SW output,
which is not supported yet. A proper bootloader is required
to enable it.
The brightness levels are arbitrary. The FEX files do not have
such information. As such, actual brightness levels may differ
from device to device.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Even though it's not mentionned in the A23 user manual, the A23 has a gate
for the AHB1 clock to the msgbox IP. Add it to the clock-indices.
Reported-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The AHB1 gates were assumed to be identical between the A23 and the A33,
which turned out to be wrong. Move the A23 gates definition to the A23
DTSI.
Reported-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A33 has a different gates array than the A23, add the node to the DT.
Reported-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commits adds a generic dts file for q8 formfactor a13 based tablets.
The tablets ship in many variants, with the difference mainly being the
touchscreen controller / accelerometer / wifi chip used.
The wifi is USB based, and thus not listed in devicetree.
The touchscreen controller / accelerometer may turn out to be a problem
once we add support for those. We can either do something with devicetree
overlays, or add sun5i-a13-<touchscreen>-<accelerometer>.dts files. The
latter is what the android mod community is doing with firmware images.
This dts was tested with an a13 q8 tablet with a pcb labelled: "94V-0",
silead gsl1680 touchscreen controller and a mc32x0 accelerometer.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This is the sun5i / a13 version of sun8i-q8-common.dtsi for use in dts
files for a13 q8 based tablets. Compared to sun8i this uses uart1 for the
serial console, and PG0 for card-detect for mmc0.
This also adds pmic and otg support, which both use the same config on
all known q8 a13 devices. This is not present in sun5i-q8-common.dtsi
because pmic / otg support for sun8i has not yet been merged.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The PWM controller has 2 outputs, with one usable pin for each.
Add a pinmux setting for the first channel. This is often used
for backlight dimming on tablets.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
