new "syscall start" flag; handled in syscall_trace() by switching
syscall number to that of syscall_restart(2). Restarts of that
kind (ERESTART_RESTARTBLOCK) are handled by setting that bit;
syscall number is not modified until the actual call.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
checking in do_signal() is pointless - if we get there with !user_mode(regs)
(and we might), we'll end up looping indefinitely. Check in work_pending
and break out of the loop if so.
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
The dma_contiguous_remap() function clears existing section maps using
the wrong size (PGDIR_SIZE instead of PMD_SIZE). This is a bug which
does not affect non-LPAE systems, where PGDIR_SIZE and PMD_SIZE are the same.
On LPAE systems, however, this bug causes the kernel to hang at this point.
This fix has been tested on both LPAE and non-LPAE kernel builds.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
This patch adds support for CMA to dma-mapping subsystem for ARM
architecture. By default a global CMA area is used, but specific devices
are allowed to have their private memory areas if required (they can be
created with dma_declare_contiguous() function during board
initialisation).
Contiguous memory areas reserved for DMA are remapped with 2-level page
tables on boot. Once a buffer is requested, a low memory kernel mapping
is updated to to match requested memory access type.
GFP_ATOMIC allocations are performed from special pool which is created
early during boot. This way remapping page attributes is not needed on
allocation time.
CMA has been enabled unconditionally for ARMv6+ systems.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Michal Nazarewicz <mina86@mina86.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Rob Clark <rob.clark@linaro.org>
Tested-by: Ohad Ben-Cohen <ohad@wizery.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Tested-by: Barry Song <Baohua.Song@csr.com>
This patch add a complete implementation of DMA-mapping API for
devices which have IOMMU support.
This implementation tries to optimize dma address space usage by remapping
all possible physical memory chunks into a single dma address space chunk.
DMA address space is managed on top of the bitmap stored in the
dma_iommu_mapping structure stored in device->archdata. Platform setup
code has to initialize parameters of the dma address space (base address,
size, allocation precision order) with arm_iommu_create_mapping() function.
To reduce the size of the bitmap, all allocations are aligned to the
specified order of base 4 KiB pages.
dma_alloc_* functions allocate physical memory in chunks, each with
alloc_pages() function to avoid failing if the physical memory gets
fragmented. In worst case the allocated buffer is composed of 4 KiB page
chunks.
dma_map_sg() function minimizes the total number of dma address space
chunks by merging of physical memory chunks into one larger dma address
space chunk. If requested chunk (scatter list entry) boundaries
match physical page boundaries, most calls to dma_map_sg() requests will
result in creating only one chunk in dma address space.
dma_map_page() simply creates a mapping for the given page(s) in the dma
address space.
All dma functions also perform required cache operation like their
counterparts from the arm linear physical memory mapping version.
This patch contains code and fixes kindly provided by:
- Krishna Reddy <vdumpa@nvidia.com>,
- Andrzej Pietrasiewicz <andrzej.p@samsung.com>,
- Hiroshi DOYU <hdoyu@nvidia.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
This patch converts dma_alloc/free/mmap_{coherent,writecombine}
functions to use generic alloc/free/mmap methods from dma_map_ops
structure. A new DMA_ATTR_WRITE_COMBINE DMA attribute have been
introduced to implement writecombine methods.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
This patch just performs a global cleanup in DMA mapping implementation
for ARM architecture. Some of the tiny helper functions have been moved
to the caller code, some have been merged together.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
This patch removes dma bounce hooks from the common dma mapping
implementation on ARM architecture and creates a separate set of
dma_map_ops for dma bounce devices.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
This patch converts all dma_sg methods to be generic (independent of the
current DMA mapping implementation for ARM architecture). All dma sg
operations are now implemented on top of respective
dma_map_page/dma_sync_single_for* operations from dma_map_ops structure.
Before this patch there were custom methods for all scatter/gather
related operations. They iterated over the whole scatter list and called
cache related operations directly (which in turn checked if we use dma
bounce code or not and called respective version). This patch changes
them not to use such shortcut. Instead it provides similar loop over
scatter list and calls methods from the device's dma_map_ops structure.
This enables us to use device dependent implementations of cache related
operations (direct linear or dma bounce) depending on the provided
dma_map_ops structure.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
This patch modifies dma-mapping implementation on ARM architecture to
use common dma_map_ops structure and asm-generic/dma-mapping-common.h
helpers.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
This patch removes the need for the offset parameter in dma bounce
functions. This is required to let dma-mapping framework on ARM
architecture to use common, generic dma_map_ops based dma-mapping
helpers.
Background and more detailed explaination:
dma_*_range_* functions are available from the early days of the dma
mapping api. They are the correct way of doing a partial syncs on the
buffer (usually used by the network device drivers). This patch changes
only the internal implementation of the dma bounce functions to let
them tunnel through dma_map_ops structure. The driver api stays
unchanged, so driver are obliged to call dma_*_range_* functions to
keep code clean and easy to understand.
The only drawback from this patch is reduced detection of the dma api
abuse. Let us consider the following code:
dma_addr = dma_map_single(dev, ptr, 64, DMA_TO_DEVICE);
dma_sync_single_range_for_cpu(dev, dma_addr+16, 0, 32, DMA_TO_DEVICE);
Without the patch such code fails, because dma bounce code is unable
to find the bounce buffer for the given dma_address. After the patch
the above sync call will be equivalent to:
dma_sync_single_range_for_cpu(dev, dma_addr, 16, 32, DMA_TO_DEVICE);
which succeeds.
I don't consider this as a real problem, because DMA API abuse should be
caught by debug_dma_* function family. This patch lets us to simplify
the internal low-level implementation without chaning the driver visible
API.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
Replace all uses of ~0 with DMA_ERROR_CODE, what should make the code
easier to read.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
Replace all calls to printk with pr_* functions family.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
HARDIRQS_SW_RESEND and GENERIC_IRQ_PROBE are already defined as config
switches in the core Kconfig file. Select them instead of defining
them in ARM.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* Added extra regs for A15 VGIC
* Added A15 architected timer node
* Split A5 and A9 TWD nodes into two separate ones for timer
and watchdog; interrupt definitions fixed on the way
* Fixed typo in A5 GIC compatible value
All the changes courtesy of Marc Zyngier.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
ab8500-i2c is used as core code to register the ab8500 device.
After allocating ab8500 memory, it immediately calls into
ab8500-core where the real initialisation takes place. This
patch moves all core registration and memory allocation into
the true ab8500-core file and removes ab8500-i2c completely.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* 'emev2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas:
mach-shmobile: Use DT_MACHINE for KZM9D V3
mach-shmobile: Emma Mobile EV2 DT support V3
mach-shmobile: KZM9D board Ethernet support V3
mach-shmobile: Emma Mobile EV2 GPIO support V3
mach-shmobile: Emma Mobile EV2 SMP support V3
mach-shmobile: KZM9D board support V3
mach-shmobile: Emma Mobile EV2 SoC base support V3
gpio: Emma Mobile GPIO driver V2
This patch adds function for suspend and resume of Exynos5250.
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
[kgene.kim@samsung.com: re-worked on top of v3.4-rc7]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds clock register list for save and restore. When system
enter suspend mode and wakeup from suspend mode, All clock register is
reset. So critical register should be saved and reset.
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
[kgene.kim@samsung.com: re-worked on top of v3.4-rc7]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds pmu table setting feature for EXYNOS5250.
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
[kgene.kim@samsung.com: re-worked on top of v3.4-rc7]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch changes the function name of pmc. to support new
EXYNOS SoCs commonly.
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes GIC save & restore functino in pm.c. Because when
enalbe CPU_PM feature, GIC driver execute save and restore function
in CPU_PM notifier.
So it is not needed to GIC save & restore function at pm.c file.
Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
EXYNOS5250 includes a interrupt combiner controller that can group
upto 8 interrupts from different sources and deliver a single combined
interrupt to the GIC. Add a node for the interrupt combiner controller
in the device tree source file.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The S3C2416 has a separate second interrupt register-set to support
additional irqs. This patch adds the necessary constants and registers
the irq handlers for it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Repeat pull of soc-core to bring in a bugfix.
* 'soc-core' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas:
ARM: mach-shmobile: sh73a0: fixup PINT/IRQ16-IRQ31 irq number conflict
This patch adds device tree support for gpio-lpc32xx.c.
To register the various GPIO banks as (struct) gpio_chips via the same DT
gpio-controller, we utilize the adjusted of_xlate API to manipulate the
actually used struct gpio_chip.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch changes the of_xlate API to make it possible for multiple
gpio_chips to refer to the same device tree node. This is useful for
banked GPIO controllers that use multiple gpio_chips for a single
device. With this change the core code will try calling of_xlate on
each gpio_chip that references the device_node and will return the
gpio number for the first one to return 'true'.
Tested-by: Roland Stigge <stigge@antcom.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Merge reason: We are going to queue up a dependent patch:
"perf tools: Move parse event automated tests to separated object"
That depends on:
commit e7c72d8
perf tools: Add 'G' and 'H' modifiers to event parsing
Conflicts:
tools/perf/builtin-stat.c
Conflicted with the recent 'perf_target' patches when checking the
result of perf_evsel open routines to see if a retry is needed to cope
with older kernels where the exclude guest/host perf_event_attr bits
were not used.
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Philippe Rétornaz <philippe.retornaz@epfl.ch>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This should help the merge with the at91 adc driver that is currently
in the staging tree.
* at91/dt:
ARM: at91: Add ADC driver to at91sam9260/at91sam9g20 dtsi files
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Now that the bulk of at91sam9g20-related nodes are located in at91sam9260.dtsi,
we have to re-create the path to this ADC node for SoC specific parts.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull ARM fixes from Russell King:
"Small set of fixes again."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7419/1: vfp: fix VFP flushing regression on sigreturn path
ARM: 7418/1: LPAE: fix access flag setup in mem_type_table
ARM: prevent VM_GROWSDOWN mmaps extending below FIRST_USER_ADDRESS
ARM: 7417/1: vfp: ensure preemption is disabled when enabling VFP access
It isn't clear to me why this ever existed, as I've never heard
of an ARM board with an MCA bus. Regardless, the MCA bus support
is going away, so remove the ability to select it from ARM.
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
The timekeeping is computed from the cpuidle core if we set
the .en_core_tk_irqen flag. Let's use it and remove the duplicated
code.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Tested-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The states are now part of the cpuidle_driver structure, so we can
declare the states in this structure directly. That saves us an extra
variable declaration and a memcpy.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Tested-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Use DT_MACHINE_START() on the emev2 based KZM9D board.
Also include a tiny DTS file to describe the board and
update the Kconfig dependencies to select CONFIG_USE_OF.
Update the SMP glue code to use OF for matching.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This is EMEV2 DT support V3. The support is limited to
whatever devices that are complied in the kernel. At this
point we have UARTs handled by "em-uart" and a timer
handled by "em-sti". Clocks and SMP are not supported.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Tie in the on-board Ethernet controller on KZM9D
and make use of the GPIO controller for external
IRQ pin support.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Tie in the Emma Mobile GPIO driver "em-gio" to
support the GPIOs on Emma Mobile EV2.
A static IRQ range is used to allow boards to
hook up their platform devices to the GPIOs.
DT support is still on the TODO for the GPIO driver,
so only platform device support is included here.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This is V3 of Emma Mobile EV2 SMP support.
At this point only the most basic form of SMP operation
is supported. TWD and CPU Hotplug support is excluded.
Tied to both the Emma Mobile EV2 and the KZM9D board
due to the need to switch on board in platsmp.c and
the newly introduced need for static mappings.
The static mappings are needed to allow hardware
acces early during boot when SMP is initialized.
This early requirement forces us to also map in
the SMU registers.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
V3 of basic KZM9D board support. At this point a quite
thin layer that makes use of the Emma Mobile EV2 SoC code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This is V3 of the Emma Mobile EV2 SoC support.
Included here is support for serial and timer
devices which is just about enough to boot a kernel.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Commit ff9a184c ("ARM: 7400/1: vfp: clear fpscr length and stride bits
on entry to sig handler") flushes the VFP state prior to entering a
signal handler so that a VFP operation inside the handler will trap and
force a restore of ABI-compliant registers. Reflushing and disabling VFP
on the sigreturn path is predicated on the saved thread state indicating
that VFP was used by the handler -- however for SMP platforms this is
only set on context-switch, making the check unreliable and causing VFP
register corruption in userspace since the register values are not
necessarily those restored from the sigframe.
This patch unconditionally flushes the VFP state after a signal handler.
Since we already perform the flush before the handler and the flushing
itself happens lazily, the redundant flush when VFP is not used by the
handler is essentially a nop.
Reported-by: Jon Medhurst <tixy@linaro.org>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
A zero value for prot_sect in the memory types table implies that
section mappings should never be created for the memory type in question.
This is checked for in alloc_init_section().
With LPAE, we set a bit to mask access flag faults for kernel mappings.
This breaks the aforementioned (!prot_sect) check in alloc_init_section().
This patch fixes this bug by first checking for a non-zero
prot_sect before setting the PMD_SECT_AF flag.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
the old codes will cause 3.4 kernel warning as irq domain size is wrong:
------------[ cut here ]------------
WARNING: at kernel/irq/irqdomain.c:74 irq_domain_legacy_revmap+0x24/0x48()
Modules linked in:
[<c0013f50>] (unwind_backtrace+0x0/0xf8) from [<c001e7d8>] (warn_slowpath_common+0x54/0x64)
[<c001e7d8>] (warn_slowpath_common+0x54/0x64) from [<c001e804>] (warn_slowpath_null+0x1c/0x24)
[<c001e804>] (warn_slowpath_null+0x1c/0x24) from [<c005c3c4>] (irq_domain_legacy_revmap+0x24/0x48)
[<c005c3c4>] (irq_domain_legacy_revmap+0x24/0x48) from [<c005c704>] (irq_create_mapping+0x20/0x120)
[<c005c704>] (irq_create_mapping+0x20/0x120) from [<c005c880>] (irq_create_of_mapping+0x7c/0xf0)
[<c005c880>] (irq_create_of_mapping+0x7c/0xf0) from [<c01a6c48>] (irq_of_parse_and_map+0x2c/0x34)
[<c01a6c48>] (irq_of_parse_and_map+0x2c/0x34) from [<c01a6c68>] (of_irq_to_resource+0x18/0x74)
[<c01a6c68>] (of_irq_to_resource+0x18/0x74) from [<c01a6ce8>] (of_irq_count+0x24/0x34)
[<c01a6ce8>] (of_irq_count+0x24/0x34) from [<c01a7220>] (of_device_alloc+0x58/0x158)
[<c01a7220>] (of_device_alloc+0x58/0x158) from [<c01a735c>] (of_platform_device_create_pdata+0x3c/0x80)
[<c01a735c>] (of_platform_device_create_pdata+0x3c/0x80) from [<c01a7468>] (of_platform_bus_create+0xc8/0x190)
[<c01a7468>] (of_platform_bus_create+0xc8/0x190) from [<c01a74cc>] (of_platform_bus_create+0x12c/0x190)
---[ end trace 1b75b31a2719ed32 ]---
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Current IRQ16-IRQ31 irq number are located around 800 from
1ee8299a9e
(ARM: mach-shmobile: Use 0x3400 as INTCS vector offset)
But, the PINT0/1 IRQ number are also located around 800 from
0df1a838d6
(ARM: mach-shmobile: sh73a0 PINT IRQ base fix)
This patch relocates PINT0/1 IRQ number to around 700 where is not used,
and adds current IRQ location table in comment area.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Historical prepare_to_copy() is mostly a no-op, duplicated for majority of
the architectures and the rest following the x86 model of flushing the extended
register state like fpu there.
Remove it and use the arch_dup_task_struct() instead.
Suggested-by: Oleg Nesterov <oleg@redhat.com>
Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Link: http://lkml.kernel.org/r/1336692811-30576-1-git-send-email-suresh.b.siddha@intel.com
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Chris Zankel <chris@zankel.net>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Mark Salter <msalter@redhat.com>
Cc: Aurelien Jacquiot <a-jacquiot@ti.com>
Cc: Mikael Starvik <starvik@axis.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Richard Kuo <rkuo@codeaurora.org>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Jonas Bonn <jonas@southpole.se>
Cc: James E.J. Bottomley <jejb@parisc-linux.org>
Cc: Helge Deller <deller@gmx.de>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Chen Liqin <liqin.chen@sunplusct.com>
Cc: Lennox Wu <lennox.wu@gmail.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
I got build errors with the new version now because machine_is_kzm9g is no longer
defined:
arch/arm/mach-shmobile/platsmp.c: In function 'shmobile_smp_get_core_count':
arch/arm/mach-shmobile/platsmp.c:29:2: error: implicit declaration of function 'of_machine_is_compatible'
Replace the missing function with a call to of_machine_is_compatible.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: "Rafael J. Wysocki" <rjw@sisk.pl>
Acked-by: Magnus Damm <magnus.damm@gmail.com>
irq_of_parse_and_map does not have an empty definition for the
!CONFIG_OF case, so we should not try to call it then:
arch/arm/mach-exynos/common.c: In function 'combiner_init':
arch/arm/mach-exynos/common.c:576:3: warning: implicit declaration of function 'irq_of_parse_and_map'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* 'clk-next' of git://git.linaro.org/people/mturquette/linux:
clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate().
clk: Provide dummy clk_unregister()
ARM: Kirkwood: Replace clock gating
ARM: Orion: Audio: Add clk/clkdev support
ARM: Orion: PCIE: Add support for clk
ARM: Orion: XOR: Add support for clk
ARM: Orion: CESA: Add support for clk
ARM: Orion: SDIO: Add support for clk.
ARM: Orion: NAND: Add support for clk, if there is one.
ARM: Orion: EHCI: Add support for enabling clocks
ARM: Orion: SATA: Add per channel clk/clkdev support.
ARM: Orion: UART: Get the clock rate via clk_get_rate().
ARM: Orion: WDT: Add clk/clkdev support
ARM: Orion: Eth: Add clk/clkdev support.
ARM: Orion: SPI: Add clk/clkdev support.
ARM: Orion: Add clocks using the generic clk infrastructure.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* clps711x/cleanup:
ARM: clps711x: Cleanup IRQ handling
ARM clps711x: Removed unused header mach/time.h
ARM: clps711x: Added note about support EP731x CPU to Kconfig
ARM: clps711x: Added missing register definitions
ARM: clps711x: Used own subarch directory for store header file
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds platform data for using S3C-HSOTG driver at
Universal_C210 target.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds hsotg device to the NURI board.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[Rebased on the newest git/kgene/linux-samsung #for-next]
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds hsotg device to the GONI board.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch supports to control usb otg phy of EXYNOS4210.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[Rebased on the newest git/kgene/linux-samsung #for-next]
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
[kgene.kim@samsung.com: squashed 2 patches together]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Use AUXDATA to set the device names for controller instances
discovered from device tree.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Update EXYNOS5 device tree source files for EXYNOS5250 SoC.
This includes new additions to the EXYNOS5 dtsi and SMDK5250
dts files and few minor fixes.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add device tree based instantiation of the interrupt combiner controller.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add irq_domain support for hardware interrupts of the interrupt combiner.
The hardware interrupts of all the instances of the combiner are grouped
in a single irq_domain.
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
A seperate bus_type instance is not required for EXYNOS5. The
existing bus_type instance used with EXYNOS4 is sufficient for
both EXYNOS4 and EXYNOS5. This also solves issue of uninitialized
usage of exynos4_subsys in EXYNOS4 power management code that is
reused for EXYNOS5 also. In addition to that, the existing
exynos4_subsys bus_type is renamed to exynos_subsys to indicate
that it is reused on both EXYNOS4 and EXYNOS5 platforms.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The fout clock of BPLL and MPLL have a selectable source on EXYNOS5250.
The clock options are a fixed divided by 2 clock and the output of the
PLL itself. Add support for these new clock instances.
Signed-off-by: Kisoo Yu <ksoo.yu@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
[kgene.kim@samsung.com: moved common pll stuff into s5p-clock.c]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add GPC4 bank instance which is included in rev1 of EXYNOS5.
Signed-off-by: Sangsu Park <sangsu4u.park@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
We now have an additional classs of modules which are enumerated at I2C
address 0x22. Add hookup for these modules.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The Bells module now has a number assigned to it. Also hook up the WM9081
which is soldered down onto the board.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
- Store uids and gids with kuid_t and kgid_t in struct kstat
- Convert uid and gids to userspace usable values with
from_kuid and from_kgid
Acked-by: Serge Hallyn <serge.hallyn@canonical.com>
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
This patch contains two changes:
- Removed unused definitions from mach/irqs.h
- Do not mask interrupts in ack procedure, because we have separate
intX_mask procedure for do it and actually these 2 functions are
called sequentially
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The nomadik gpio code has been converted to pinctrl, but the nomadik platform
still expects the old code to be present. Change it to use the new one instead.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Remove MX2_CAMERA_SWAP16 and MX2_CAMERA_PACK_DIR_MSB flags
so that the driver can negotiate with the attached sensor
whether the mbus format needs convertion from UYUV to YUYV
or not.
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Changes in the dt2 branch move stuff around that gets changed
in the drivers/mmc branch. I chose a non-obvious resolution by
adding the new bus-width property into all the tegra sdhci device
nodes.
Conflicts:
arch/arm/boot/dts/tegra-cardhu.dts
arch/arm/boot/dts/tegra-harmony.dts
arch/arm/boot/dts/tegra-ventana.dts
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* drivers/mmc:
mmc: dt: Consolidate DT bindings
Also pulls in the omap/dt-missed-3.4 branch as a dependency.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch unifies the current DT MMC bindings documentation and code,
adds generic MMC DT bindings documentation, and updates .dts files for
consistency.
[cjb: typo fixes, addition of max-frequency property]
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* 'kirkwood_boards_for_v3.5' of git://git.infradead.org/users/jcooper/linux:
ARM: kirkwood: Add support for RaidSonic IB-NAS6210/6220 using devicetree
kirkwood: Add iconnect support
orion/kirkwood: create a generic function for gpio led blinking
kirkwood/orion: fix orion_gpio_set_blink
ARM: kirkwood: Define DNS-320/DNS-325 NAND in fdt
kirkwood: Allow nand to be configured via. devicetree
mtd: Add orion_nand devicetree bindings
ARM: kirkwood: Basic support for DNS-320 and DNS-325
Includes an update to v3.4-rc7
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
"Rafael J. Wysocki" <rjw@sisk.pl> writes:
Renesas ARM-based platforms: new boards support for v3.5
* Support for the KZM-A9-GT board from Kuninori Morimoto and Magnus Damm.
* Support for the armadillo800eva board from Kuninori Morimoto and Magnus Damm.
This is based on the Renesas core SoC code updates I've sent a separate pull
request for.
* 'board-new' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas: (29 commits)
ARM: mach-shmobile: Use DT_MACHINE for armadillo 800 eva
ARM: mach-shmobile: Use DT_MACHINE for KZM9G
ARM: mach-shmobile: kzm9g: enable SMP boot
ARM: mach-shmobile: kzm9g: defconfig update
ARM: mach-shmobile: kzm9g: add PCF8757 gpio-key
ARM: mach-shmobile: kzm9g: add SDHI support
ARM: mach-shmobile: kzm9g: add MMCIF support
ARM: mach-shmobile: kzm9g: correct screen direction
ARM: mach-shmobile: sh73a0.h: add GPIO_NR
ARM: mach-shmobile: pfc-sh73a0: fixup MSEL2CR MSEL18 for I2C-3
ARM: mach-shmobile: kzm9g: add ST1232 Touchscreen support
ARM: mach-shmobile: kzm9g: add LCDC support
ARM: mach-shmobile: kzm9g: add external USB Host support
ARM: mach-shmobile: kzm9g: add SMSC 9221 support
ARM: mach-shmobile: kzm9g: add defconfig
ARM: mach-shmobile: add KZM-A9-GT board support
ARM: mach-shmobile: armadillo800eva: defconfig update
ARM: mach-shmobile: clock-r8a7740: add sh-eth clock
ARM: mach-shmobile: r8a7740: reserve DMA memory for the frame buffer
ARM: mach-shmobile: armadillo800eva: add MMCIF support
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Redefine IRQ_MCT_L0,1 irq definition as it is changed in rev1 of EXYNOS5.
Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Adapt to changes in GIC physical address in rev1 of EXYNOS5.
Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add watchdog timer clock instance for EXYNOS5 watchdog controller.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This adds the required platform data and calls to enable
the CRYP/HASH driver.
Signed-off-by: Andreas Westin <andreas.westin@stericsson.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add support for the IB-NAS6210 and IB-NAS 6220. Describe as much as
currently possible in the devicetree files, including the NAND partitions.
Use the partition scheme of the original firmware by default.
Create a board-ib62x0.c for everything else.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The maxburst/chunk size was taken from the private slave DMA data structure.
Use the common API provided by DMA_SLAVE_CONFIG to setup src/dst maxburst
values.
The ctrla field is not needed anymore in the slave private structure nor the
header constants that were located in an architecture specific directory.
The at91sam9g45_devices.c file that was using this platform data is also
modified to remove this now useless data.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Add support for Iomega Iconnect system.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-By: Adam Baker <linux@baker-net.org.uk>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
dns323 and (at least) iconnect platforms are using hw led blinking, so,
instead of having 2 identicals .gpio_blink_set gpio-led hooks, move
dns323 code into gpio.c
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-By: Adam Baker <linux@baker-net.org.uk>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
gpio registers are for 32 gpios. Given that orion_gpio_set_blink is called
directly and not through gpiolib, it needs to make sure that the pin value
given to the internal functions are between 0 and 31.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-By: Adam Baker <linux@baker-net.org.uk>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Use devicetree to define NAND partitions. Use D-link partition scheme by
default, to be vaguely compatible with their userland.
Changes since last submission (V4):-
* Don't add NAND support then throw it away immediately after [Grant Likely]
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add default configuration for NAND, to be enabled in your board config. Ensure
clock gating is set appropriately when the NAND is enabled.
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add support for the DNS-320 and DNS-325. Describe as much as currently possible
in the devicetree files, create a board-dnskw.c for everything else.
Changes since last submission (V3) [Addressing comments by]:-
* One MACH_DLINK_KIRKWOOD_DT for all dtb files [Grant Likely, Jason Cooper]
* Drop brain-dead select "select CONFIG_MTD_OF_PARTS" [Grant Likely]
* Don't add NAND support then throw it away immediately after [Grant Likely]
* Describe purpose of MPP 41, 42 & 49
Changes since last submission (V2):-
* Use IEEE-compliant "okay", rather than "ok" [Scott Wood]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Use DT_MACHINE_START() on the r8a7740 based armadillo 800 eva board.
Also include a tiny DTS file to describe the board and update the
Kconfig dependencies to select CONFIG_USE_OF.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Use DT_MACHINE_START() on the sh73a0 based KZM9G board.
Also include a tiny DTS file to describe the board and
update the Kconfig dependencies to select CONFIG_USE_OF.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This patch adds platform data for the AT91 ADC driver support for
the AT91SAM9M10G45-EK board.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This patch adds platform data for the AT91 ADC driver support for
the AT91SAM9G20-EK board.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Stephen Warren <swarren@wwwdotorg.org> writes:
This branch is based on the merge of the following branches from the
Tegra repo, which are all already pulled into arm-soc:
for-3.5/tegra30-audio
for-3.5/usb-ulpi
for-3.5/dt
... which are all based on for-3.5/gpio-pinmux
* 'for-3.5/dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: dt: tegra: invert status=disable vs status=okay
ARM: dt: tegra: consistent basic property ordering
ARM: dt: tegra: sort nodes based on bus order
ARM: dt: tegra: remove duplicate device_type property
ARM: dt: tegra: consistenly use lower-case for hex constants
ARM: dt: tegra: format regs properties consistently
ARM: dt: tegra: gpio comment cleanup
ARM: dt: tegra: remove unnecessary unit addresses
ARM: dt: tegra: whitespace cleanup
ARM: dt: tegra cardhu: fix typo in SDHCI node name
ARM: dt: tegra: cardhu: register core regulator tps62361
ARM: dt: tegra30.dtsi: Add SMMU node
ARM: dt: tegra20.dtsi: Add GART node
ARM: dt: tegra30.dtsi: Add Memory Controller(MC) nodes
ARM: dt: tegra20.dtsi: Add Memory Controller(MC) nodes
ARM: dt: tegra: Add device tree support for AHB
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Kukjin Kim <kgene.kim@samsung.com> writes:
As there were discussions, some exynos4 boards have been updated because
current dt cannot support all features for current board files on
exynos4.
Note, this should be merged after next/devel-samsung because some
platform devices are defined in that.
* 'next/board-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Add FIMC device to SMDK4X12
ARM: EXYNOS: Add MFC device to SMDK4X12
ARM: EXYNOS: Add DRM device to SMDKV310
ARM: EXYNOS: Add DRM device to Origen
ARM: EXYNOS: Make BT platform data structure static in mach-origen.c file
ARM: EXYNOS: Add DRM core support for NURI board
ARM: EXYNOS: Add DRM core device support for Universal C210 board
ARM: EXYNOS: Increase framebuffer virtual size for origen
ARM: S3C64XX: Hook up new style regulator-regulator supplies on Cragganmore
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The omap/dt branch adds a few instances of mmc device nodes that
need to get changed to use the common bindings. Pull that into
a new branch so we can apply the patch in a single run.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* 'dt' of git://github.com/hzhuang1/linux:
Documentation: update docs for mmp dt
ARM: dts: refresh dts file for arch mmp
ARM: mmp: support pxa910 with device tree
ARM: mmp: support mmp2 with device tree
gpio: pxa: parse gpio from DTS file
ARM: mmp: support DT in timer
ARM: mmp: support DT in irq
ARM: mmp: append CONFIG_MACH_MMP2_DT
ARM: mmp: fix build issue on mmp with device tree
Includes an update to v3-4-rc5
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Kukjin Kim <kgene.kim@samsung.com> writes:
We can remove plat-s5p directory with this series and I think, the
plat-s3c24xx can be removed next time for one plat-samsung of Samsung
stuff.
Note, this is including cleanup-samsung-iommu which is removing s5p
iommu stuff in plat-s5p.
* 'next/cleanup-plat-s3c24xx-s5p' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: SAMSUNG: merge plat-s5p into plat-samsung
ARM: SAMSUNG: move options for common s5p into plat-samsung/Kconfig
ARM: SAMSUNG: move setup code for s5p mfc and mipiphy into plat-samsung
ARM: SAMSUNG: move platform device for s5p uart into plat-samsung
ARM: SAMSUNG: move hr timer for common s5p into plat-samsung
ARM: SAMSUNG: move pm part for common s5p into plat-samsung
ARM: SAMSUNG: move interrupt part for common s5p into plat-samsung
ARM: SAMSUNG: move clock part for common s5p into plat-samsung
ARM: S3C24XX: Use common macro to define resources on dev-uart.c
ARM: S3C24XX: move common clock init into common.c
ARM: S3C24XX: move common power-management code to mach-s3c24xx
ARM: S3C24XX: move plat-s3c24xx/dev-uart.c into common.c
ARM: S3C24XX: move plat-s3c24xx/cpu.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
All functions from this header already provided by common.c
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ep7312 has been supported for a very long time, but has never
been mentioned in the Kconfig file.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There is no reason to have the clps7111.h header in a globally
visible location, so move it to a place that is only visible when
building for mach-clps711x.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
In tegra*.dtsi, set status="disable" for all HW modules that the board
design may choose not to use. Update all boards to specifically enable
any of those modules that are useful by setting status="okay".
This makes board files say which features they do use, rather than which
they don't, which feels more logical. It also makes the .dts files
slightly smaller, at least for existing content.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Put properties in order compatible, reg, interrupts, then anything else
the node has.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Sort the nodes according to the following rules:
* First, any overrides for properties or nodes created by included files,
in the order they appeared in the include file.
* Second, any nodes with a reg property, in numerical order.
* Third, any nodes without a reg property, in alphabetical order of node
name.
The second sorting rule at least will probably help if/when we need to
explicitly insert nodes for the various busses in Tegra; that will just
be an indentation change rather than also a node re-ordering.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
It's already specified in skeleton.dtsi, included via tegra20.dtsi.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Place each reg "entry" on its own line, and wrap the whole list in
<> rather than each individual entry.
The convention chosen here is slightly arbitrary, but is not consistent
throughout all Tegra files.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
