sunxi-common-regulators.dtsi provided dummy regulators vcc3v0, vcc3v3,
vcc5v0. 3.0V/3.3V and 5.0V are commonly used voltages in Allwinner
devices. These dummy regulators provide a stand-in when bindings that
require one, but the real regulator is not supported yet.
Since these are no longer needed, we can drop the include file.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
sunxi-common-regulators.dtsi provided dummy regulators vcc3v0, vcc3v3,
vcc5v0. 3.0V/3.3V and 5.0V are commonly used voltages in Allwinner
devices. These dummy regulators provide a stand-in when bindings that
require one, but the real regulator is not supported yet.
Since these are no longer needed, we can drop the include file by
copying over reg_usb1_vbus.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
It seems that the wifi chip is powered by both ldo3 and ldo4 tied
together and that using only one results in the wifi-chip dropping of
the USB bus sometimes.
Ideally we would have a proper way of modelling this (this is being
worked on), but currently we do not. This is not an issue since we need
to keep these regulators always-on anyways, due to these boards
crashing when ldo3/4 get turned back on after having been turned off.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The BPI-M2+ is an H3 development board. It is a smaller form factor than
the original BPI-M2, with the new H3 SoC.
It has 1GB DRAM, 8GB eMMC, a micro SD card slot, HDMI output, 2 USB
host connector and 1 USB OTG connector, an IR receiver, WiFi+BT based
on Ampak AP6212.
The board also has a 3 pin header for (debug) UART, a 40 pin GPIO header
based on the Raspberry Pi B+, but the peripheral signals are not the
same, and an FPC connector for connecting BPI's camera.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Move uart0 pins to sort the list of pin settings in alphabetical order.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The AXP809 PMIC is the primary PMIC. It provides various supply voltages
for the SoC and other peripherals. The PMIC's interrupt line is connected
to NMI pin of the SoC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The AXP809 PMIC is the primary PMIC. It provides various supply voltages
for the SoC and other peripherals. The PMIC's interrupt line is
connected to NMI pin of the SoC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The AXP809 PMIC is used with the Allwinner A80 SoC, along with
an AXP806 PMIC as a slave.
This patch adds a dtsi file for all the common bindings and default
values unrelated to board design. Currently this is just listing all
the regulator nodes. The regulators are initialized based on their
device node names.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
spi2 is available on the UEXT connector
Signed-off-by: Michal Suchanek <hramrach@gmail.com>
[Maxime: Fixed the node order]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Q8 form factor A13 tablets have a 7" LCD panel. Unfortunately we
don't know the exact model of the panel. Just pick a panel with
display timings close to what we know.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Q8 tablets use the audio codec to provide audio output via a
headphone jack or a small mono speaker. A GPIO output is used to
control speaker amp.
The tablets may or may not have an internal microphone.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
On the A13 Q8 tablets, the PMIC's USB power supply (VBUS) is connected
to the external OTG port. This can be used to provide power and OTG VBUS
sensing.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The output pin of LDO is also a GPIO pin, and the on/off settings of the
regulator are actually pinmux settings.
Disable it by default so it doesn't conflict with GPIO usage.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Most of the display engine is shared between the R8 and the A13. Move the
common parts to the Á13 DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The RGB bus can be used in several configurations, one of which being the
RGB666.
Add a pinctrl group for that case.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the display and TCON clocks that are needed to drive the display
engine, tcon and TV encoders.
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the display and TCON clocks that are needed to drive the display
engine, tcon and TV encoders.
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Due to introducing the new driver - ACT8945A MFD drive,
change the pmic device node to align with the ACT8945A
regulator and charger drivers.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add power led node and rename status led node.
Signed-off-by: Raashid Muhammed <raashidmuhammed@zilogic.com>
Reviewed-by: Vijay Kumar B. <vijaykumar@bravegnu.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add missing pinctrl information to ethernet node.
Signed-off-by: Raashid Muhammed <raashidmuhammed@zilogic.com>
Reviewed-by: Vijay Kumar B. <vijaykumar@bravegnu.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add Device Tree source file for at91sam9260ek board. This official Atmel
Evaluation Kit is designed around a SoC based on a ARM 926 core the
at91sam9260.
The board is also added to the dts Makefile.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add the device tree nodes for the Advanced Power Management Unit (APMU)
and the second Cortex-A15 CPU core.
Use the "enable-method" prop to point out that the APMU should be used
for the SMP support.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DT nodes for the Advanced Power Management Unit (APMU) and the
second CPU core. Use the enable-method to point out that the APMU
should be used for SMP support.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a DT node for the Advanced Power Management Units (APMU), and use
the enable-method to point out that the APMU should be used for SMP
support.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DT nodes for the Advanced Power Management Units (APMU), and use the
enable-method to point out that the APMU should be used for SMP
support.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Change the console alias to "serial0", for consistency with other
boards (the first unlabeled serial port is always called "serial0").
This does change the serial console from /dev/ttySC4 to /dev/ttySC0.
Add the serial port config to "chosen/stdout-path", which requires
referring to the port by alias.
Drop the "console=" parameters from the kernel command line, as they're
no longer needed for DT-based platforms.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a "serial1" alias for the serial console (it is labeled "uart1").
Add the serial port config to "chosen/stdout-path", which requires
referring to the port by alias.
Drop the "console=" parameter from the kernel command line, as it's no
longer needed for DT-based platforms.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the serial port config to "chosen/stdout-path", which requires
referring to the port by alias.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Change the console alias to "serial0", for consistency with other
boards (the first unlabeled serial port is always called "serial0").
This does change the serial console from /dev/ttySC2 to /dev/ttySC0.
Add the serial port config to "chosen/stdout-path", which requires
referring to the port by alias.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Change the console alias to "serial0", for consistency with other
boards (the first unlabeled serial port is always called "serial0").
This does change the serial console from /dev/ttySC1 to /dev/ttySC0.
Add the serial port config to "chosen/stdout-path", which requires
referring to the port by alias.
Drop the "console=" parameters from the kernel command line, as they're
no longer needed for DT-based platforms.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch fixes the following DTC warnings for am57xx-sbc-am57x.dtb:
"endpoint@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap5-igep0050.dtb,
omap5-sbc-t54.dtb and omap5-uevm.dtb:
"connector@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"encoder@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap5-cm-t54.dtb:
"connector@0 has a unit name, but no reg property"
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for am437x-sbc-t43.dtb:
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for am437x-gp-evm.dtb:
"endpoint@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for am43xx-epos-evm.dtb:
"endpoint@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap4-var-dvk-om44.dtb
and omap4-var-stk-om44.dtb:
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap4-sdp.dtb
and omap4-sdp-es23plus.dtb:
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap4-panda.dtb,
omap4-panda-a4.dtb and omap4-panda-es.dtb:
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
"encoder@1 has a unit name, but no reg property"
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap4-duovero-parlor.dtb:
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-thunder.dtb:
"display@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-sbc-t3517.dtb,
omap3-sbc-t3530.dtb and omap3-sbc-t3730.dtb:
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-pandora-600mhz.dtb
and omap3-pandora-1ghz.dtb:
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-overo-summit.dtb,
omap3-overo-storm-tobi.dtb, omap3-overo-storm-summit.dtb and
omap3-overo-tobi.dtb:
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-igep0020.dtb
and omap3-igep0020-rev-f.dtb:
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-overo-gallop43.dtb,
omap3-overo-chestnut43.dtb, omap3-overo-storm-chestnut43.dtb,
omap3-overo-palo43.dtb, and omap3-overo-storm-palo43.dtb:
"display@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-ha-lcd.dtb:
"display@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-gta04a3.dtb,
omap3-gta04a4.dtb and omap3-gta04a5.dtb:
"dmtimer-pwm@11 has a unit name, but no reg property"
"connector@1 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-devkit8000-lcd43.dtb
and omap3-devkit8000-lcd70.dtb:
"display@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-devkit8000.dtb,
omap3-devkit8000-lcd43.dtb and omap3-devkit8000-lcd70.dtb:
"encoder@0 has a unit name, but no reg property"
"endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-cm-t3517.dtb,
omap3-cm-t3530.dtb and omap3-cm-t3730.dtb:
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-beagle-xm.dtb:
"encoder@0 has a unit name, but no reg property"
"encoder@0/ports/port@0/endpoint@0 has a unit name, but no reg property"
"encoder@0/ports/port@1/endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-beagle.dtb:
"encoder@0 has a unit name, but no reg property"
"encoder@0/ports/port@0/endpoint@0 has a unit name, but no reg property"
"encoder@0/ports/port@1/endpoint@0 has a unit name, but no reg property"
"connector@0 has a unit name, but no reg property"
"connector@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap3-n900.dtb:
"dmtimer-pwm@9 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings:
"dmtimer-pwm@10 has a unit name, but no reg property"
"display@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for am3517-craneboard.dtb:
"fixedregulator@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for omap2430-sdp.dtb:
"func_96m_ck has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix pll3x2 and pll7x2 not having a parent clock, specifically this
fixes the kernel turning of pll3 while simplefb is using it when
uboot has configured things to use pll3x2 as lcd ch clk parent.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add support for the Broadcom BCM953012 Enterprise Router reference
board, enable the following peripherals:
- UART0 (UART1 is not populated)
- WPS and restart GPIO buttons
- Ethernet switch w/ only two facing ports
- NAND flash
- SPI-NOR flash
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add support for the Computer on Module Colibri iMX7S/iMX7D along
with the development/evaluation carrier board device trees. Follow
the usual hierarchic include model, maintaining shared configuration
in imx7-colibri.dtsi and imx7-colibri-eval-v3.dtsi respectively.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The base device tree uses KEY_POWER in the snvs-powerkey node,
hence include the input.h header file in the base device tree.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX 7Solo implements a subset of features available on
i.MX 7Dual. Recreate imx7s.dtsi as the base device tree for
i.MX 7Dual boards. The i.MX 7Dual's additional features over
i.MX 7Solo are:
- Second Cortex-A7 core
- Second Gigabit Ethernet controller
- EPD (Electronc Paper Display, not yet part of the device tree)
- PCIe (not yet part of the device tree)
- Additional USB2.0 OTG controller
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX 7 series currently consists of two SoCs: i.MX 7Solo and
7Dual. The former has a subset of features of the latter, hence
use imx7s.dtsi as the new base device tree. To keep diffstat nice,
just move imx7d.dtsi to imx7s.dtsi temporarily and recreate
imx7d.dtsi in a second commit.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
bx50v3 boards can be powered off via GPIO, this patch specifies the GPIO to
be used with the gpio-poweroff driver.
Signed-off-by: Ken Lin <ken.lin@advantech.com.tw>
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for cortex-a7-pmu present on ipq4019 SoCs.
Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This is the first Dragonboard based on APQ8060 and PM8058. It
was produced in 2011 in cooperation between Qualcomm and
BSQUARE.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
There is currently a fixed regulator in the .dtsi file for
the MSM8660 chipset, used by the SURF board. We want to define
real regulators for a board using this chipset, so push the fixed
regulator down to the SURF board which is the only user.
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The RTC was defined on 0x11d but on the MSM8660/APQ8060 it is
actually on 0x1e8. We were saved by the fact that the driver does
not use the reg parameter: instead it uses the compatible string
to figure out where the RTC is.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The I2C block on the GSBI12 is used on the APQ8060 Dragonboard for
sensors. Make it available in the chipset file.
Take this opportunity to fix the IRQ flag "0" to "NONE" using the
IRQ DT include.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the L2CC IPC resource and RPM devices plus the nodes
for the PM8901 and PM8058 regulators to the MSM8660 device tree.
This was tested on the APQ8060 Dragonboard.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The SDCC5 SD/MMC controller is used for a second uSD slot
on the APQ8060 Dragonboard. On most other systems it is just
dark silicon so define it and leave it as "disabled" in the core
SoC file.
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This adds the 8660 PMIC GPIO and MPP blocks to the MSM8660
DTSI. Verified against the vendor tree to be in these locations
with these interrupts, tested on the APQ8060 Dragonboard.
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Since the pmic8xxx-pwrkey driver is already supported in the
qcom-apq8064.dtsi, and the pmic8xxx-pwrkey supports logic to
configure proper device shutdown when ps_hold goes low, it is
better to use that driver then a generic gpio button.
Thus this patch remove the gpio power key entry here, so we
don't get double input events from having two drivers enabled.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Stephen Boyd <stephen.boyd@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch updates the qcom,state-cells to qcom,smem-state-cells to
match recent changes to the binding.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds the qcom,controlled-remotely property for the blsp2_bam
controller node. This board requires this, otherwise the board fails to
boot due to access of protected registers during BAM initialization.
Fixes: 62bc817922 dts: msm8974: Add blsp2_bam dma node
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This board locks up if we stress test the eMMC, as the regulator s4 is
unable to supply enough current for all the peripherials attached to it.
As this supply is wired up to most of the peripherials including DDR,
it resulted in such lockup.
This patch fixes this issue by setting s4 regulator correctly with
Auto power mode.
Reported-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
[Srinivas Kandagatla: rewrote the change log]
Tested-by: Girish Sharma <girish.sharma@einfochips.com>
Signed-off-by: Parth Pancholi <parth.pancholi@einfochips.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This board has been renamed recently and announced at
https://eragon.einfochips.com/products/sd-600eval.html
So rename this board files so that it reflects actual product in market.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch move sdcc3 pinctrl nodes out of board file, so that
other boards do not duplicate the same thing.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch moves out the sdcc1 pinctrl nodes out of board files to soc file,
so that it will be duplicated in other board files.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Initial release for rk3229 evb board, and turn the GMAC on.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We have the brother chipset that RK3228 and RK3229, they share most
of dts configuration, but there are a number of different features.
In order to develop the future when they are easy to distinguish,
we need them to be independent.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the DT node for the random number generator peripheral.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Describe JPEG Processing Unit (JPU) in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add JPU clock and its parent, M2 clock to the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the (previously omitted) DU pin data to the SILK board's device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now that we've a clock node describing pll3 we must add it to the
simplefb nodes clocks lists to avoid it getting turned off when
simplefb is used.
This fixes the screen going black when using simplefb.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Adding dt node for hardware random number generator IP.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7 SoC has the same SHA IP as OMAP5. Add DT entry for the same.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[t-kristo@ti.com: changed SHA to use EDMA instead of SDMA]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7 SoC has the same AES IP as OMAP4. Add DT entries for both AES cores.
Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[t-kristo@ti.com: squashed in the change to use EDMA, squashed in
support for two AES cores]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit adds the stdout-path propety in /chosen for all Beaglebone
boards.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- Chris provides documentation and DTS fixes for the bcm11351 CPU enable-method in preparation
for adding support for the BCM23550 SoC and its corresponding documentation, SoC dtsi
and the Sparrow board DTS file
- Jon adds MSI support to the PCI nodes, updates the secondary cores boot address for the B0
production revision of the Northstar Plus SoC, adds a DTS for the BCM958625HR board, another
one for the BCM958525XMC board, and finally adds the PL330 DMA controller to the NSP DTS
- Rafal enables the SPI NOR flash on dual flash systems (NAND + SPI) on the BCM5301x SoCs
and devices
- Florian adds support for the BCM5301x built-in Ethernet switch by adding nodes for the
Gigabit MAC controllers and the Switch Register Access block, and finally updates the
SmartRG SR-400AC board with its switch port layout
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Merge tag 'arm-soc/for-4.8/devicetree' of http://github.com/Broadcom/stblinux into next/dt
This pull request contains Device Tree changes for Broadcom ARM-based SoCs:
- Chris provides documentation and DTS fixes for the bcm11351 CPU enable-method in preparation
for adding support for the BCM23550 SoC and its corresponding documentation, SoC dtsi
and the Sparrow board DTS file
- Jon adds MSI support to the PCI nodes, updates the secondary cores boot address for the B0
production revision of the Northstar Plus SoC, adds a DTS for the BCM958625HR board, another
one for the BCM958525XMC board, and finally adds the PL330 DMA controller to the NSP DTS
- Rafal enables the SPI NOR flash on dual flash systems (NAND + SPI) on the BCM5301x SoCs
and devices
- Florian adds support for the BCM5301x built-in Ethernet switch by adding nodes for the
Gigabit MAC controllers and the Switch Register Access block, and finally updates the
SmartRG SR-400AC board with its switch port layout
* tag 'arm-soc/for-4.8/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: BCM5310x: Enable switch ports on SmartRG SR400AC
ARM: dts: BCM5301X: Add SRAB interrupts
ARM: dts: Enable SRAB switch and GMACs on 5301x DTS
ARM: dts: NSP: Add PL330 support
ARM: dts: NSP: Add XMC board support
ARM: dts: bcm23550: Add device tree files
Documentation: devicetree: Document BCM23550 bindings
ARM: BCM5301X: Enable SPI-NOR on dual flash devices
ARM: dts: NSP: Add new DT file for bcm958625hr
ARM: dts: NSP: modify second CPU address
ARM: dts: NSP: Add MSI support on PCI
ARM: BCM: modify Broadcom CPU enable method
ARM: dts: fix use of bcm11351 enable method
Documentation: Binding docs for bcm11351 enable method
Signed-off-by: Olof Johansson <olof@lixom.net>
The sun4i-timer driver registers its sched_clock only if the machine is
compatible with "allwinner,sun5i-a13", "allwinner,sun5i-a10s" or
"allwinner,sun4i-a10".
Add the missing "allwinner,sun5i-a13" string to the machine compatible.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: 465a225fb2 ("ARM: sun5i: Add C.H.I.P DTS")
Cc: <stable@vger.kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
According to the imx6ul-pico-hobbit schematics the Ethernet PHY reset GPIO
is GPIO1_28, so fix it accordingly.
Also adjust the reset duration to 1ms, because the KSZ8081 datasheet
requires 500μs.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt the
polarity of "reset-gpio" is assumed to be active-low unless a separate
property "reset-gpio-active-high" is available. So replace the inconsistent
polarity description to make the correct active-low reset behavior more
obvious.
Signed-off-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6sx-sdb has WDOG1_B pin connected to the PMIC.
Pass the 'fsl,ext-reset-output' property so that the watchdog
can trigger a system POR reset via the PMIC.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6ul-evk has WDOG1_B pin connected to the PMIC.
Pass the 'fsl,ext-reset-output' property so that the watchdog
can trigger a system POR reset via the PMIC.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx7d-sdb has WDOG1_B pin connected to the PMIC.
Pass the 'fsl,ext-reset-output' property so that the watchdog
can trigger a system POR reset via the PMIC.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6qdl-sabresd has WDOG2_B pin connected to the PMIC.
Pass the 'fsl,ext-reset-output' property so that the watchdog
can trigger a system POR reset via the PMIC.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Utilite Pro has a mmc card slot connected to the usdhc3
controller. There is no card detection until hardware revision 1.3.
Add support for it and signal the controller with the broken-cd
property that polling has to be used to detect a card.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The current ldo settings of the cm-fx6 do not allow 1.2GHz cpu
frequency. At this frequency the module behaves unstable.
But the imx6q fuse indicates that 1.2GHz operation is possible.
Hence, remove the 1.2GHz operation point in the device tree.
Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
[christopher.spinrath@rwth-aachen.de: enhance commit message, adjust
remaining operation points to match the ones in imx6q.dtsi and add
a comment in the device tree]
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6 SMP system has the same DMA memory coherency issue [1] with
pl310 L2 controller. With this shared override bit set, the customer
reports the DMA coherency issue is gone. Besides, I have tested
the performance using USB ethernet with/without this bit, it shows
no difference.
[1] http://patchwork.ozlabs.org/patch/469362/
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
R8A7792 SoC doesn't have the EtherMAC core, so SMSC LAN89218 Ethernet
chip was used instead on the Blanche board; this chip is compatible with
SMSC LAN9115 for which there's a (device tree aware) driver. Describe
the chip in the Blanche device tree; enable DHCP and NFS root in the
kernel command line for the kernel booting.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the initial device tree for the R8A7792 SoC based Blanche board.
The board has 2 debug serial ports: SCIF0 and SCIF3; include support for
them, so that the serial console can work.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the IRQC interrupt controller in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe [H]SCIFs in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe SYS-DMAC0/1 in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The initial R8A7792 SoC device tree including CPU cores, GIC, timer, SYSC,
and the required clock descriptions.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
With the SION bit set a pin can be read as GPIO even though it's not muxed
as GPIO. This is useful at times. The downside however is that the signal
is not only routed to the GPIO IP but also all other IPs that can make use
of the pin. This resulted in more than one issue for me in the past. Things
like spi transfers that result in usb reenumeration or setting a GPIO to a
value that triggers an RTS irq for an UART.
This convinces me that the SION bit does more harm than good and so all
SION bits are removed that are not known to be needed.
Note that this has no influence on GPIOs under Linux as the gpio-mxc
driver just reports the level the pin is driven to for outputs and not
the level as seen on the pin.
If this commit introduces a regression for you, please report which SION
bit is essential for your setup.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Update DTSI file to add the reset controller node.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
On these two boards, the serial0 is used for inter-chip connection,
so cannot be used for login console. The serial2 is used instead
for them, but it is tedious to use because upper level deployment
projects must switch login console per board.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This node consists of various system-level configuration registers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This pin-muxing is needed to get access to the UniPhier System Bus.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Name the Pin Function Controller subnode for SCIFA4 after its device
name, instead of after the serial port alias.
This avoids conflicts when adding support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for SCIF2 after its device
name, instead of using some arbitrary name that looks like a serial port
alias, but differs from the actual alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabling support for more spi interfaces later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for SCIF2 after its device
name, instead of using some arbitrary name that looks like a serial port
alias, but differs from the actual alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabling support for more spi interfaces later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after
their device names, instead of after the serial port aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for SCIF0 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnodes for QSPI and MSIOF0 after
their device names, instead of after the spi interface aliases.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after
their device names, instead of after the serial port aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for VIN1 after its device name,
instead of using the generic and indexless "vin".
This avoids conflicts when enabling support for more video inputs later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnodes for QSPI and MSIOF1 after
their device names, instead of after the spi interface aliases.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnodes for SCIF0 and SCIFA1 after
their device names, instead of after the serial port aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnodes for SCIF2 and SCIF4 after
their device names, instead of using some arbitrary names that look like
serial port aliases, but differ from the actual aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for SCIF0 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for SCIFA1 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for MMC0 after its device name,
instead of using the generic and indexless "mmc".
This avoids conflicts when enabling support for more MMC interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Name the Pin Function Controller subnode for SCIFA0 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- Update Arria10 ECC manager
- Add ethernet alias for Arria10
- Update serial alias for Arria10
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Merge tag 'socfpga_updates_v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS updates for v4.8
- Update Arria10 ECC manager
- Add ethernet alias for Arria10
- Update serial alias for Arria10
* tag 'socfpga_updates_v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: fix definitions of serial console
ARM: dts: socfpga: add ethernet alias on Arria10
ARM: dts: Move Arria10 SDRAM as child of ECC Manager
ARM: dts: Arria10 ECC Manager IRQ controller changes
Signed-off-by: Olof Johansson <olof@lixom.net>
- Move the ab8500 compatible string from the board to the
chipset.
- Define GPIO line names for the boards.
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Merge tag 'ux500-dt-asoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
Ux500 devicetree patches:
- Move the ab8500 compatible string from the board to the
chipset.
- Define GPIO line names for the boards.
* tag 'ux500-dt-asoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: UX500: name the GPIO lines on HREFv60plus
ARM: dts: Ux500: name the GPIO lines on Snowball
ARM: dts: Ux500: move compatible string to chipset
Signed-off-by: Olof Johansson <olof@lixom.net>
This brings support for Hardkernel's Odroid XU board. It was the first
design with big.LITTLE SoC from Samsung: Exynos5410. The board is not
very popular. Newer XU3 and XU4 got more attention.
Board details:
1. Exynos5410 octa-core (A15+A7, however as of now only one cluster is
enabled),
2. 2 GB DDR3 RAM,
3. PowerVR SGX544MP3 GPU (not enabled in DTS),
4. USB 3.0 Host x 1, USB 3.0 OTG x 1, USB 2.0 Host x 4,
5. HDMI 1.4a, MIPI DSI and Display Port (Display Port not on all of
revisions though),
6. eMMC 4.5 and microSD slots.
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Merge tag 'samsung-dt-odroid-xu-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Topic branch for adding Exynos 5410 Odroid XU board for v4.8.
This brings support for Hardkernel's Odroid XU board. It was the first
design with big.LITTLE SoC from Samsung: Exynos5410. The board is not
very popular. Newer XU3 and XU4 got more attention.
Board details:
1. Exynos5410 octa-core (A15+A7, however as of now only one cluster is
enabled),
2. 2 GB DDR3 RAM,
3. PowerVR SGX544MP3 GPU (not enabled in DTS),
4. USB 3.0 Host x 1, USB 3.0 OTG x 1, USB 2.0 Host x 4,
5. HDMI 1.4a, MIPI DSI and Display Port (Display Port not on all of
revisions though),
6. eMMC 4.5 and microSD slots.
* tag 'samsung-dt-odroid-xu-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (28 commits)
ARM: dts: exynos: Add watchdog and Security SubSystem to Exynos5410
ARM: dts: exynos: Configure PWM, usb3503, PMIC and thermal on Odroid XU board
ARM: dts: exynos: Add Thermal Management Unit to Exynos5410
ARM: dts: exynos: Interrupt for USB DWC3-1 differs between Exynos5420 and 5410
dt-bindings: clock: Add watchdog and SSS clock IDs to Exynos5410
dt-bindings: clock: Add TMU clock ID to Exynos5410
ARM: dts: exynos: Add RTC and I2C to Exynos5410
ARM: dts: exynos: Add I2C, PWM and UART pinctrl to Exynos5410
ARM: dts: exynos: Move HSI2C nodes to exynos54xx.dtsi
ARM: dts: exynos: Add initial support for Odroid XU board
ARM: dts: exynos: Add USB to Exynos5410
ARM: dts: exynos: Move common Exynos5410/542x/5800 nodes to new DTSI
ARM: dts: exynos: MCT is not an interrupt controller and extend length of iomap
ARM: dts: exynos: Enable UART3 on Exynos5410
ARM: dts: exynos: Include common exynos5 in exynos5410.dtsi
ARM: dts: exynos: Move Exynos5250 and Exynos5420 nodes under soc
ARM: dts: exynos: Use phandle to get parent node in exynos5250-snow
ARM: dts: exynos: Prepare for inclusion of exynos5.dtsi in exynos5410.dtsi
ARM: dts: exynos: Move common nodes to exynos5.dtsi
ARM: dts: exynos: Split Odroid XU3 LEDs to separate DTSI
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Define the port mapping for the SmartRG SR400ACE device.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
