Add support for the internal timer peripheral on RV1108.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Currently we do USB configuration only if the host mode (CONFIG_USB)
is enabled. But it should be done also in the case of device-only setups,
so change the condition to CONFIG_USB_SUPPORT. This allows to use
omap_udc on Palm Tungsten E.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add initial MMC configuration for Palm Tungsten E to allow using a proper
rootfs on the device. This still assumes the bootloader enabling the MMC,
and that the card is always present and writeable.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These changes add the external memory controller on Tegra20 as well as
the VIC on Tegra124.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlwKf2ITHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zod1XD/98KTu3zmMHnngTCNF095/kTCOL60LK
vri14zkSBaiRlt3VJR25nzkRhprh0+O08IWjO/iFsl9yI1IUcQsAMvNgAW/pKcmg
zWaCTrJrPO0et//yeaH3dorOWyPIekQIzwoVQtiIh6JL2395SJ0YB6PpTH4i5WP8
f3ZOaU9c8As6/GU0vIc5cusKO7ciEnC8FG2bkCx9eCKCxXQA1JvPC6eKXbmP+4QB
WXjg2L9VXWg3VF6oqSkkVEntNvYJPCbozbP5yjvZNbcXyVY+6XFtE5RGhEb1Ap9E
MrzaR27UfK4z4BgrkvGi/JN+gaVTHetOBGLWUgdBBz+nzSCLIIhaoqtYhvqw8BbS
1MWMXpOtO3IBeiI0U+iu3WzOqopWtf3p/PiHwoIgTqpC0nEwEo4TlTwYWHnksrtz
+NmalZJ+69e2gX8HzMR+e5FqtZu7WaQ+1gFxpMXm1dl2QDohnQMWrY1cynVvW2fU
SmpD8875HE8ievbdkcZ2+Qu6zvNxtZ1jVEdmf8sq6ol9qGeZU+awDvYzqMrfAn2e
OygFlEDxojaZwf341ql5UNfn1mN2/oXy/pf9AzhmA59fUBX9Tq9naEUjrSJ1mWlX
w++JVcWPaeiuTXPCIMB57kg3b6iu4F9CO54NNGyANuVrQmHbeT0Nrm5IP+Hk/n0Y
J809bzhx2X8/3g==
=UkRy
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.21-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
ARM: tegra: Device tree changes for v4.21-rc1
These changes add the external memory controller on Tegra20 as well as
the VIC on Tegra124.
* tag 'tegra-for-4.21-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Add VIC on Tegra124
ARM: dts: tegra20: Add clock entry to External Memory Controller
ARM: dts: tegra20: Add interrupt entry to External Memory Controller
Signed-off-by: Olof Johansson <olof@lixom.net>
- New machine: Facebook Backpack-CMM BMC and flash layout
- OpenPower reference systems (Palmetto P8, Romulus P9) move to the
ColdFire based FSI driver
- Misc device tree updates from the OpenBMC project
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAlwHEbsACgkQa3ZZB4FH
cJ5WVw//aro9aO6fZqk2l7TA8Umhfa/vyX+w6ShCHjsIjKnhcJo3FxeoVUoe+BdR
cRLAorHY5M6WopxaG9TxfFvRNyaHsHIkyBWXEfKlSSnQV8YeLUTxwZ0v/O2kWNvy
levZ42D+cZJclQvvFwTKXHut5BKsvx9M6wEhapOIIENC1bxHVCbVuXB+cWxGz0zQ
CXkLw3QDaErSlCZzNMd2qgJP4IISqbNk1N0jMzKuO9NBwTpl4ZSZJrNT/jLOed2s
pLF6xmk/ldzVRLj+2T5PE35d7yhpzJyNWvKHzY2Ip8PK3qtf5m5OTzfZGi/aOn2N
rK2DSbAV1zZf6iM8rZbJvGo9FDCwLEGfu3/tZLqDcT9LrWvsEQJINA5oirHGRIaK
Th0eaG1tOPIcAvDhMKdhIL4P8nCRLXgIq9LbaXshmpgRhPtK8yIQhvYBI6ADt+aw
aLOo3aEpWZnrchWDBLFdd5awzEATUQmx6pda1D0MNFKeAu9nbVHNtTaVoAOveqyv
lkuc2pNghMSw4lVCarmrfSd47tkEA7P/cYUIQ8IuNix8PUFF/LsebWkZYOloghdV
GhLSdy0eRl6Bi67g6/XPUhzC3VwMvGBd3+IUpbZ0QG0eKI0c5lrGvr11++hVx2iZ
HfORQhjUHx7CRthhuKofZKM2yg+ov3JT1B7/9Py5crWl+WABiao=
=A+J2
-----END PGP SIGNATURE-----
Merge tag 'aspeed-4.21-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt
ASPEED device tree updates for 4.20
- New machine: Facebook Backpack-CMM BMC and flash layout
- OpenPower reference systems (Palmetto P8, Romulus P9) move to the
ColdFire based FSI driver
- Misc device tree updates from the OpenBMC project
* tag 'aspeed-4.21-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Add Facebook Backpack-CMM BMC
ARM: dts: Add Facebook BMC flash layout
ARM: dts: aspeed: wspoon: Enable iio-hwmon battery
ARM: dts: aspeed: romulus: Enable iio-hwmon-battery
ARM: dts: aspeed: Enable VHUB on Romulus
ARM: dts: aspeed-palmetto: Add LPC control node
ARM: dts: aspeed: Palmetto system can use coprocessor for FSI
ARM: dts: aspeed: Romulus system can use coprocessor for FSI
Signed-off-by: Olof Johansson <olof@lixom.net>
- various fixes from Daniel (W=12 issues mainly)
- support for the first pxa3xx devicetree pxa board
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEExgkueSa0u8n4Ls+HA/Z63R24yxIFAlwFrGsXHHJvYmVydC5q
YXJ6bWlrQGZyZWUuZnIACgkQA/Z63R24yxLPTxAApfLlY5v6u0SA5wmyobRpxTpI
BXdle6O4/tFz5StDb5C1R6Jh3JsDRzZeJOwt3Plfb/K0Y4JbXd9PEJ+4Z8METbvd
aIQ7W5tkyz2PCoxCXlTZ39yaIT8sm4kBrmjjcD/OecYrNVGRp1CExhbCYdA159ne
jvp757i3my/3b2c8O7WltMF9Xia12VhuddgLIkU1fqwoF5mLcvlNe3OSsnoK/88N
HPW4ze2CzUo3wdJKcuKUl+8OIkve0x8slakZ/z0vcKCjz6xqtJGV1Lomz4FIaAmw
MjYXMfKEIcTBQJ0tgLagICdpcZdKtuh7M+yiYlQI5XORl9zx5WGaAf3JJUDWf93G
1e0pECYyQMbvpnptnBchOteJz2UsB72yH/VO3goxgI1+9FL/+1kihGZgHNcJkXFp
9vbxqB4AgCjetkQANHNlpd8S7xtwckttasxJmGXBhL3LahuznTIObAo3eq5FszK6
s1Ro1dSiCsY3S6Gs8dPft962MqOTURCXXMgvqnKH1mQ6E1DYcGF0IAJqdXm76HpC
coUC7Aq/7MiCeaQxXa/JKpOnHwr4TfN2R/O98IAG3f/oLJ4EGP2fQLA1IU4g7tqa
JEaLA2tI/7JXINZ91ZyLSCztehO5wWV+KLIHR9VZOhLAp6HDREMMItY67aGbXNjr
5zUSgh6rxwxtpdFYuZE=
=HZqo
-----END PGP SIGNATURE-----
Merge tag 'pxa-dt-4.21' of https://github.com/rjarzmik/linux into next/dt
This device-tree pxa update brings :
- various fixes from Daniel (W=12 issues mainly)
- support for the first pxa3xx devicetree pxa board
* tag 'pxa-dt-4.21' of https://github.com/rjarzmik/linux:
ARM: dts: pxa3xx: Add Raumfeld DTS files
ARM: dts: pxa: clean up USB controller nodes
ARM: dts: pxa3xx: clean up pxa3xx clock controller node name
ARM: dts: pxa3xx: order timer and gcu nodes under /pxabus
ARM: dts: pxa2xx: fix hwuart memory range
ARM: dts: pxa3xx: drop #address-cells and #size-cells from pinctrl node
ARM: dts: pxa2xx: drop #address-cells and #size-cells from /cpus
ARM: dts: pxa3xx: add gcu node
Signed-off-by: Olof Johansson <olof@lixom.net>
We need to add mcasp l3 port ranges for mcasp to use a correct l3
data port address for dma. And we're also missing the optional clocks
that we have tagged with HWMOD_OPT_CLKS_NEEDED in omap_hwmod_7xx_data.c.
Note that for reading the module revision register HWMOD_OPT_CLKS_NEEDED
do not seem to be needed. So they could be probably directly managed
only by the mcasp driver, and then we could leave them out for the
interconnect target module.
Fixes: 4ed0dfe3cf ("ARM: dts: dra7: Move l4 child devices to probe
them with ti-sysc")
Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Looks like I missed the ranges for am335x epwmss. Let's set it up the
same way as for am437x and dra7.
Fixes: 87fc89ced3 ("ARM: dts: am335x: Move l4 child devices to probe
them with ti-sysc")
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The i.MX7D configuration was reworked, but that change did
not get propagated into the newly added i.MX7ULP, which now
produces a Kconfig warning:
WARNING: unmet direct dependencies detected for HAVE_ARM_ARCH_TIMER
Depends on [n]: CPU_V7 [=n]
Selected by [y]:
- SOC_IMX7ULP [=y] && ARCH_MXC [=y] && (ARCH_MULTI_V7 [=n] || ARM_SINGLE_ARMV7M [=y])
Change it to work the same way as i.MX7D.
Fixes: 1a1f919eb5 ("ARM: imx: Provide support for NXP i.MX7D Cortex-M4")
Fixes: de70d0e9d4 ("ARM: imx: add initial support for imx7ulp")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Until the board specific dts files are updated to have hwmod
flags at the interconnect target module level, we want to keep
things working both for old and new dts files.
So let's also check the first child for hwmod flags. The module
flags are for the whole module, so only the first child should
ever have them.
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The 32-bit Meson SoCs use multiple Cortex-A9 (Meson8 and Meson8m2) or
Cortex-A5 (Meson8b) CPU cores. These come with the "ARM global timer"
and "Timer-Watchdog" (aka TWD, which provides both a per-cpu local timer
and watchdog).
Selecting ARM_GLOBAL_TIMER and HAVE_ARM_TWD allows us to add the timers
to the SoC.dtsi files.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The usual batch; most of them are DT tweaks to fix misdescribed
hardware. Beyond that:
- A bugfix for MMP2 CPU detection, it's been there quite a while but
makes sense to fix now anyway.
- Some power management tweaks;
+ disabling of CPU idle power state on Marvell Armada 7K/8K (Macchiatobin et al)
+ Increase of minimum voltage on BananaPi M3
+ Tweak of power ramp time for DVFS on NXP/Freescale i.MX7SX
- A couple of MAINTAINER updates; MMP has a new volunteer to look after
it, and Mediatek adds a few keywords, IRC channel and wiki URL.
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlwNtPAPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3o7oQAKbaWFicYzMaH1MK7wmNf2k0VKqwA0EQcQKA
DSfT+16bcnetP84e559k5YwpjUKAW7c/LfG5zQ/Zz1ZXdDRPKNDpT+C0mqg0DPeM
IcraDbRooqeT9VNNCFRr22nB5kp57OjmFDnDjYVoZbjTjyI2uAgaZGA4AMCauOS5
LzUXqxkMSe+LVqHeTnnHZDol4ICOlIg5eBkhmmRd3fCPq2NLI/l0HfCbLHBQsJYe
dlMxkhNzfxepiojY1uGzQledUg0/1JOkJF2tXMWb176JhcZ7Hoxx002/GAm1m0G2
Rkb5/cs3tfl8Jr29LR6h9BCnZZ+q3D4C2e/sWtWYRNB0z0zBqrOIopmtgh5iyERI
T+CeJwf9fso6HTXQnWelYT5+2eQBQfakDx9PbQpYaNoA1g3LwZUxOc6d/t89vYKV
7tWeXJ0/PI2Vo8AUoT6mu4GH62QAZSM7mAg7p8uPFar2IiVd1ktVD4PoXVYsEhvT
h7hljPsYkBC/EcHG9tacTqCMfO0dJfH0AKfzs6PuY22S6+dPDg+ReoAvoF35P0HK
5oHB6WqKEC15ZG72rVurkk1C6YEirBF9wTPmxxBQnwrdqBddjvgl0Lv21ryrcAjW
O3dX24mB9Ayq+ecu797SNPMDPmgnrqJSG/O8JPxjZFIT+0sb2DVFVfW8jHgw1nj9
vqfwi+m3
=gJxg
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"The usual batch; most of them are DT tweaks to fix misdescribed
hardware. Beyond that:
- A bugfix for MMP2 CPU detection, it's been there quite a while but
makes sense to fix now anyway.
- Some power management tweaks:
+ disabling of CPU idle power state on Marvell Armada 7K/8K
(Macchiatobin et al)
+ Increase of minimum voltage on BananaPi M3
+ Tweak of power ramp time for DVFS on NXP/Freescale i.MX7SX
- A couple of MAINTAINER updates:
+ MMP has a new volunteer to look after it
+ Mediatek adds a few keywords, IRC channel and wiki URL"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: imx7d-nitrogen7: Fix the description of the Wifi clock
ARM: imx: update the cpu power up timing setting on i.mx6sx
Revert "arm64: dts: marvell: add CPU Idle power state support on Armada 7K/8K"
ARM: dts: imx7d-pico: Describe the Wifi clock
ARM: dts: realview: Fix some more duplicate regulator nodes
MAINTAINERS: update entry for MMP platform
ARM: mmp/mmp2: fix cpu_is_mmp2() on mmp2-dt
MAINTAINERS: mediatek: Update SoC entry
ARM: dts: bcm2837: Fix polarity of wifi reset GPIOs
arm64: dts: mt7622: Drop the general purpose timer node
arm64: dts: mt7622: fix no more console output on BPI-R64 board
arm64: dts: mt7622: fix no more console output on rfb1
ARM: dts: sun8i: a83t: bananapi-m3: increase vcc-pd voltage to 3.3V
Add MIO-DMAC (Media IO DMA Controller) nodes, and use them as
the DMA engine of SD/eMMC controllers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
While reviewing the missing mcasp ranges I noticed omap4 hsi range
for gdd is wrong so let's fix it.
I'm not aware of any omap4 devices in mainline kernel though that use
hsi though.
Fixes: 84badc5ec5 ("ARM: dts: omap4: Move l4 child devices to probe
them with ti-sysc")
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
An SVE system is so far the only case where we mandate VHE. As we're
starting to grow this requirements, let's slightly rework the way we
deal with that situation, allowing for easy extension of this check.
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Reviewed-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The NXP i.MX 7ULP Evaluation Kit (EVK) provides a platform for rapid
evaluation of the i.MX 7ULP, which features NXP's advanced implementation
of the Arm Cortex-A7 core, the Arm Cortex-M4 core, as well as a 3D and
2D Graphics Processing Units (GPUs).
The EVK enables HDMI output for simple out-of-the-box to bring up but
allows reconfiguration for MIPI displays. The EVK is designed as a
System-On-Module(SOM) board that connects to an associated baseboard.
The SOM provides 1 GB LPDDR3, 8 MB Quad SPI flash, Micro SD 3.0 card
socket, WiFi/ Bluetooth capability, USB 2.0 OTG with Type C connector
and an NXP PF1550 power management IC (PMIC). The baseboard provides
additional capabilities including a full SD/MMC 3.0 card socket, audio
codec, multiple sensors, an HDMI connector, and an alternate MIPI display
connector. Additionally, the EVK facilitates software development with the
ultimate goal of faster time to market through the support of both
Linux OS and AndroidTM rich operating systems, as well as FreeRTOS.
This patch aims to support the preliminary booting up features
as follows:
GPIO
LPUART
FEC
SD/MMC
See more board details:
https://www.nxp.com/products/processors-and-microcontrollers/
arm-based-processors-and-mcus/i.mx-applications-processors/
i.mx-7-processors/evaluation-kit-for-the-i.mx-7ulp-applications
-processor:MCIMX7ULP-EVK
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX 7ULP family of processors features NXP's advanced implementation
of the Arm Cortex-A7 core, the Arm Cortex-M4 core, as well as a 3D and 2D
Graphics Processing Units (GPUs).
This patch aims to add the initial support including:
1) CLK
2) GPIO PTC, PTD, PTE, PTF
3) uSDHC 1/2
4) LPUART 4/5/6/7
5) LPI2C 6/7
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx7d-pico-hobbit contains a imx7d-pico SoM and a hobbit baseboard.
Add support for it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds following peripherals for the imx7d-pico-pi as:
- LED
- Touchscreen
- GPIO
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There are different models of WiFi being used in the SoM and the
handle name was too restrictive. This reworks it to a more generic and
meaningful name.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pass the "phy-reset-gpios" property in order to describe the GPIO
that performs the Ethernet PHY reset.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx7d-pico-pi board contains:
- One SoM board (imx7d pico)
- One base board (pi).
In order to make it easier for adding support for other board variants,
move the commom SoM part to the imx7d-pico.dtsi file.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Currently the memory size described in dts is 2GB, which is incorrect.
There are 512MB and 1GB versions of imx7d-pico boards, so remove
the hardcoded memory size and let the bootloader pass the correct
value to the kernel.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- A couple of fixes on imx7d-pico and imx7d-nitrogen7 boards to correct
the description of the Wifi clock.
- Change SW2ISO count to get a safer ARM LDO ramp-up time, so that
different boards can be covered. This fixes the ARM LDO failure seen
on some customer boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJcCTt4AAoJEFBXWFqHsHzOJYkH/A2Y3p+VuWKwW4wDxQI27nlX
w/n5edidmcBDPoI1vzAWNDTECbZXvMABvYP/LCsxmRqGtY9QU9QX8FkvY8q+7VjL
I0LQLzd7sbyTRcJM3ymiclkhzsnAPglI7VQXMdgRqO3wqlyFr7cmkLjnYKNt9nlZ
v+Vtx0UuCqj9Ax4UZoj/067S2SGluMXrAfxGfNUkRmESlo2qYmtNV0MhKtsj4Txh
fDeU6sISp5wHqkF6w+OW5L3gUjXBFwdoOyjYj7a6WREFN9NBkf6Ww1+pby+qd7xx
XlcIkpMtixteSAy714bF4SSRhzxOcgIeY8EeenSCYhoYonyrGn72whIIJnIqxSU=
=HW/5
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-4.20-3' into imx7d/pico
i.MX fixes for 4.20, round 3:
- A couple of fixes on imx7d-pico and imx7d-nitrogen7 boards to correct
the description of the Wifi clock.
- Change SW2ISO count to get a safer ARM LDO ramp-up time, so that
different boards can be covered. This fixes the ARM LDO failure seen
on some customer boards.
TPA6130A2 SD pin on RDU1 is not really controlled by SoC and instead
is only meant to notify the system that audio was "muted" by external
actors. To accommodate that, drop "power-gpio" property of hpa1 node as
well as specify a name for that GPIO so that userspace can access it.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Passing GPIO_ACTIVE_HIGH as GPIO flags for the GPIO controlled
regulator improves the readability, so use it instead of the
hardcoded number.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add flexcan support for i.MX6UL board. Change the place of CAN node delete
due to i.MX6ULZ include i.MX6UL dts but not support flexcan.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds the gpu nodes for the adreno 200 GPU on iMX51 and iMX53, now
supported by the freedreno driver.
The compatible for the iMX51 uses a patchid of 1, which is used by drm/msm
driver to identify the smaller 128KiB GMEM size.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add isl29023 light sensor support on i2c3 bus, the light
sensor's power is controlled by a fixed regulator, since
the isl29023 driver and most of other sensors on same
board like mag3110 and mma8451 do NOT support regulator
operation currently, they are all controlled by this
regulator, so this patch also adds the fixed regulator
support and make it always on.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It is not recommended to place regulators inside "simple-bus", so move
them out to make it cleaner the addition of new regulators.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx6qdl have duplicate memory nodes:
- One coming from the board device tree file: memory@
- One coming from the imx6qdl.dtsi file.
Fix the duplication by removing the memory node from
the imx6qdl.dtsi file and by adding 'device_type = "memory";'
in the board Device Tree.
Converted using the following command:
perl -p0777i -e 's/memory\@10000000 \{\n/memory\@10000000 \{\n\t\tdevice_type = \"memory\";\n/m' `find ./arch/arm/boot/dts -name "imx6*"``
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add a memory node, with an empty memory size, which will be filled
by the bootloader.
This is done in preparation for removing the memory node from
imx6qdl.dtsi.
Reported-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx53-voipac-dmm-668 has two memory nodes, but the correct representation
would be to use a single one with two reg entries - one for each RAM chip
select, so fix it accordingly.
Reported-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On the vf610-zii-scu4-aib board there is a hi8435 (32-channel
discrete-to-digital SPI sensor device) in the DSPI0 bus.
Add support for it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add egalax touch screen support on i2c2 bus, it is connected
to LVDS0, while the existing one on i2c3 bus is connected to
LVDS1.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6ul-pico-pi contains a imx6ul-pico SoM and a pi baseboard:
https://www.technexion.com/products/pico-baseboards/detail/PICO-PI
Add support for it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use the same child led node and label name as used in the
imx7d-pico-hobbit board.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx6ul-pico-hobbit board contains:
- One SoM board (imx6ul pico)
- One base board (hobbit).
In order to make it easier for adding support for other board variants,
move the commom SoM part to the imx6ul-pico.dtsi file.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
add the qDMA device tree nodes for LS1021A devices.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on vf500/vf600 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the vf500.dtsi/vf610m4.dtsi files.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GIC_CPU_MASK_SIMPLE() macro should take as its argument the actual
number of CPU cores the interrupt controller is wired to.
i.MX7S contains a single Cortex-A7, hence the second interrupt specifier
cell for Private Peripheral Interrupts should use "GIC_CPU_MASK_SIMPLE(1)".
Likewise, i.MX7D contains two Cortex-A7 cores, so it should use
"GIC_CPU_MASK_SIMPLE(2)" instead.
Tested on a imx7s-warp.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GIC_CPU_MASK_SIMPLE() macro should take as its argument the actual
number of CPU cores the interrupt controller is wired to.
i.MX6UL contains a single Cortex-A7, hence the second interrupt specifier
cell for Private Peripheral Interrupts should use "GIC_CPU_MASK_SIMPLE(1)".
Tested on a imx6ul-evk.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The flexcan1 is pin conflict with fec. User would make flexcan1 enabled
with fec disabled to use CAN.
Signed-off-by: Aisheng Dong <aisheng.dong@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The CAN transceiver on MX6SX Sabreauto board seems in sleep mode by default
after power up the board. User has to press the wakeup key on ARD baseboard
before using the transceiver, or it may not work properly when power up the
board at the first time(warm reset does not have such issue).
This patch operates the wake pin too besides stby/en pins by chaining them
together in regulator mode.
Signed-off-by: Aisheng Dong <aisheng.dong@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
CAN transceiver is different on RevA and RevB board.
It's active high on RevA while active low on Rev B.
Signed-off-by: Aisheng Dong <aisheng.dong@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The LS1021A has 8 possible PWMs, so adding them (disabled by default)
Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The ConnectCore 6UL SBC Pro has an AUO/Goodix LCD accessory kit that is
connected on the LVDS interface through an on-board LVDS transceiver.
This change adds support for the touch interface.
Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This change adds support for the AUO G101EVN010 lcdif panel for the
mxsfb DRM driver.
Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx25 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx25.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx27 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx27.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx1 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx1.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx28 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx28.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx23 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx23.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adopt the SPDX license identifier headers to ease license compliance
management.
Most of the i.MX NXP reference board dts files have already been
converted, so switch the remaining ones.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adopt the SPDX license identifier headers to ease license compliance
management.
Most of the wandboard dts files have already been converted, so switch
the remaining ones.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx50-evk has duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx50.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6SLL EVK board has WDOG_B pin connected to the PMIC;
Add the WDOG_B pinctrl entry and 'fsl,ext-reset-output'
property to wdog node to let watchdog trigger a system
POR reset via the PMIC.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6SLL EVK board, there is a debug LED controlled
by MX6SLL_PAD_EPDC_VCOM1__GPIO2_IO04 pin, add support
for it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6qdl-sabreauto boards have a pcie slot so let's enable it.
Tested on imx6dl-sabreauto with an atk9k wifi card; scanning works.
There are unhandled differences for imx6qp but imx6qp-sabreauto.dts
already contains a snippet explicitly disabling the &pcie node so that
can be dealt with later.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx6sl have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx6sl.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx6sx have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx6sx.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx6ul have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx6ul.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add memory node to board dts.
This is done in preparation of removing the memory node from imx6ul.dtsi.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Current imx7d-sdb.dts has some incorrect settings about
Rev-A and Rev-B boards, some of the settings are based on
Rev-A board but some are based on Rev-B board, clean up it
by adding i.MX7D SDB Rev-A board support, make default
imx7d-sdb.dts for Rev-B board as usual, and introduce
imx7d-sdb-reva.dts for Rev-A board. Below are the affected
differences of Rev-A and Rev-B board:
Rev-A Rev-B
USB_OTG2_PWR: UART3_CTS_B GPIO1_IO07
ENET_EN_B: None GPIO1_IO04
TP_INT_B: EPDC_DATA13 EPDC_BDR1
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Each CPU can (and does) participate in cooling down the system but the
DT only captures a handful of them, normally CPU0, in the cooling maps.
Things work by chance currently as under normal circumstances its the
first CPU of each cluster which is used by the operating systems to
probe the cooling devices. But as soon as this CPU ordering changes and
any other CPU is used to bring up the cooling device, we will start
seeing failures.
Also the DT is rather incomplete when we list only one CPU in the
cooling maps, as the hardware doesn't have any such limitations.
Update cooling maps to include all devices affected by individual trip
points.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds support for the emtrion GmbH emCON-MX6 modules.
They are available with imx.6 Solo, Dual-Lite, Dual and Quad
equipped with Memory from 512MB to 2GB (configured by U-Boot).
Our default developer-Kit ships with the Avari baseboard and the
EDT ETM0700G0BDH6 Display (imx6[q|dl]-emcon-avari).
The devicetree is split into the common part providing all module
components and the basic support for all SoC versions
(imx6qdl-emcon.dtsi) and parts which are i.mx6 S|DL and D|Q relevant.
Finally the support for the avari baseboard in the developer-kit
configuration is provided by the emcon-avari dts files.
Signed-off-by: Jan Tuerk <jan.tuerk@emtrion.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adding the label cpu0 allows the adjustment of cpu-parameters
by reference in overlaying dtsi files in the same way as it
is possible for imx6q devices.
Signed-off-by: Jan Tuerk <jan.tuerk@emtrion.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Some SOCs in the i.MX6 family have a USB host controller that is
only capable of the HSIC interface and has no on-board PHY.
To be able to use these controllers, we need to add "usb-nop-xceiv"
dummy PHYs.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
From i.MX6SX reference manual CCM chapter, KPP and
WDOGn use IPG clock as their clock, specify IPG
clock for KPP and WDOGn instead of DUMMY clock.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Removed the wrong compatible string "snps,dw-pcie", in case
match incorrect driver.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx7 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx7s.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx35 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx35.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx31 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx31.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Vladimir Zapolskiy <vz@mleia.com>
Tested-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to Documentation/devicetree/bindings/media/fsl-pxp.txt,
only one PXP clock needs to be described and it should be named
"axi".
Also pass the compatible string as suggested in the bindings doc.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove "regulator-always-on" property for vddpu regulator
since it can be OFF when GPU power domain is OFF.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The "fsl,mf-mix-wakeup-irq" is ONLY used as a temporary
solution in NXP's internal tree for Mega/Fast Mix off
feature after suspend, upstream kernel does NOT need it,
remove it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx53 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx53.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Boards based on imx51 have duplicate memory nodes:
- One coming from the board dts file: memory@
- One coming from the imx51.dtsi file.
Fix the duplication by removing the memory node from the dtsi file
and by adding 'device_type = "memory";' in the board dts.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX 7ULP family of processors features NXP's advanced implementation
of the Arm Cortex-A7 core, the Arm Cortex-M4 core, as well as a 3D and 2D
Graphics Processing Units (GPUs).
This patch aims to add an initial support for imx7ulp. Note that we need
configure power mode to Partial Stop mode 3 with system/bus clock enabled
first as the default enabled STOP mode will gate off system/bus clock when
execute WFI in MX7ULP SoC.
And there's still no MXC_CPU_IMX7ULP IDs read from register as ULP has no
anatop as before. So we encode one with 0xff in reverse order in case new
ones will be in the future.
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
If debugging on i.MX is enabled DEBUG_IMX_UART_PORT defines which UART
is used for the debug output. If however debugging is off don't only
hide the then unused config item but drop it completely by using a
dependency instead of a conditional prompt.
This fixes DEBUG_IMX_UART_PORT being present in the kernel config even
if DEBUG_LL is disabled.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
One small fix for a regulator range on the Banana Pi M3
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXAp//QAKCRDj7w1vZxhR
xSwaAP9Yva8hQFjQsLSdxd9qJbMwd0Tr96dI7N8EczzWpi3zYgEA00HNJPfSprXN
pQ6xgaWplftcBbZj6iC24QhY5VDB4wI=
=3MMH
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Allwinner fixes for 4.20
One small fix for a regulator range on the Banana Pi M3
* tag 'sunxi-fixes-for-4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i: a83t: bananapi-m3: increase vcc-pd voltage to 3.3V
Signed-off-by: Olof Johansson <olof@lixom.net>
- A couple of fixes on imx7d-pico and imx7d-nitrogen7 boards to correct
the description of the Wifi clock.
- Change SW2ISO count to get a safer ARM LDO ramp-up time, so that
different boards can be covered. This fixes the ARM LDO failure seen
on some customer boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJcCTt4AAoJEFBXWFqHsHzOJYkH/A2Y3p+VuWKwW4wDxQI27nlX
w/n5edidmcBDPoI1vzAWNDTECbZXvMABvYP/LCsxmRqGtY9QU9QX8FkvY8q+7VjL
I0LQLzd7sbyTRcJM3ymiclkhzsnAPglI7VQXMdgRqO3wqlyFr7cmkLjnYKNt9nlZ
v+Vtx0UuCqj9Ax4UZoj/067S2SGluMXrAfxGfNUkRmESlo2qYmtNV0MhKtsj4Txh
fDeU6sISp5wHqkF6w+OW5L3gUjXBFwdoOyjYj7a6WREFN9NBkf6Ww1+pby+qd7xx
XlcIkpMtixteSAy714bF4SSRhzxOcgIeY8EeenSCYhoYonyrGn72whIIJnIqxSU=
=HW/5
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-4.20-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.20, round 3:
- A couple of fixes on imx7d-pico and imx7d-nitrogen7 boards to correct
the description of the Wifi clock.
- Change SW2ISO count to get a safer ARM LDO ramp-up time, so that
different boards can be covered. This fixes the ARM LDO failure seen
on some customer boards.
* tag 'imx-fixes-4.20-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx7d-nitrogen7: Fix the description of the Wifi clock
ARM: imx: update the cpu power up timing setting on i.mx6sx
ARM: dts: imx7d-pico: Describe the Wifi clock
Signed-off-by: Olof Johansson <olof@lixom.net>
The 50ms debounce is too low and give ghost bounces on some
platforms. Bump it to 100ms to make it stable.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the FOTG210 USB host controller to the Gemini
device trees. In the main SoC DTSI it is flagged as disabled
and then it is selectively enabled on the devices that utilize
it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This sets the partition information on the SQ201 to be read
out from the RedBoot partition table, removes the static
partition table and sets our boot options to mount root from
/dev/mtdblock2 where the squashfs+JFFS2 resides.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Some Gemini platforms have a parallel NOR flash which conflicts
with use cases reusing some of the flash lines (such as CE1)
for GPIO.
Fix this on the D-Link DIR-685 and Itian SQ201 by creating
"enabled" and "disabled" states for the flash pin control
handle, and rely on the flash handling code to switch this
in and out when accessed so these lines can be used
for GPIO when flash is not accessed, and enable flash
access.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The vendor firmware was analyzed to get the right idea about
this flash layout. /proc/mtd contains:
dev: size erasesize name
mtd0: 01e7ff40 00020000 "rootfs"
mtd1: 01f40000 00020000 "upgrade"
mtd2: 00040000 00020000 "rgdb"
mtd3: 00020000 00020000 "nvram"
mtd4: 00040000 00020000 "RedBoot"
mtd5: 00020000 00020000 "LangPack"
mtd6: 02000000 00020000 "flash"
Here "flash" is obviously the whole device and we know "rootfs"
is a bogus hack to point to a squashfs rootfs inside of the main
"upgrade partition". We know "RedBoot" is the first 0x40000 of
the flash and the "upgrade" partition follows from 0x40000 to
0x1f8000. So we have mtd0, 1, 4 and 6 covered.
Remains:
mtd2: 00040000 00020000 "rgdb"
mtd3: 00020000 00020000 "nvram"
mtd5: 00020000 00020000 "LangPack"
Inspecting the flash at 0x1f8000 and 0x1fa000 reveals each of
these starting with "RGCFG1" so we assume 0x1f8000-1fbfff is
"rgdb" of 0x40000.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add DRM bridge driver for TOSHIBA TC358764 chip used in LCD panel
for Samsung Exynos5250-based Arndale board.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add regulator driver for MAX8952 PMIC chip used on Samsung UniversalC210
board.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add DRM bridge driver for TOSHIBA TC358764 chip used in LCD panel
for Samsung Exynos5250-based Arndale board.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add regulator driver for MAX8952 PMIC chip used on Samsung UniversalC210
board.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Earlier attempt to move am335x mcasp to probe with ti-sysc
interconnect target module caused audio to stop working and and
the dts changes were reverted by commit 5d2632a577 ("ARM: dts:
Revert am335x mcasp ti-sysc changes").
Turns out we were missing the l3 data port ranges for mcasp. This
caused mcasp dma to attempt to use wrong port address. So let's
try again essentially reverting the earlier revert and adding the
missing l3 data port ranges.
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
It was noticed that unbinding and rebinding the KSZ8851 ethernet
resulted in the driver reporting "failed to read device ID" at probe.
Probing the reset line with a 'scope while repeatedly attempting to
bind the driver in a shell loop revealed that the KSZ8851 RSTN pin is
constantly held at zero, meaning the device is held in reset, and
does not respond on the SPI bus.
Experimentation with the startup delay on the regulator set to 50ms
shows that the reset is positively released after 20ms.
Schematics for this board are not available, and the traces are buried
in the inner layers of the board which makes tracing where the RSTN pin
extremely difficult. We can only guess that the RSTN pin is wired to a
reset generator chip driven off the ethernet supply, which fits the
observed behaviour.
Include this delay in the regulator startup delay - effectively
treating the reset as a "supply stable" indicator.
This can not be modelled as a delay in the KSZ8851 driver since the
reset generation is board specific - if the RSTN pin had been wired to
a GPIO, reset could be released earlier via the already provided support
in the KSZ8851 driver.
This also got confirmed by Peter Ujfalusi <peter.ujfalusi@ti.com> based
on Blaze schematics that should be very close to SDP4430:
TPS22902YFPR is used as the regulator switch (gpio48 controlled):
Convert arm boot_lock to raw The VOUT is routed to TPS3808G01DBV.
(SCH Note: Threshold set at 90%. Vsense: 0.405V).
According to the TPS3808 data sheet the RESET delay time when Ct is
open (this is the case in the schema): MIN/TYP/MAX: 12/20/28 ms.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[tony@atomide.com: updated with notes from schematics from Peter]
Signed-off-by: Tony Lindgren <tony@atomide.com>
When a micro SD card is inserted in the PDU001 card cage, the card
detection switch is opened and the corresponding GPIO input is driven
by a pull-up. Hence change the active level of the card detection
input from low to high.
Signed-off-by: Felix Brack <fb@ltec.ch>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since commit 1137ceee76 ("ARM: OMAP1: ams-delta: Don't request unused
GPIOs"), on-board audio has appeared muted. Believed to be unused GPIO
pin "hookflash1", apparently set high regardless of the corresponding
bit of "latch2" port attempted to be set low during .init_machine(),
has been identified as the reason.
According to Amstrad E3 wiki, the purpose of the pin hasn't been
clearly identified. Original Amstrad software used to produce a high
pulse on it when the phone was taken off hook or recall was pressed.
With the current finding, we can assume the pin provides a kind of
audio mute function.
Proper resolution of the issue should be done in two steps:
- resolution of an issue with the pin state not reflecting the value
the corresponding bit of the port was attempted to be initialized
with,
- extension of on-board audio driver with a new control.
For now, rename the pin to "audio_mute" to reflect its function and,
as a quick fix, hogg it as output low so on-board audio can produce
audible sound again.
Fixes: 1137ceee76 ("ARM: OMAP1: ams-delta: Don't request unused GPIOs")
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP5's Super-Speed USB port has a software mailbox register
that needs to be fed with VBUS and ID events from an external
VBUS/ID comparator.
Without this, Host role will not work correctly.
Fixes: 656c1a65ab ("ARM: dts: omap5: enable OTG role for DWC3 controller")
Reported-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
"arm,cortex-a15-pmu" is not a valid fallback compatible string for an
Cortex-A7 PMU, so drop it.
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The intention in the previous patch was to only place the processor
tables in the .rodata section if big.Little was being built and we
wanted the branch target hardening, but instead (due to the way it
was tested) it ended up always placing the tables into the .rodata
section.
Although harmless, let's correct this anyway.
Fixes: 3a4d0c2172 ("ARM: ensure that processor vtables is not lost after boot")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Amstrad Delta NAND driver now uses GPIO API for data I/O so there is no
need to assign memory I/O resource to the device any longer. Drop it.
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Data port used by Amstrad Delta NAND driver is actually an OMAP MPUIO
device, already under control of gpio-omap driver. The NAND driver
gets access to the port by ioremapping it and performs read/write
operations. That is done without any proteciton from other users
legally manipulating the port pins over GPIO API.
The plan is to convert the driver to access the port over GPIO consumer
API. Before that is implemented, the driver can already obtain
exclusive access to the port by requesting an array of its GPIO
descriptors.
Add respective entries to the NAND GPIO lookup table.
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
The R40 has an RTC hardware block, which has additional registers
that are not related to RTC or clock functions, and is otherwise
compatible with the H3's RTC.
Add a device node for it, and fix up any references to the LOSC.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The RTC module on the H3 was claimed to be the same as on the A31, when
in fact it is not. The A31 does not have an RTC external clock output,
and its internal RC oscillator's average clock rate is not in the same
range. The H5's RTC has some extra crypto-related registers compared to
the H3. Their exact functions are not clear. Also the RTC-VIO regulator
has different settings.
This patch fixes the compatible string and clock properties to conform
to the updated bindings. The device node for the internal oscillator is
removed, as it is internalized into the RTC device. Clock references to
the IOSC and LOSC are also fixed.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The RTC module on the A23 was claimed to be the same as on the A31, when
in fact it is not. The A31 does not have an RTC external clock output,
and its internal RC oscillator's average clock rate is not in the same
range. The A33's RTC is the same as the A23.
This patch fixes the compatible string and clock properties to conform
to the updated bindings. The register range is also fixed.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Pull ARM spectre fix from Russell King:
"Exynos folk noticed that CPU hotplug wasn't working with their kernel
configuration, and have tested this as fixing the problem"
* 'spectre' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: ensure that processor vtables is not lost after boot
Pull ARM fixes from Russell King:
"Some small fixes that have been accumulated:
- Chris Cole noticed that in a SMP environment, the DMA cache
coherence handling can produce undesirable results in a corner
case
- Propagate that fix for ARMv7M as well
- Fix a false positive with source fortification
- Fix an uninitialised return that Nathan Jones spotted"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8816/1: dma-mapping: fix potential uninitialized return
ARM: 8815/1: V7M: align v7m_dma_inv_range() with v7 counterpart
ARM: 8814/1: mm: improve/fix ARM v7_dma_inv_range() unaligned address handling
ARM: 8806/1: kprobes: Fix false positive with FORTIFY_SOURCE
Arndale boards have wires for DSI and eDP panels, but in-kernel support
for eDP panels is broken for long time and breaks display support even on
boards with DSI panels.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add RTC and charger drivers for MAX8998 chip used on Samsung UniversalC210
board.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Marek Szyprowski reported problems with CPU hotplug in current kernels.
This was tracked down to the processor vtables being located in an
init section, and therefore discarded after kernel boot, despite being
required after boot to properly initialise the non-boot CPUs.
Arrange for these tables to end up in .rodata when required.
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Krzysztof Kozlowski <krzk@kernel.org>
Fixes: 383fb3ee80 ("ARM: spectre-v2: per-CPU vtables to work around big.Little systems")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
These days architectures are mostly out of the business of dealing with
struct scatterlist at all, unless they have architecture specific iommu
drivers. Replace the ARCH_HAS_SG_CHAIN symbol with a ARCH_NO_SG_CHAIN
one only enabled for architectures with horrible legacy iommu drivers
like alpha and parisc, and conditionally for arm which wants to keep it
disable for legacy platforms.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Arm already returns (~(dma_addr_t)0x0) on mapping failures, so we can
switch over to returning DMA_MAPPING_ERROR and let the core dma-mapping
code handle the rest.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
The Edison 2 Quad-Core was a Tablet device released in 2013 by MundoReader
using a rk3188 soc. Add a devicetree for it.
Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
Reviewed-by: Rob Herring <robh@kernel.org>
The include file for at24_platform_data is not needed in this file.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now support nvmem lookups and cell definitions for machine code.
Add relevant data structures for the mac-address stored in at24 EEPROM.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now support nvmem lookups and cell definitions for machine code.
Add relevant data structures for the mac-address stored in at24 EEPROM.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now support nvmem lookups and cell definitions for machine code.
Add relevant data structures for the mac-address stored in at24 EEPROM.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now support nvmem lookups and cell definitions for machine code.
Add relevant data structures for the mac-address stored in at24 EEPROM.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now support nvmem lookups and cell definitions for machine code.
Add relevant data structures for the mac-address stored in at24 EEPROM.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now support nvmem lookups and cell definitions for machine code.
Add relevant data structures for the mac-address stored in at24 EEPROM.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add the Video Processing Unit node for RK3288 SoC.
Fix the VPU IOMMU node, which was disabled and lacking
its power domain property.
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
According to bindings/regulator/fixed-regulator.txt the 'clocks' and
'clock-names' properties are not valid ones.
In order to turn on the Wifi clock the correct location for describing
the CLKO2 clock is via a mmc-pwrseq handle, so do it accordingly.
Fixes: 56354959cf ("ARM: dts: imx: add Boundary Devices Nitrogen7 board")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The R40 datasheet specifies a tolerance range for the external
oscillators used. Add them to the device tree as the clock accuracy.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The H3 datasheet specifies a tolerance range for the external
oscillators used. Add them to the device tree as the clock accuracy.
The internal oscillator is left unchanged, as it will be removed later.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The sw2iso count should cover ARM LDO ramp-up time,
the MAX ARM LDO ramp-up time may be up to more than
100us on some boards, this patch sets sw2iso to 0xf
(~384us) which is the reset value, and it is much
more safe to cover different boards, since we have
observed that some customer boards failed with current
setting of 0x2.
Fixes: 05136f0897 ("ARM: imx: support arm power off in cpuidle for i.mx6sx")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
We need to add mcasp l3 port ranges for mcasp to use a correct l3
data port address for dma.
Fixes: d95adfd458 ("ARM: dts: am437x: Move l4 child devices to
probe them with ti-sysc")
Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the SPI NOR device used to boot up the system
to the iWave RZ/G1N Qseven System On Module DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The iWave RZ/G1N board is almost identical to RZ/G1M. cmt and rwdt modules
are SoC specific and should be part of board dts rather than SoM dtsi. By
moving these nodes to the common dtsi it allows cmt and rwdt to be enabled
on both of these boards with less lines of code.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The current oversampling rate of 512 means that for 48 kHz 16 bit
stereo, the MCLK is running at the same rate as the module clock,
so there is no head room to support higher sampling rates. The codec
however supports up to 192 kHz for playback.
This patch drops the oversampling rate from 512 to 128, so that 192 kHz
audio can be played back directly without downsampling. Ideally we
should be using different oversampling rates for different sampling
rates, but that's not possible without a platform-specific machine
driver.
Fixes: 870f1bd1f5 ("ARM: dts: sun8i: Add audio codec, dai and card for A33")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Just like on the A33, the video engine on the H3 can map any address in
memory, so there is no particular need to have reserved memory at a fixed
address.
As a result, remove the reserved memory node and let the kernel allocate
the CMA pool wherever it sees fit.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
While we believed that the memory for the video engine had to be kept
in the first 256 MiBs of DRAM, this is no longer true starting with the
A33 and any address can be mapped.
As a result, remove the reserved memory node and let the kernel allocate
the CMA pool wherever it sees fit.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The EMAC driver requires a syscon node to access the EMAC clock
configuration register (that is part of the system-control register
range and controlled). For this purpose, a dummy syscon node was
introduced to let the driver access the register freely.
Recently, the EMAC driver was tuned to get access to the register when
the SRAM driver is registered (as used on the A64). As a result, it is
no longer necessary to have a dummy syscon node for that purpose.
Now that we have a proper system-control node for both the H3 and H5,
we can get rid of that dummy syscon node and have the EMAC driver use
the node corresponding to the proper SRAM driver (by switching the
syscon label over to each dtsi). This way, we no longer have two
separate nodes for the same register space.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Unlike in previous generations, the system-control register range is not
limited to a size of 0x30 on the H3. In particular, the EMAC clock
configuration register (accessed through syscon) is at offset 0x30 in
that range.
Extend the register size to its full range (0x1000) as a result.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The Wifi chip should be clocked by a 32kHz clock coming from i.MX7D
CLKO2 output pin, so describe the pinmux and clock hierarchy in the
device tree to allow the Wifi chip to be properly clocked.
Managed to successfully test Wifi with such change. Used the standard
nvram.txt file provided by TechNexion, which selects an external 32kHz
clock for the Wifi chip by default.
Fixes: 99a52450c7 ("ARM: dts: imx7d-pico: Add Wifi support")
Suggested-by: Arend van Spriel <arend.vanspriel@broadcom.com>
Tested-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The values are taken from Amlogic's 3.10 kernel sources.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The values are taken from Amlogic's 3.10 kernel sources. Their sources
have a "meson8m2_n200_2G.dtd" which defines a different voltage table:
- 0.86V for 96MHz
- (values in between omitted)
- 1.14V for 1.992GHz
The reason for this is simply the hardware design because the voltage
regulator on this board is has a minimum output of 0.86V and a maximum
output of 1.14V. The recommended settings are added with this patch
instead of using the values that are only valid for one board.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Meson8b SoC is using four Cortex-A5 cores. These come with an ARM
global timer.
This adds the Cortex-A5 global timer but keeps it disabled for now. The
timer is clocked by the "PERIPH" clock whose rate can change during
runtime (when changing the frequency of the CPU clock). Unfortunately
the arm_global_timer driver does not handle changes to the clock rate
yet.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Meson8B SoC is using four ARM Cortex-A5 cores which come with a
"TWD" (Timer-Watchdog) based timer. This adds support for the ARM TWD
Timer on this SoC.
Suggested-by: Carlo Caione <carlo@endlessm.com>
[ rebased patch from Carlo, use IRQ_TYPE_EDGE_RISING instead of
IRQ_TYPE_LEVEL_LOW to prevent "GIC: PPI13 is secure or misconfigured"
message during boot, use pre-processor macros to specify the IRQ,
added the correct clock, dropped TWD watchdog node since there's no
driver for it anymore ]
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Meson8 and Meson8m2 SoCs are using four Cortex-A9 cores. These come
with an ARM global timer.
This adds the Cortex-A9 global timer but keeps it disabled for now. The
timer is clocked by the "PERIPH" clock whose rate can change during
runtime (when changing the frequency of the CPU clock). Unfortunately
the arm_global_timer driver does not handle changes to the clock rate
yet.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Meson8 and Meson8m2 SoC are using four ARM Cortex-A9 cores which
come with a "TWD" (Timer-Watchdog) based timer. This adds support for
the ARM TWD Timer on these two SoCs.
Suggested-by: Carlo Caione <carlo@endlessm.com>
[ rebased patch from Carlo, use IRQ_TYPE_EDGE_RISING instead of
IRQ_TYPE_LEVEL_LOW to prevent "GIC: PPI13 is secure or misconfigured"
message during boot, use pre-processor macros to specify the IRQ,
added the correct clock, dropped TWD watchdog node since there's no
driver for it anymore ]
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The public Meson8b (S805) datasheet describes a memory region called "A9
Periph base" which starts at 0xC4300000 and ends at 0xC430FFFF. Add a
simple-bus node and move all peripherals that are part of this memory
region.
This makes the .dts a bit easier to read. No functional changes.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Select CONFIG_TOUCHSCREEN_GOODIX so that we can have functional touch
screen by default on Digi International's AUO/Goodix LCD accessory kit used
with the ConnectCore 6UL SBC Pro (ccimx6ulsbcpro) board.
Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Instead of passing GPIO numbers directly to the PalmLD
ATA driver, pass GPIO descriptors from the board file and
handle these in the driver.
Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
While trying to use the dma_mmap_*() interface, it was noticed that this
interface returns strange values when passed an incorrect length.
If neither of the if() statements fire then the return value is
uninitialized. In the worst case it returns 0 which means the caller
will think the function succeeded.
Fixes: 1655cf8829 ("ARM: dma-mapping: Remove traces of NOMMU code")
Signed-off-by: Nathan Jones <nathanj439@gmail.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Acked-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Chris has discovered and reported that v7_dma_inv_range() may corrupt
memory if address range is not aligned to cache line size.
Since the whole cache-v7m.S was lifted form cache-v7.S the same
observation applies to v7m_dma_inv_range(). So the fix just mirrors
what has been done for v7 with a little specific of M-class.
Cc: Chris Cole <chris@sageembedded.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This patch addresses possible memory corruption when
v7_dma_inv_range(start_address, end_address) address parameters are not
aligned to whole cache lines. This function issues "invalidate" cache
management operations to all cache lines from start_address (inclusive)
to end_address (exclusive). When start_address and/or end_address are
not aligned, the start and/or end cache lines are first issued "clean &
invalidate" operation. The assumption is this is done to ensure that any
dirty data addresses outside the address range (but part of the first or
last cache lines) are cleaned/flushed so that data is not lost, which
could happen if just an invalidate is issued.
The problem is that these first/last partial cache lines are issued
"clean & invalidate" and then "invalidate". This second "invalidate" is
not required and worse can cause "lost" writes to addresses outside the
address range but part of the cache line. If another component writes to
its part of the cache line between the "clean & invalidate" and
"invalidate" operations, the write can get lost. This fix is to remove
the extra "invalidate" operation when unaligned addressed are used.
A kernel module is available that has a stress test to reproduce the
issue and a unit test of the updated v7_dma_inv_range(). It can be
downloaded from
http://ftp.sageembedded.com/outgoing/linux/cache-test-20181107.tgz.
v7_dma_inv_range() is call by dmac_[un]map_area(addr, len, direction)
when the direction is DMA_FROM_DEVICE. One can (I believe) successfully
argue that DMA from a device to main memory should use buffers aligned
to cache line size, because the "clean & invalidate" might overwrite
data that the device just wrote using DMA. But if a driver does use
unaligned buffers, at least this fix will prevent memory corruption
outside the buffer.
Signed-off-by: Chris Cole <chris@sageembedded.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Switch over to using gpio leds now that we have the gpio driver for
the assabet board register in place.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Add gpio keys support for the right-hand two buttons on the Assabet,
which can be used to wake up the CPU after PM.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Now that we have migrated all users of the legacy private SA1111 gpio
interfaces, we can remove these redundant GPIO interfaces.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
As Lubbock now provides GPIOs via gpiolib for controlling the socket
power, we can use the MAX1600 driver. Switch Lubbock to use this
driver, which simplifies the code.
Acked-by: Dominik Brodowski <linux@dominikbrodowski.net>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Convert mainstone to use the MAX1600 library and gpiod APIs for socket
status and control signals.
Acked-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Convert Neponset to use the gpiod API to specify which GPIOs are used
for PCMCIA, and use the MAX1600 power switch library for Neponset,
simplifying the neponset pcmcia driver as a result.
Acked-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Convert the low level PCMCIA driver to gpiod APIs for controlling
the socket power.
Acked-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Simplify the code by getting rid of the conditional automatic
registration of the sa11x0 PCMCIA interfaces in sa1100_init(), and
require all platforms to explicitly call sa11x0_register_pcmcia().
Only one platform (iPAQ) is affected by this change.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Add a device node for the PCIe controller on the Renesas
RZ/G1N (r8a7744) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the xhci controller on the Renesas
RZ/G1N (r8a7744) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the DT nodes needed by MSIOF[012] interfaces to the SoC dtsi.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the DT node for the QSPI interface to the SoC dtsi.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds support for the camera daughter board which is
connected to iWave's RZ/G1N Qseven carrier board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add TPU support to SoC DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the definitions for pwm[0123456] to the SoC dtsi.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the six IPMMU instances found in the r8a7744 to DT with a disabled
status.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add VSP support to SoC DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add VIN[012] support to SoC dt.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add CMT[01] support to SoC DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch instantiates the thermal sensor module with thermal-zone
support.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe the IRQC interrupt controller in the r8a7744 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the definitions for can0 and can1 to the r8a7744 SoC dtsi.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add sound support for the RZ/G1N SoC (a.k.a. R8A7744).
This work is based on similar work done on the R8A7743 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
RZ/G1N (r8a7744) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add usb dmac and hsusb device nodes on RZ/G1N SoC dtsi.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe internal PCI bridge devices, USB phy device and
link PCI USB devices to USB phy.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the SDHI0 controller on iWave RZ/G1N Qseven System On Module.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add eMMC support for iWave RZ/G1N Qseven System On Module.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add MMC node to the DT of the r8a7744 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SDHI nodes to the DT of the r8a7744 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the I2C[0-5] and IIC[0,1,3] devices nodes to the R8A7744 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe [H]SCIF{|A|B} ports in the R8A7744 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DT node for the Advanced Power Management Unit (APMU), add the
second CPU core, and use "renesas,apmu" as "enable-method".
Also add cpu1 phandle node to the PMU interrupt-affinity property.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add Ethernet AVB support for R8A7744 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe GPIO blocks in the R8A7744 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe SYS-DMAC0/1 in the R8A7744 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
