Commit Graph

694174 Commits

Author SHA1 Message Date
Tom St Denis
10cfafd62a drm/amd/amdgpu: Partial revert of iova debugfs
We discovered that on some devices even with iommu enabled
you can access all of system memory through the iommu translation.

Therefore, we revert the read method to the translation only service
and drop the write method completely.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christan König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:15 -04:00
Evan Quan
a49ccdbd1d drm/amd/amgpu: update vega10 sdma golden setting
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:15 -04:00
Evan Quan
6fe8542957 drm/amd/amgpu: update raven sdma golden setting
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:14 -04:00
Monk Liu
d59c026b7b drm/amdgpu/sriov:fix memory leak after gpu reset
GPU reset will require all hw doing hw_init thus
ucode_init_bo will be invoked again, which lead to
memory leak

skip the fw_buf allocation during sriov gpu reset to avoid
memory leak.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:13 -04:00
Monk Liu
eb01abc7c4 drm/amdgpu:make ctx_add_fence interruptible(v2)
otherwise a gpu hang will make application couldn't be killed
under timedout=0 mode

v2:
Fix memoryleak job/job->s_fence issue
unlock mn
remove the ERROR msg after waiting being interrupted

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:13 -04:00
Monk Liu
f840cc5f84 drm/amdgpu/sriov:init csb for gfxv9
RLC need CSB registers initiated under SRIOV during world switch
otherwise the clear state buffer behav will not be recovered to
current VF scheme after switch back

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:12 -04:00
Horace Chen
6e132ca0bb drm/amdgpu/sriov:increate mailbox polling timeout
increase timeout to 12 seconds,because there may have multiple
FLR waiting for done, the waiting time of events may be long,
increase to 12s to reduce timeout failure.

Signed-off-by: Horace Chen <horace.chen@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:12 -04:00
Monk Liu
030308fcbd drm/amdgpu/sriov:fix page fault issue of driver unload
bo_free on csa is too late to put in amdgpu_fini because that
time ttm is already finished,
Move it earlier to avoid the page fault.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:11 -04:00
Monk Liu
6e2e216fad drm/amdgpu:use formal register to trigger hdp invalidate
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:10 -04:00
Monk Liu
1d4e0a8c4f drm/amdgpu:hdp flush should be put it initialized
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:10 -04:00
Monk Liu
2ea6ab2741 drm/amdgpu:insert TMZ_BEGIN
FRAME_CONTROL(begin) is needed for vega10 due to ucode logic change,
it can fix some CTS random fail under gfx preemption enabled mode.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:09 -04:00
Monk Liu
55981bd2e8 drm/amdgpu/sriov:don't load psp fw during gpu reset
At least for SRIOV we found reload PSP fw during
gpu reset cause PSP hang.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:09 -04:00
Monk Liu
3224a12b90 drm/amdgpu/sriov:move in_reset to adev and rename
currently in_reset is only used in sriov gpu reset, and it
will be used for other non-gfx hw component later, like
PSP, so move it from gfx to adev and rename to in_sriov_reset
make more sense.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:08 -04:00
Monk Liu
7c3f2167b4 drm/amdgpu:no kiq in IH
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:07 -04:00
Monk Liu
ab5d6227b7 drm/amdgpu/sriov:fix missing error handling
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:07 -04:00
Ken Wang
98512bb8c2 drm/amdgpu: Add GPU reset functionality for Vega10
V2

Signed-off-by: Ken Wang <Ken.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:06 -04:00
Tom St Denis
4135d9f82c drm/ttm: Remove TTM dma tracepoint since it's not required anymore
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:06 -04:00
Tom St Denis
79ba280066 drm/amd/amdgpu: remove usage of ttm trace
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:05 -04:00
Tom St Denis
38290b2c45 drm/amd/amdgpu: add support for iova_to_phys to replace TTM trace (v5)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

(v2): Add domain to iova debugfs
(v3): Add true read/write methods to access system memory of pages
      mapped to the device
(v4): Move get_domain call out of loop and return on error
(v5): Just use kmap/kunmap
2017-09-26 15:14:04 -04:00
Tom St Denis
a40cfa0bef drm/amd/amdgpu: Fold TTM debugfs entries into array (v2)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

(v2): add domains and avoid strcmp
2017-09-26 15:14:04 -04:00
Rex Zhu
0b693f0b56 drm/amdgpu: fix checkpatch.pl warning to amdgpu_drv.c
fix checkpatch.pl WARNING:
Prefer 'unsigned int' to bare use of 'unsigned'

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:03 -04:00
Leo Liu
f6e8b15af7 drm/amdgpu: remove the clearance of vce 4.0 interrupt mask
Requested by SRIOV, the clearance of the bit moved into firmware

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:03 -04:00
Xiangliang.Yu
3e4b0bd960 drm/amdgpu/sdma3: set wptr shadow atomically
Port it from sdma4 for wptr polling usage.

Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:02 -04:00
Xiangliang.Yu
e33dac39bc drm/amdgpu/sdma3: Enable sdma wptr polling for SRIOV
When hypervisor triggering FLR for one of VFs, need to enable sdma
wptr polling to avoid missing wptr update if enabling doorbell.

Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 15:14:01 -04:00
Christian König
19dde58929 drm/ttm: cleanup ttm_page_alloc_dma.c
Remove unused defines and variables. Also stop computing the
gfp_flags when they aren't used.

No intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 14:53:21 -04:00
Felix Kuehling
a2f14820e3 drm/amdgpu: Track pending retry faults in IH and VM (v2)
IH tracks pending retry faults in a hash table for fast lookup in
interrupt context. Each VM has a short FIFO of pending VM faults for
processing in a bottom half.

The IH prescreening stage adds retry faults and filters out repeated
retry interrupts to minimize the impact of interrupt storms.

It's the VM's responsibility remove pending faults once they are
handled. For now this is only done when the VM is destroyed.

v2:
- Made the hash table smaller and the FIFO longer. I never want the
  FIFO to fill up, because that would make prescreen take longer.
  128 pending page faults should be enough to keep migrations busy.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com> (v1)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 14:53:20 -04:00
Felix Kuehling
5d86b2c391 drm/amd: Closed hash table with low overhead (v2)
This adds a statically sized closed hash table implementation with
low memory and CPU overhead. The API is inspired by kfifo.

Storing, retrieving and deleting data does not involve any dynamic
memory management, which makes it ideal for use in interrupt context.
Static memory usage per entry comprises a 32 or 64 bit hash key, two
bits for occupancy tracking and the value size stored in the table.
No list heads or pointers are needed. Therefore this data structure
should be quite cache-friendly, too.

It uses linear probing and lazy deletion. During lookups free space
is reclaimed and entries relocated to speed up future lookups.

v2: squash in do_div and _BITOPS_LONG_SHIFT fixes

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 14:53:19 -04:00
Felix Kuehling
00ecd8a27c drm/amdgpu: Add prescreening stage in IH processing (v2)
To filter out high-frequency interrupts that can be safely ignored.

v2: squash in trivial typo fix for si (Alex)

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 13:07:04 -04:00
Felix Kuehling
d2791c4563 drm/amdkfd: Use PASID manager from KGD
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 13:07:04 -04:00
Felix Kuehling
a91e70e30c drm/amdkfd: Separate doorbell allocation from PASID
PASID management is moving into KGD. Limiting the PASID range to the
number of doorbell pages is no longer practical.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 13:07:03 -04:00
Felix Kuehling
f4d6229b9d drm/radeon: Add PASID manager for KFD
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 13:07:02 -04:00
Felix Kuehling
02208441cc drm/amdgpu: Add PASID management
Allows assigning a PASID to a VM for identifying VMs involved in page
faults. The global PASID manager is also exported in the KFD
interface so that AMDGPU and KFD can share the PASID space.

PASIDs of different sizes can be requested. On APUs, the PASID size
is deterined by the capabilities of the IOMMU. So KFD must be able
to allocate PASIDs in a smaller range.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 13:07:02 -04:00
Felix Kuehling
ca290da8f6 drm/amdgpu: Fix error handling in amdgpu_vm_init
Make sure vm->root.bo is not left reserved if amdgpu_bo_kmap fails.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 13:07:01 -04:00
Rex Zhu
0596df6b09 drm/amd/powerplay: Simplify smu7_voting_clients()
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 13:07:01 -04:00
Rex Zhu
780cffc599 drm/amdgpu: add powerplay support for CI asics
currently, for CI asics,
use dpm by default, amdgpu.dpm=-1.
when set amdgpu.dpm=1, enable powplay.
when set amdgpu.dpm=0, disable both dpm and powerplay.

when powerplay is stable on CI asics, ci_dpm will
be removed.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 13:07:00 -04:00
Rex Zhu
86457c3b21 drm/amd/powerplay: Add support for CI asics to hwmgr
Add support for CI asics (Bonaire, Hawaii) to
the powerplay hwmgr

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 13:06:59 -04:00
Rex Zhu
970d9804b0 drm/amd/powerplay: Add support functions for CI to ppatomctrl.c
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 13:06:59 -04:00
Rex Zhu
89c67699ad drm/amd/powerplay: refine dmesg info under powerplay
Use pr_debug to prevent spamming unimportant dmesg.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 13:06:58 -04:00
Rex Zhu
2a527680a1 drm/amd/powerplay: fix set target TDP error on tonga/iceland
ConfigurableTDP do not exist from Fiji.
so only use in previous ASIC.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 13:06:58 -04:00
Rex Zhu
9f4b35411c drm/amd/powerplay: add CI asics support to smumgr (v3)
This ports support for CI asics (Bonaire, Hawaii)
to the powerplay smumgr

v2: warning fix (Alex)
v3: squash in fix for thermal (Tom)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 13:06:57 -04:00
Rex Zhu
510c2558b9 drm/amd/powerplay: fix pcie max lane define error
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-18 23:30:37 -04:00
Rex Zhu
e71b7ae673 drm/amd/powerplay: fix spelling typo in function name
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-18 23:30:36 -04:00
Rex Zhu
6df9855fe2 drm/amdgpu: add support for request SI/CI firmware in CGS
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-18 23:30:36 -04:00
Rex Zhu
cd4d74648b drm/amdgpu: unify the interface of amd_pm_funcs
put amd_pm_funcs table in struct powerplay for all
asics.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-18 23:30:35 -04:00
Rex Zhu
f93f0c3a7e drm/amd/powerplay: use struct amd_pm_funcs in powerplay
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-18 23:30:34 -04:00
Rex Zhu
cfa289fd49 drm/amdgpu: rename amdgpu_dpm_funcs to amd_pm_funcs
renamed amdgpu_dpm_funcs and moved to amd_shared.h
so can shared with powerplay.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-18 23:30:34 -04:00
Rex Zhu
698f88e697 drm/amd/powerplay: delete dead code in powerplay
delete functiontable related codes

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-18 23:30:33 -04:00
Rex Zhu
cf2623d951 drm/amd/powerplay: refine powerplay code for RV
use function points instand of function table.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-18 23:30:32 -04:00
Rex Zhu
06d31a69ca drm/amd/powerplay: refine powerplay code for CZ/ST
1. add function points instand of creat function tables
2. implement stop dpm tasks for CZ/ST

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-18 23:30:32 -04:00
Rex Zhu
1ab4720441 drm/amd/powerplay: refine code for thermal control in powerplay
add function point start_thermal_controller in hwmgr,
delete thermal function table and related functions

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-18 23:30:31 -04:00