Commit Graph

40159 Commits

Author SHA1 Message Date
Dmytro Laktyushkin
09f2317be4 drm/amd/display: change dml vba cursor count define to correct one
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:45:43 -04:00
Dmytro Laktyushkin
c81a351ab9 drm/amd/display: extract global sync params from vba
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:45:37 -04:00
Dmytro Laktyushkin
cb94f78e36 drm/amd/display: add mode support check to dml vba code
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:45:31 -04:00
Dmytro Laktyushkin
6d04ee9dc1 drm/amd/display: Restructuring and cleaning up DML
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:45:24 -04:00
Harry Wentland
19b7fe4a48 Revert "amdgpu/dc: inline a bunch of float operations."
This reverts commit d1209512e0.

Unfortunately these clash with our DML update from the HW guys.

Rerolling this after the fact won't save us anything anymore,
unfortunately so we're back to non-inline for this.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:45:17 -04:00
Harry Wentland
378c4a2d60 Revert "amdgpu/dc: drop display_pipe_clocks.c."
This reverts commit b3fbdcec5e.

Unfortunately these clash with our DML update from the HW guys
as it's starting to get used now.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:45:10 -04:00
Harry Wentland
711b55f3fc Revert "amdgpu/dc: inline a bunch of the dml wrappers."
This reverts commit 3e8c3108da.

Unfortunately these clash with our DML update from the HW guys.
Will attempt to reroll them after.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:45:03 -04:00
Harry Wentland
e168df36a8 Revert "amdgpu/dc: drop dml_util_is_420"
This reverts commit e5bcf3d83e.

Unfortunately these clash with our DML update from the HW guys.
Will attempt to reroll them after.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:44:56 -04:00
Harry Wentland
78109d230b Revert "amdgpu/dc: drop dml display_mode_support.c (v2)"
This reverts commit 5e0adbff08.

Unfortunately these clash with our DML update from the HW guys.
Will attempt to reroll them after.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:44:50 -04:00
Harry Wentland
07e9266593 Revert "amdgpu/dc: inline dml_round_to_multiple"
This reverts commit d8c893b44b.

Unfortunately these clash with our DML update from the HW guys.
Will attempt to reroll them after.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:44:42 -04:00
Yue Hin Lau
c73b046f86 drm/amd/display: Expose some mem_input functions for reuse
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:44:37 -04:00
Charlene Liu
ed23cba20d drm/amd/display: soc_bound_box -update DML based on HW.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:44:32 -04:00
Eric Yang
441ad74173 drm/amd/display: Add override for reporting wm ranges
For verification of watermark select with SMU team, proper
implementation will follow

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:44:26 -04:00
Wenjing Liu
dcf298c313 drm/amd/display: disconnect on HPD low even if edid is the same
[Description]
There are many occasions we need to retrieve sink capability and
notify connectivity change to os even if edid is not changed
on a HPD toggle.
(HDMI2.0 display needs re-enable link on every hpd,
display changes other capability outside from edid
 need to be queried again and possibly reset the mode, etc.)

In these cases we cannot keep the same sink without letting DM know.

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:44:19 -04:00
Tony Cheng
6512387a54 drm/amd/display: align DCLK to voltage level
in past program SMU will use all voltage headroom.  RV does not

if DAL need higher voltage for DCFCLK or DISPCLK, also increase FCLK
to improve stutter as voltage is already

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:44:13 -04:00
Andrew Jiang
8740196935 drm/amd/display: Move power control from link encoder to hwsequencer
A recent commit moved the backlight control code along with the register
defines, but did not move the power control code. This along with
remnant fields in the dce110_link_enc_registers struct made it so that
the code still compiled, but any attempts to access the
LVTMA_PWRSEQ_STATE register led to reading from an address of 0. This
patch corrects that.

Also, rename blacklight_control to edp_backlight_control (Typo fix).

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:44:08 -04:00
Yue Hin Lau
b87d78d6aa drm/amd/display: moving cursor functions from ipp to mem_input
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:44:03 -04:00
Jerry Zuo
60d671db1c drm/amd/display: Fix ref_count messed up issue
In the full update type, need to add ref_count to the newly
created dc_state->stream. It made mistake to add ref_count to
dc->current_state->stream which keeps adding up without release.

Signed-off-by: Jerry Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:43:57 -04:00
Tony Cheng
2e1cc33463 drm/amd/display: dal 3.1.03
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:43:52 -04:00
Tony Cheng
9f945eab79 drm/amd/display: fix bug in force_single_disp_pipe_split
should only lower dpp clock.

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:43:47 -04:00
Tony Cheng
966869d07a drm/amd/display: option to maximize lb usage
experimental change for testing if max line buffer result in better stutter efficiency

for 1080p, LB can hold up to 9 line at 10bpcc, potentially add 10 line time of
latency hiding.

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:43:41 -04:00
Tony Cheng
a32a7708ae drm/amd/display: add option to disable DCC for DCC 128b request
1. reverts commit e67f51012740 ("dc: temp disable DCC on high res.")
- default still DCC enabled

2. add debug options to decide how DCC is disabled
- disable DCC
- disable DCC if DCC requires 128b (aka. half) request
-- observed compressed data corruption result in screen corruption in
full (256b) request while half (128b) would cause DCN to hang, result in
DF hang

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:43:36 -04:00
Tony Cheng
db64fbe732 drm/amd/display: enable optional pipe split for single display
also refactor debug option.  now pipe_split_policy are
dynamic = no hack around dcn_calcs.  will split based on HW recommendation
avoid = avoid split if we can support the config with higher voltage
avoid_multi_display = allow split with single display output.

force_single_disp_pipe_split
force single display to pipe split to improve stutter efficiency
by using DET buffers using 2 HUBP.

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:43:30 -04:00
Charlene Liu
e778915c91 drm/amd/display: temp disable DCC on high res.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:43:24 -04:00
Jerry Zuo
5442765147 drm/amd/display: Fix MST daisy chain SST not light up
In SST daisy chain scenario, edid is getting read in mst hotplug
routine. It is getting conflict with drm send_enum_path_resources
kernel thread in terms of i2c bus which is getting locked up in
such case.

Have edid being read in get_mode hook, instead of in hotplug
routine.

Signed-off-by: Jerry Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:43:18 -04:00
Yongqiang Sun
56e6ed4561 drm/amd/display: Only reset top pipe back end.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:43:13 -04:00
Yongqiang Sun
671a6246e0 drm/amd/display: Early return when turn off a plane.
In case of two monitor connected and turn off one of the monitors,
OTG0 is locked after graphic plane off due to redundant programming
front end regs.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:43:07 -04:00
SivapiriyanKumarasamy
69b516c91c drm/amd/display: Program stream's csc matrix instead of using default
Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:43:02 -04:00
Wenjing Liu
e4ba6335cd drm/amd/display: update link type to mst before topology discovery
[Description]
link type is not updated before mst topology discovery.
This causes issue when branch device response to link address after before
the start topology discovery event finishes.

[Solution]
update link type to mst before topology discovery

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:42:55 -04:00
Eric Yang
fcbbe3da0a drm/amd/display: Use active + border for bw validation
When doing SLS, KMD gives us clipped v_addressable with
border. This results in bw validation failure.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:42:48 -04:00
Yongqiang Sun
d596e5d08d drm/amd/display: Fixed incorrect return value for validaton
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:42:43 -04:00
Hersen Wu
4f4ee68686 drm/amd/display: screen flickers when connected to ext monitor in clone
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:42:38 -04:00
Tony Cheng
4d1a562659 drm/amd/display: version 3.1.02
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:42:33 -04:00
Yongqiang Sun
e750d56d2c drm/amd/display: Fixed validation return wrong result.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:42:28 -04:00
Charlene Liu
6d732e7917 drm/amd/display: add hubp/dpp pg debug key
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:42:23 -04:00
Charlene Liu
19af33aca4 drm/amd/display: make sure BL off to mainlink off has enough time
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:42:18 -04:00
Ken Chalmers
5df921d4c0 drm/amd/display: fix ASSERT() caused by missing registers.
Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:42:12 -04:00
Yue Hin Lau
dbaed8037c drm/amd/display: edp backlight regression fix
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:42:07 -04:00
Yue Hin Lau
5eefbc4017 drm/amd/display: moving backlight registers to hwsequencer
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:42:02 -04:00
Eric Bernstein
62bf6e9b29 drm/amd/display: update blending mode and set output denorm
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:41:56 -04:00
Eric Yang
904aa42e77 drm/amd/display: add back removed hack for mpcc add
A previous changed removed the hack to match mpcc_idd
with mi instance. This causes pstate hang on resume
from hibernate for yet unknown reason. Add the hack
back for now to work around the issue. More debugging
required in init_hw to root cause the hang.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:41:50 -04:00
Wenjing Liu
25bab0da8f drm/amd/display: set cp25201 to use TPS4
[Description]
hbr2 compliance eye output is unstable
(toggling on and off) with debugger break.
This caueses intermittent PHY automation failure.
Need to look into the root cause later

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:41:43 -04:00
Yue Hin Lau
d53d7866a7 drm/amd/display: removing remaining register definitions work around
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:41:38 -04:00
Andrew Jiang
68d77dd821 drm/amd/display: power_down_Hw need signal type to turnoff backlight
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:41:32 -04:00
ShihChen Chen
4b7e7e2b1b drm/amd/display: make tile changing run at ISR
Signed-off-by: ShihChen Chen <ShihChen.Chen@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:41:27 -04:00
Bhawanpreet Lakha
bc6828e0e6 drm/amd/display: Refactor dc_update_planes_and_stream.
Split update_planes_and_stream_state (split Software and Hardware
programming) as the state is already build, so we only need to
program the hardware

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:41:21 -04:00
Jerry Zuo
fc17235fe6 drm/amd/display: Fix NULL pointer on MST chained mode
Prevent NULL pointer on new_stream being added to ctx
when added MST connectors cannot be found in existing crtc_state
in the chained mode

Signed-off-by: Jerry Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:41:15 -04:00
Jerry Zuo
f4ac176e62 drm/amd/display: Exclude MST from fake sink
Needs effort to take care of the fake sink scenario
in downstream daisy chain device. Exclude MST from
fake sink feature for now.

Signed-off-by: Jerry Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:41:09 -04:00
Yue Hin Lau
eade83503a drm/amd/display: fixing register includes
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:41:03 -04:00
Leo (Sunpeng) Li
4f346e655d drm/amd/display: Match actual state during S3 resume.
During system suspend, we:

1. Cache a duplicate of the current DRM atomic state, which calls hooks
   to duplicate our internal states.
2. Call hooks to disable all functionalities.
3. System suspended.

During resume, we attempt to restore the cached state. However, our
interal states are now stale, since step 1 was done before step 2.
i.e. our cached state does not reflect the disabled nature of things.

This change resolves that by destroying all relevant states to reflect
the actual state during resume.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-21 16:40:54 -04:00