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media: staging: media: davinci_vpfe: Replace a bit shift

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This patch replaces bit shifting on 1 with the BIT(x) macro.
This was done with coccinelle:
@@
constant c;
@@

-1 << c
+BIT(c)

[mchehab+samsung@kernel.org: rebase on the top of upstream]
Signed-off-by: Arushi Singhal <arushisinghal19971997@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
This commit is contained in:
Arushi Singhal 2017-03-29 11:13:20 -04:00 committed by Mauro Carvalho Chehab
parent 6995a65910
commit f42292040d
2 changed files with 5 additions and 5 deletions
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2
drivers/media/platform/omap3isp/ispstat.c
View File

@ -1040,7 +1040,7 @@ static int isp_stat_init_entities(struct ispstat *stat, const char *name,
v4l2_subdev_init(subdev, sd_ops);
snprintf(subdev->name, V4L2_SUBDEV_NAME_SIZE, "OMAP3 ISP %s", name);
subdev->grp_id = 1 << 16; /* group ID for isp subdevs */
subdev->grp_id = BIT(16); /* group ID for isp subdevs */
subdev->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
v4l2_set_subdevdata(subdev, stat);

8
drivers/staging/media/davinci_vpfe/dm365_isif.c
View File

@ -816,7 +816,7 @@ isif_config_dfc(struct vpfe_isif_device *isif, struct vpfe_isif_dfc *vdfc)
/* Correct whole line or partial */
if (vdfc->corr_whole_line)
val |= 1 << ISIF_VDFC_CORR_WHOLE_LN_SHIFT;
val |= BIT(ISIF_VDFC_CORR_WHOLE_LN_SHIFT);
/* level shift value */
val |= (vdfc->def_level_shift & ISIF_VDFC_LEVEL_SHFT_MASK) <<
@ -844,7 +844,7 @@ isif_config_dfc(struct vpfe_isif_device *isif, struct vpfe_isif_dfc *vdfc)
val = isif_read(isif->isif_cfg.base_addr, DFCMEMCTL);
/* set DFCMARST and set DFCMWR */
val |= 1 << ISIF_DFCMEMCTL_DFCMARST_SHIFT;
val |= BIT(ISIF_DFCMEMCTL_DFCMARST_SHIFT);
val |= 1;
isif_write(isif->isif_cfg.base_addr, val, DFCMEMCTL);
@ -875,7 +875,7 @@ isif_config_dfc(struct vpfe_isif_device *isif, struct vpfe_isif_dfc *vdfc)
}
val = isif_read(isif->isif_cfg.base_addr, DFCMEMCTL);
/* clear DFCMARST and set DFCMWR */
val &= ~(1 << ISIF_DFCMEMCTL_DFCMARST_SHIFT);
val &= ~BIT(ISIF_DFCMEMCTL_DFCMARST_SHIFT);
val |= 1;
isif_write(isif->isif_cfg.base_addr, val, DFCMEMCTL);
@ -1135,7 +1135,7 @@ static int isif_config_raw(struct v4l2_subdev *sd, int mode)
isif_write(isif->isif_cfg.base_addr, val, CGAMMAWD);
/* Configure DPCM compression settings */
if (params->v4l2_pix_fmt == V4L2_PIX_FMT_SGRBG10DPCM8) {
val = 1 << ISIF_DPCM_EN_SHIFT;
val = BIT(ISIF_DPCM_EN_SHIFT);
val |= (params->dpcm_predictor &
ISIF_DPCM_PREDICTOR_MASK) << ISIF_DPCM_PREDICTOR_SHIFT;
}