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drm/amd/powerplay: using MinFClock/MaxFclock to report Min/Max memory clock limits

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Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hawking Zhang 2017-05-23 18:26:14 +08:00 committed by Alex Deucher
parent 98990faef1
commit f0846b24b6
1 changed files with 8 additions and 0 deletions
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8
drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
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@ -782,6 +782,7 @@ static int rv_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_p
struct rv_hwmgr *data;
uint32_t level_index;
uint32_t i;
uint32_t vol_dep_record_index = 0;
if (level == NULL || hwmgr == NULL || state == NULL)
return -EINVAL;
@ -801,6 +802,13 @@ static int rv_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_p
}
}
if (level_index == 0) {
vol_dep_record_index = data->clock_vol_info.vdd_dep_on_fclk->count - 1;
level->memory_clock =
data->clock_vol_info.vdd_dep_on_fclk->entries[vol_dep_record_index].clk;
} else
level->memory_clock = data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk;
level->nonLocalMemoryFreq = 0;
level->nonLocalMemoryWidth = 0;