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drm/amd/display: Mask DPCD field to avoid reading unsupported field value

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[Why]
DSC will be disabled if DPCD 0006F[6:3] is set to a non-zero value
because bits 6:3 are not currently supported. When 6:3 is populated, an
unsupported INCREMENT OF bits_per_pixel value is read (DPCD 0006F[2:0])

[How]
Mask the INCREMENT OF bits_per_pixel field so that values in the
unsupported field are ignored.

Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Jaehyun Chung
2020-08-05 17:28:53 -04:00
committed by Alex Deucher
parent 5ab7943187
commit e0f7ff99c9
1 changed files with 3 additions and 1 deletions
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4
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
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@@ -192,8 +192,10 @@ static bool dsc_throughput_from_dpcd(int dpcd_throughput, int *throughput)
}
static bool dsc_bpp_increment_div_from_dpcd(int bpp_increment_dpcd, uint32_t *bpp_increment_div)
static bool dsc_bpp_increment_div_from_dpcd(uint8_t bpp_increment_dpcd, uint32_t *bpp_increment_div)
{
// Mask bpp increment dpcd field to avoid reading other fields
bpp_increment_dpcd &= 0x7;
switch (bpp_increment_dpcd) {
case 0: