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Qualcomm ARM64 DTS updates for v5.20

Browse Source 
This introduces initial support for Lenovo ThinkPad X13s, Qualcomm 8cx
 Gen 3 Compute Reference Device, SA8295P Automotive Development Platform,
 Xiaomi Mi 5s Plus, five new SC7180 Chrome OS boards, Inforce IFC6560, LG
 G7 ThinQ and LG V35 ThinQ.
 
 With IPQ8074 gaining GDSC support, this was expressed in the gcc node
 and defined for the USB nodes. The SDHCI reset line was defined to get
 the storage devices into a known state.
 
 For MSM8996 interconnect providers, the second DSI interface, resets for
 SDHCI are introduced. Support for the Xiaomi Mi 5s Plus is introduced
 and the Dragonboard 820c gains definitions for its LEDs.
 
 The MSM8998 platform changes consists of a various cleanup patches, the
 FxTec Pro1 is split out from using the MTP dts and Sony Xperia devices
 on the "Yoshino" platform gains ToF sensor.
 
 On SC7180 five new Trogdor based boards are added and the description of
 keyboard and detachables is improved.
 
 On the SC7280-based Herobrine board DisplayPort is enabled, SPI flash
 clock rate is changed, WiFi is enabled and the modem firmware path is
 updated. The Villager boards gains touchscreen, and keyboard backlight.
 
 This introduces initial support for the SC8280XP (aka 8cx Gen 3) and
 related automotive platforms are introduced, with support for the
 Qualcomm reference board, the Lenovo Thinkpad X13s and the SA8295P
 Automotive Development Platform.
 
 In addition to a wide range of smaller fixes on the SDM630 and SDM660
 platforms, support for the secondary high speed USB controller is
 introduced and the Sony Xperia "Nile" platform gains support for the RGB
 status LED. Support for the Inforce IFC6560 board is introduced.
 
 On SDM845 the bandwidth monitor for the CPU subsystem is introduced, to
 scale LLCC clock rate based on profiling. CPU and cluster idle states
 are switched to OSI hierarchical states. DB845c and SHIFT 6mq gains LED
 support and new support for the LG G7 ThinQ and LG V35 ThinQ boards are
 added.
 
 DLL/DDR configuration for SDHCI nodes are defined for SM6125.
 
 On SM8250 the GPU per-process page tables is enabled and for RB5 the
 Light Pulse Generator-based LEDs are added.
 
 The display clock controller is introduced for SM8350.
 
 On SM8450 this introduces the camera clock controller and the UART
 typically used for Bluetooth. The interconnect path for the crypto
 engine is added to the SCM node, to ensure this is adequately clocked.
 
 The assigned-clock-rate for the display processor is dropped from
 several platforms, now that the driver derrives the min and max from the
 clock.
 
 In addition to this a wide range of fixes for stylistic issues and
 issues discovered through Devicetree binding validation across many
 platforms and boards are introduced.
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Merge tag 'qcom-arm64-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DTS updates for v5.20

This introduces initial support for Lenovo ThinkPad X13s, Qualcomm 8cx
Gen 3 Compute Reference Device, SA8295P Automotive Development Platform,
Xiaomi Mi 5s Plus, five new SC7180 Chrome OS boards, Inforce IFC6560, LG
G7 ThinQ and LG V35 ThinQ.

With IPQ8074 gaining GDSC support, this was expressed in the gcc node
and defined for the USB nodes. The SDHCI reset line was defined to get
the storage devices into a known state.

For MSM8996 interconnect providers, the second DSI interface, resets for
SDHCI are introduced. Support for the Xiaomi Mi 5s Plus is introduced
and the Dragonboard 820c gains definitions for its LEDs.

The MSM8998 platform changes consists of a various cleanup patches, the
FxTec Pro1 is split out from using the MTP dts and Sony Xperia devices
on the "Yoshino" platform gains ToF sensor.

On SC7180 five new Trogdor based boards are added and the description of
keyboard and detachables is improved.

On the SC7280-based Herobrine board DisplayPort is enabled, SPI flash
clock rate is changed, WiFi is enabled and the modem firmware path is
updated. The Villager boards gains touchscreen, and keyboard backlight.

This introduces initial support for the SC8280XP (aka 8cx Gen 3) and
related automotive platforms are introduced, with support for the
Qualcomm reference board, the Lenovo Thinkpad X13s and the SA8295P
Automotive Development Platform.

In addition to a wide range of smaller fixes on the SDM630 and SDM660
platforms, support for the secondary high speed USB controller is
introduced and the Sony Xperia "Nile" platform gains support for the RGB
status LED. Support for the Inforce IFC6560 board is introduced.

On SDM845 the bandwidth monitor for the CPU subsystem is introduced, to
scale LLCC clock rate based on profiling. CPU and cluster idle states
are switched to OSI hierarchical states. DB845c and SHIFT 6mq gains LED
support and new support for the LG G7 ThinQ and LG V35 ThinQ boards are
added.

DLL/DDR configuration for SDHCI nodes are defined for SM6125.

On SM8250 the GPU per-process page tables is enabled and for RB5 the
Light Pulse Generator-based LEDs are added.

The display clock controller is introduced for SM8350.

On SM8450 this introduces the camera clock controller and the UART
typically used for Bluetooth. The interconnect path for the crypto
engine is added to the SCM node, to ensure this is adequately clocked.

The assigned-clock-rate for the display processor is dropped from
several platforms, now that the driver derrives the min and max from the
clock.

In addition to this a wide range of fixes for stylistic issues and
issues discovered through Devicetree binding validation across many
platforms and boards are introduced.

* tag 'qcom-arm64-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (193 commits)
  arm64: dts: qcom: sc8280xp: fix DP PHY node unit addresses
  arm64: dts: qcom: sc8280xp: fix usb_0 HS PHY ref clock
  arm64: dts: qcom: sc7280: fix PCIe clock reference
  docs: arm: index.rst: add google/chromebook-boot-flow
  arm64: dts: qcom: msm8996: clean up PCIe PHY node
  arm64: dts: qcom: msm8996: use non-empty ranges for PCIe PHYs
  arm64: dts: qcom: sm8450: drop UFS PHY clock-cells
  arm64: dts: qcom: sm8250: drop UFS PHY clock-cells
  arm64: dts: qcom: sc8280xp: drop UFS PHY clock-cells
  arm64: dts: qcom: sm8450: drop USB PHY clock index
  arm64: dts: qcom: sm8350: drop USB PHY clock index
  arm64: dts: qcom: msm8998: drop USB PHY clock index
  arm64: dts: qcom: ipq8074: drop USB PHY clock index
  arm64: dts: qcom: ipq6018: drop USB PHY clock index
  arm64: dts: qcom: sm8250: add missing PCIe PHY clock-cells
  arm64: dts: qcom: sc7280: drop PCIe PHY clock index
  Revert "arm64: dts: qcom: Fix 'reg-names' for sdhci nodes"
  arm64: dts: qcom: sc7180-idp: add vdds supply to the DSI PHY
  arm64: dts: qcom: sc7280: use constants for gpucc clocks and power-domains
  arm64: dts: qcom: msm8996: add missing DSI clock assignments
  ...

Link: https://lore.kernel.org/r/20220713203939.1431054-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-07-14 17:02:04 +02:00
commit e0a5925055
163 changed files with 11374 additions and 1634 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

69
Documentation/arm/google/chromebook-boot-flow.rst Normal file
View File

@ -0,0 +1,69 @@
.. SPDX-License-Identifier: GPL-2.0
======================================
Chromebook Boot Flow
======================================
Most recent Chromebooks that use device tree are using the opensource
depthcharge_ bootloader. Depthcharge_ expects the OS to be packaged as a `FIT
Image`_ which contains an OS image as well as a collection of device trees. It
is up to depthcharge_ to pick the right device tree from the `FIT Image`_ and
provide it to the OS.
The scheme that depthcharge_ uses to pick the device tree takes into account
three variables:
- Board name, specified at depthcharge_ compile time. This is $(BOARD) below.
- Board revision number, determined at runtime (perhaps by reading GPIO
strappings, perhaps via some other method). This is $(REV) below.
- SKU number, read from GPIO strappings at boot time. This is $(SKU) below.
For recent Chromebooks, depthcharge_ creates a match list that looks like this:
- google,$(BOARD)-rev$(REV)-sku$(SKU)
- google,$(BOARD)-rev$(REV)
- google,$(BOARD)-sku$(SKU)
- google,$(BOARD)
Note that some older Chromebooks use a slightly different list that may
not include SKU matching or may prioritize SKU/rev differently.
Note that for some boards there may be extra board-specific logic to inject
extra compatibles into the list, but this is uncommon.
Depthcharge_ will look through all device trees in the `FIT Image`_ trying to
find one that matches the most specific compatible. It will then look
through all device trees in the `FIT Image`_ trying to find the one that
matches the *second most* specific compatible, etc.
When searching for a device tree, depthcharge_ doesn't care where the
compatible string falls within a device tree's root compatible string array.
As an example, if we're on board "lazor", rev 4, SKU 0 and we have two device
trees:
- "google,lazor-rev5-sku0", "google,lazor-rev4-sku0", "qcom,sc7180"
- "google,lazor", "qcom,sc7180"
Then depthcharge_ will pick the first device tree even though
"google,lazor-rev4-sku0" was the second compatible listed in that device tree.
This is because it is a more specific compatible than "google,lazor".
It should be noted that depthcharge_ does not have any smarts to try to
match board or SKU revisions that are "close by". That is to say that
if depthcharge_ knows it's on "rev4" of a board but there is no "rev4"
device tree then depthcharge_ *won't* look for a "rev3" device tree.
In general when any significant changes are made to a board the board
revision number is increased even if none of those changes need to
be reflected in the device tree. Thus it's fairly common to see device
trees with multiple revisions.
It should be noted that, taking into account the above system that
depthcharge_ has, the most flexibility is achieved if the device tree
supporting the newest revision(s) of a board omits the "-rev{REV}"
compatible strings. When this is done then if you get a new board
revision and try to run old software on it then we'll at pick the
newest device tree we know about.
.. _depthcharge: https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/depthcharge/
.. _`FIT Image`: https://doc.coreboot.org/lib/payloads/fit.html

2
Documentation/arm/index.rst
View File

@ -31,6 +31,8 @@ SoC-specific documents
.. toctree::
:maxdepth: 1
google/chromebook-boot-flow
ixp4xx
marvell

330
Documentation/devicetree/bindings/arm/qcom.yaml
View File

@ -44,6 +44,7 @@ description: |
sc7280
sc8180x
sc8280xp
sda660
sdm630
sdm632
sdm660
@ -90,6 +91,11 @@ description: |
A dragonboard board v0.1 of subtype 1 with an apq8074 SoC version 2, made in
foundry 2.
There are many devices in the list below that run the standard ChromeOS
bootloader setup and use the open source depthcharge bootloader to boot the
OS. These devices do not use the scheme described above. For details, see:
https://docs.kernel.org/arm/google/chromebook-boot-flow.html
properties:
$nodename:
const: "/"
@ -190,6 +196,7 @@ properties:
- sony,kagura-row
- sony,keyaki-row
- xiaomi,gemini
- xiaomi,natrium
- xiaomi,scorpio
- const: qcom,msm8996
@ -214,19 +221,317 @@ properties:
- qcom,ipq8074-hk10-c2
- const: qcom,ipq8074
- items:
- description: Qualcomm Technologies, Inc. SC7180 IDP
items:
- enum:
- qcom,sc7180-idp
- const: qcom,sc7180
- items:
- enum:
- qcom,sc7280-crd
- qcom,sc7280-idp
- qcom,sc7280-idp2
- google,hoglin
- google,piglin
- google,senor
- description: HP Chromebook x2 11c (rev1 - 2)
items:
- const: google,coachz-rev1
- const: google,coachz-rev2
- const: qcom,sc7180
- description: HP Chromebook x2 11c (newest rev)
items:
- const: google,coachz
- const: qcom,sc7180
- description: HP Chromebook x2 11c with LTE (rev1 - 2)
items:
- const: google,coachz-rev1-sku0
- const: google,coachz-rev2-sku0
- const: qcom,sc7180
- description: HP Chromebook x2 11c with LTE (newest rev)
items:
- const: google,coachz-sku0
- const: qcom,sc7180
- description: Lenovo Chromebook Duet 5 13 (rev2)
items:
- const: google,homestar-rev2
- const: google,homestar-rev23
- const: qcom,sc7180
- description: Lenovo Chromebook Duet 5 13 (rev3)
items:
- const: google,homestar-rev3
- const: qcom,sc7180
- description: Lenovo Chromebook Duet 5 13 (newest rev)
items:
- const: google,homestar
- const: qcom,sc7180
- description: Google Kingoftown (rev0)
items:
- const: google,kingoftown-rev0
- const: qcom,sc7180
- description: Google Kingoftown (newest rev)
items:
- const: google,kingoftown
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 (rev0)
items:
- const: google,lazor-rev0
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 (rev1 - 2)
items:
- const: google,lazor-rev1
- const: google,lazor-rev2
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 (rev3 - 8)
items:
- const: google,lazor-rev3
- const: google,lazor-rev4
- const: google,lazor-rev5
- const: google,lazor-rev6
- const: google,lazor-rev7
- const: google,lazor-rev8
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 (newest rev)
items:
- const: google,lazor
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with KB Backlight (rev1 - 2)
items:
- const: google,lazor-rev1-sku2
- const: google,lazor-rev2-sku2
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with KB Backlight (rev3 - 8)
items:
- const: google,lazor-rev3-sku2
- const: google,lazor-rev4-sku2
- const: google,lazor-rev5-sku2
- const: google,lazor-rev6-sku2
- const: google,lazor-rev7-sku2
- const: google,lazor-rev8-sku2
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with KB Backlight (newest rev)
items:
- const: google,lazor-sku2
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with LTE (rev1 - 2)
items:
- const: google,lazor-rev1-sku0
- const: google,lazor-rev2-sku0
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with LTE (rev3 - 8)
items:
- const: google,lazor-rev3-sku0
- const: google,lazor-rev4-sku0
- const: google,lazor-rev5-sku0
- const: google,lazor-rev6-sku0
- const: google,lazor-rev7-sku0
- const: google,lazor-rev8-sku0
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with LTE (newest rev)
items:
- const: google,lazor-sku0
- const: qcom,sc7180
- description: Acer Chromebook 511 (rev4 - rev8)
items:
- const: google,lazor-rev4-sku4
- const: google,lazor-rev5-sku4
- const: google,lazor-rev6-sku4
- const: google,lazor-rev7-sku4
- const: google,lazor-rev8-sku4
- const: qcom,sc7180
- description: Acer Chromebook 511 (newest rev)
items:
- const: google,lazor-sku4
- const: qcom,sc7180
- description: Acer Chromebook 511 without Touchscreen (rev4)
items:
- const: google,lazor-rev4-sku5
- const: qcom,sc7180
- description: Acer Chromebook 511 without Touchscreen (rev5 - rev8)
items:
- const: google,lazor-rev5-sku5
- const: google,lazor-rev5-sku6
- const: google,lazor-rev6-sku6
- const: google,lazor-rev7-sku6
- const: google,lazor-rev8-sku6
- const: qcom,sc7180
- description: Acer Chromebook 511 without Touchscreen (newest rev)
items:
- const: google,lazor-sku6
- const: qcom,sc7180
- description: Google Mrbland with AUO panel (rev0)
items:
- const: google,mrbland-rev0-sku0
- const: qcom,sc7180
- description: Google Mrbland with AUO panel (newest rev)
items:
- const: google,mrbland-sku1536
- const: qcom,sc7180
- description: Google Mrbland with BOE panel (rev0)
items:
- const: google,mrbland-rev0-sku16
- const: qcom,sc7180
- description: Google Mrbland with BOE panel (newest rev)
items:
- const: google,mrbland-sku1024
- const: google,mrbland-sku768
- const: qcom,sc7180
- description: Google Pazquel with Parade (newest rev)
items:
- const: google,pazquel-sku5
- const: qcom,sc7180
- description: Google Pazquel with TI (newest rev)
items:
- const: google,pazquel-sku1
- const: qcom,sc7180
- description: Google Pazquel with LTE and Parade (newest rev)
items:
- const: google,pazquel-sku4
- const: qcom,sc7180
- description: Google Pazquel with LTE and TI (newest rev)
items:
- const: google,pazquel-sku0
- const: google,pazquel-sku2
- const: qcom,sc7180
- description: Sharp Dynabook Chromebook C1 (rev1)
items:
- const: google,pompom-rev1
- const: qcom,sc7180
- description: Sharp Dynabook Chromebook C1 (rev2)
items:
- const: google,pompom-rev2
- const: qcom,sc7180
- description: Sharp Dynabook Chromebook C1 (newest rev)
items:
- const: google,pompom
- const: qcom,sc7180
- description: Sharp Dynabook Chromebook C1 with LTE (rev1)
items:
- const: google,pompom-rev1-sku0
- const: qcom,sc7180
- description: Sharp Dynabook Chromebook C1 with LTE (rev2)
items:
- const: google,pompom-rev2-sku0
- const: qcom,sc7180
- description: Sharp Dynabook Chromebook C1 with LTE (newest rev)
items:
- const: google,pompom-sku0
- const: qcom,sc7180
- description: Google Quackingstick (newest rev)
items:
- const: google,quackingstick-sku1537
- const: qcom,sc7180
- description: Google Quackingstick with LTE (newest rev)
items:
- const: google,quackingstick-sku1536
- const: qcom,sc7180
- description: Google Trogdor (newest rev)
items:
- const: google,trogdor
- const: qcom,sc7180
- description: Google Trogdor with LTE (newest rev)
items:
- const: google,trogdor-sku0
- const: qcom,sc7180
- description: Lenovo IdeaPad Chromebook Duet 3 with BOE panel (rev0)
items:
- const: google,wormdingler-rev0-sku16
- const: qcom,sc7180
- description: Lenovo IdeaPad Chromebook Duet 3 with BOE panel (newest rev)
items:
- const: google,wormdingler-sku1024
- const: qcom,sc7180
- description: Lenovo IdeaPad Chromebook Duet 3 with BOE panel and rt5682s (newest rev)
items:
- const: google,wormdingler-sku1025
- const: qcom,sc7180
- description: Lenovo IdeaPad Chromebook Duet 3 with INX panel (rev0)
items:
- const: google,wormdingler-rev0-sku0
- const: qcom,sc7180
- description: Lenovo IdeaPad Chromebook Duet 3 with INX panel (newest rev)
items:
- const: google,wormdingler-sku0
- const: qcom,sc7180
- description: Lenovo IdeaPad Chromebook Duet 3 with INX panel and rt5682s (newest rev)
items:
- const: google,wormdingler-sku1
- const: qcom,sc7180
- description: Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)
items:
- const: qcom,sc7280-crd
- const: google,hoglin-rev3
- const: google,hoglin-rev4
- const: google,piglin-rev3
- const: google,piglin-rev4
- const: qcom,sc7280
- description: Qualcomm Technologies, Inc. sc7280 CRD platform (newest rev)
items:
- const: google,hoglin
- const: qcom,sc7280
- description: Qualcomm Technologies, Inc. sc7280 IDP SKU1 platform
items:
- const: qcom,sc7280-idp
- const: google,senor
- const: qcom,sc7280
- description: Qualcomm Technologies, Inc. sc7280 IDP SKU2 platform
items:
- const: qcom,sc7280-idp2
- const: google,piglin
- const: qcom,sc7280
- description: Google Herobrine (newest rev)
items:
- const: google,herobrine
- const: qcom,sc7280
- description: Google Villager (newest rev)
items:
- const: google,villager
- const: qcom,sc7280
- items:
@ -238,9 +543,16 @@ properties:
- items:
- enum:
- lenovo,thinkpad-x13s
- qcom,sc8280xp-crd
- qcom,sc8280xp-qrd
- const: qcom,sc8280xp
- items:
- enum:
- inforce,ifc6560
- const: qcom,sda660
- items:
- enum:
- fairphone,fp3

6
Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
View File

@ -4,18 +4,19 @@
$id: http://devicetree.org/schemas/clock/qcom,dispcc-sm8x50.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display Clock & Reset Controller Binding for SM8150/SM8250
title: Qualcomm Display Clock & Reset Controller Binding for SM8150/SM8250/SM8350
maintainers:
- Jonathan Marek <jonathan@marek.ca>
description: |
Qualcomm display clock control module which supports the clocks, resets and
power domains on SM8150 and SM8250.
power domains on SM8150/SM8250/SM8350.
See also:
dt-bindings/clock/qcom,dispcc-sm8150.h
dt-bindings/clock/qcom,dispcc-sm8250.h
dt-bindings/clock/qcom,dispcc-sm8350.h
properties:
compatible:
@ -23,6 +24,7 @@ properties:
- qcom,sc8180x-dispcc
- qcom,sm8150-dispcc
- qcom,sm8250-dispcc
- qcom,sm8350-dispcc
clocks:
items:

72
Documentation/devicetree/bindings/clock/qcom,gpucc-sm8350.yaml Normal file
View File

@ -0,0 +1,72 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,gpucc-sm8350.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Graphics Clock & Reset Controller Binding
maintainers:
- Robert Foss <robert.foss@linaro.org>
description: |
Qualcomm graphics clock control module which supports the clocks, resets and
power domains on Qualcomm SoCs.
See also:
dt-bindings/clock/qcom,gpucc-sm8350.h
properties:
compatible:
enum:
- qcom,sm8350-gpucc
clocks:
items:
- description: Board XO source
- description: GPLL0 main branch source
- description: GPLL0 div branch source
'#clock-cells':
const: 1
'#reset-cells':
const: 1
'#power-domain-cells':
const: 1
reg:
maxItems: 1
required:
- compatible
- reg
- clocks
- '#clock-cells'
- '#reset-cells'
- '#power-domain-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sm8350.h>
#include <dt-bindings/clock/qcom,rpmh.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
clock-controller@3d90000 {
compatible = "qcom,sm8350-gpucc";
reg = <0 0x03d90000 0 0x9000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_GPU_GPLL0_CLK_SRC>,
<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
};
...

80
Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml Normal file
View File

@ -0,0 +1,80 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Camera Clock & Reset Controller Binding for SM8450
maintainers:
- Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
description: |
Qualcomm camera clock control module which supports the clocks, resets and
power domains on SM8450.
See also include/dt-bindings/clock/qcom,sm8450-camcc.h
properties:
compatible:
const: qcom,sm8450-camcc
clocks:
items:
- description: Camera AHB clock from GCC
- description: Board XO source
- description: Board active XO source
- description: Sleep clock source
power-domains:
maxItems: 1
description:
A phandle and PM domain specifier for the MMCX power domain.
required-opps:
description:
A phandle to an OPP node describing required MMCX performance point.
'#clock-cells':
const: 1
'#reset-cells':
const: 1
'#power-domain-cells':
const: 1
reg:
maxItems: 1
required:
- compatible
- reg
- clocks
- power-domains
- required-opps
- '#clock-cells'
- '#reset-cells'
- '#power-domain-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sm8450.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/power/qcom-rpmpd.h>
clock-controller@ade0000 {
compatible = "qcom,sm8450-camcc";
reg = <0xade0000 0x20000>;
clocks = <&gcc GCC_CAMERA_AHB_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>,
<&sleep_clk>;
power-domains = <&rpmhpd SM8450_MMCX>;
required-opps = <&rpmhpd_opp_low_svs>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
...

1
MAINTAINERS
View File

@ -2540,6 +2540,7 @@ W: http://www.armlinux.org.uk/
ARM/QUALCOMM SUPPORT
M: Andy Gross <agross@kernel.org>
M: Bjorn Andersson <bjorn.andersson@linaro.org>
R: Konrad Dybcio <konrad.dybcio@somainline.org>
L: linux-arm-msm@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git

28
arch/arm64/boot/dts/qcom/Makefile
View File

@ -30,13 +30,11 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8994-sony-xperia-kitakami-satsuki.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8994-sony-xperia-kitakami-sumire.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8994-sony-xperia-kitakami-suzuran.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8996-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8996-pmi8996-sony-xperia-tone-dora.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8996-pmi8996-sony-xperia-tone-kagura.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8996-pmi8996-sony-xperia-tone-keyaki.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8996-sony-xperia-tone-dora.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8996-sony-xperia-tone-kagura.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8996-sony-xperia-tone-keyaki.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8996-xiaomi-gemini.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8996-xiaomi-natrium.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8996-xiaomi-scorpio.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8998-asus-novago-tp370ql.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8998-fxtec-pro1.dtb
@ -52,6 +50,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb
dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1-lte.dtb
@ -60,6 +59,8 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r3-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-homestar-r2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-homestar-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-homestar-r4.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-kingoftown-r0.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-kingoftown-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r0.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r1-kb.dtb
@ -75,12 +76,28 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-limozeen-r9.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-limozeen-nots-r4.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-limozeen-nots-r5.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-limozeen-nots-r9.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-mrbland-rev0-auo.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-mrbland-rev0-boe.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-mrbland-rev1-auo.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-mrbland-rev1-boe.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pazquel-lte-parade.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pazquel-lte-ti.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pazquel-parade.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pazquel-ti.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r2-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r3-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-quackingstick-r0.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-quackingstick-r0-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-wormdingler-rev0-boe.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-wormdingler-rev0-inx.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-wormdingler-rev1-boe.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-wormdingler-rev1-inx.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-wormdingler-rev1-inx-rt5682s.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-wormdingler-rev1-boe-rt5682s.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-crd.dtb
@ -89,6 +106,9 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-villager-r0.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-crd.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-lenovo-thinkpad-x13s.dtb
dtb-$(CONFIG_ARCH_QCOM) += sda660-inforce-ifc6560.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb
@ -100,6 +120,8 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyln.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-oneplus-enchilada.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-oneplus-fajita.dtb

36
arch/arm64/boot/dts/qcom/apq8016-sbc.dts
View File

@ -8,6 +8,7 @@
#include "msm8916-pm8916.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
#include <dt-bindings/sound/apq8016-lpass.h>
@ -20,11 +21,11 @@
serial0 = &blsp1_uart2;
serial1 = &blsp1_uart1;
usid0 = &pm8916_0;
i2c0 = &blsp_i2c2;
i2c1 = &blsp_i2c6;
i2c3 = &blsp_i2c4;
spi0 = &blsp_spi5;
spi1 = &blsp_spi3;
i2c0 = &blsp_i2c2;
i2c1 = &blsp_i2c6;
i2c3 = &blsp_i2c4;
spi0 = &blsp_spi5;
spi1 = &blsp_spi3;
};
chosen {
@ -92,14 +93,12 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&msm_key_volp_n_default>;
button@0 {
button {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
@ -116,6 +115,8 @@
led@1 {
label = "apq8016-sbc:green:user1";
function = LED_FUNCTION_HEARTBEAT;
color = <LED_COLOR_ID_GREEN>;
gpios = <&msmgpio 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
@ -123,6 +124,8 @@
led@2 {
label = "apq8016-sbc:green:user2";
function = LED_FUNCTION_DISK_ACTIVITY;
color = <LED_COLOR_ID_GREEN>;
gpios = <&msmgpio 120 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
@ -130,6 +133,8 @@
led@3 {
label = "apq8016-sbc:green:user3";
function = LED_FUNCTION_DISK_ACTIVITY;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pm8916_gpios 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
default-state = "off";
@ -137,6 +142,7 @@
led@4 {
label = "apq8016-sbc:green:user4";
color = <LED_COLOR_ID_GREEN>;
gpios = <&pm8916_gpios 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "none";
panic-indicator;
@ -145,6 +151,8 @@
led@5 {
label = "apq8016-sbc:yellow:wlan";
function = LED_FUNCTION_WLAN;
color = <LED_COLOR_ID_YELLOW>;
gpios = <&pm8916_mpps 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tx";
default-state = "off";
@ -152,6 +160,8 @@
led@6 {
label = "apq8016-sbc:blue:bt";
function = LED_FUNCTION_BLUETOOTH;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pm8916_mpps 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "bluetooth-power";
default-state = "off";
@ -773,7 +783,7 @@
"USB_HUB_RESET_N_PM",
"USB_SW_SEL_PM";
usb_hub_reset_pm: usb-hub-reset-pm {
usb_hub_reset_pm: usb-hub-reset-pm-state {
pins = "gpio3";
function = PMIC_GPIO_FUNC_NORMAL;
@ -781,14 +791,14 @@
output-high;
};
usb_hub_reset_pm_device: usb-hub-reset-pm-device {
usb_hub_reset_pm_device: usb-hub-reset-pm-device-state {
pins = "gpio3";
function = PMIC_GPIO_FUNC_NORMAL;
output-low;
};
usb_sw_sel_pm: usb-sw-sel-pm {
usb_sw_sel_pm: usb-sw-sel-pm-state {
pins = "gpio4";
function = PMIC_GPIO_FUNC_NORMAL;
@ -797,7 +807,7 @@
output-high;
};
usb_sw_sel_pm_device: usb-sw-sel-pm-device {
usb_sw_sel_pm_device: usb-sw-sel-pm-device-state {
pins = "gpio4";
function = PMIC_GPIO_FUNC_NORMAL;
@ -806,7 +816,7 @@
output-low;
};
pm8916_gpios_leds: pm8916-gpios-leds {
pm8916_gpios_leds: pm8916-gpios-leds-state {
pins = "gpio1", "gpio2";
function = PMIC_GPIO_FUNC_NORMAL;

91
arch/arm64/boot/dts/qcom/apq8096-db820c.dts
View File

@ -10,6 +10,7 @@
#include "pmi8994.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
@ -49,11 +50,11 @@
serial0 = &blsp2_uart2;
serial1 = &blsp2_uart3;
serial2 = &blsp1_uart2;
i2c0 = &blsp1_i2c3;
i2c1 = &blsp2_i2c1;
i2c2 = &blsp2_i2c1;
spi0 = &blsp1_spi1;
spi1 = &blsp2_spi6;
i2c0 = &blsp1_i2c3;
i2c1 = &blsp2_i2c1;
i2c2 = &blsp2_i2c1;
spi0 = &blsp1_spi1;
spi1 = &blsp2_spi6;
};
chosen {
@ -82,16 +83,14 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&volume_up_gpio>;
button@0 {
button {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&pm8994_gpios 2 GPIO_ACTIVE_LOW>;
@ -555,15 +554,16 @@
pinctrl-names = "default";
pinctrl-0 = <&ls_exp_gpio_f &bt_en_gpios>;
ls_exp_gpio_f: pm8994_gpio5 {
ls_exp_gpio_f: pm8994-gpio5-state {
pinconf {
pins = "gpio5";
function = PMIC_GPIO_FUNC_NORMAL;
output-low;
power-source = <2>; // PM8994_GPIO_S4, 1.8V
};
};
bt_en_gpios: bt_en_gpios {
bt_en_gpios: bt-en-pios-state {
pinconf {
pins = "gpio19";
function = PMIC_GPIO_FUNC_NORMAL;
@ -574,7 +574,7 @@
};
};
wlan_en_gpios: wlan_en_gpios {
wlan_en_gpios: wlan-en-gpios-state {
pinconf {
pins = "gpio8";
function = PMIC_GPIO_FUNC_NORMAL;
@ -585,7 +585,7 @@
};
};
audio_mclk: clk_div1 {
audio_mclk: clk-div1-state {
pinconf {
pins = "gpio15";
function = "func1";
@ -593,7 +593,7 @@
};
};
volume_up_gpio: pm8996_gpio2 {
volume_up_gpio: pm8996-gpio2-state {
pinconf {
pins = "gpio2";
function = "normal";
@ -605,7 +605,7 @@
};
};
divclk4_pin_a: divclk4 {
divclk4_pin_a: divclk4-state {
pinconf {
pins = "gpio18";
function = PMIC_GPIO_FUNC_FUNC2;
@ -615,7 +615,7 @@
};
};
usb3_vbus_det_gpio: pm8996_gpio22 {
usb3_vbus_det_gpio: pm8996-gpio22-state {
pinconf {
pins = "gpio22";
function = PMIC_GPIO_FUNC_NORMAL;
@ -671,7 +671,7 @@
"NC",
"NC";
usb2_vbus_det_gpio: pmi8996_gpio6 {
usb2_vbus_det_gpio: pmi8996-gpio6-state {
pinconf {
pins = "gpio6";
function = PMIC_GPIO_FUNC_NORMAL;
@ -683,6 +683,61 @@
};
};
&pmi8994_lpg {
qcom,power-source = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pmi8994_mpp2_userled4>;
qcom,dtest = <0 0>,
<0 0>,
<0 0>,
<4 1>;
status = "okay";
led@1 {
reg = <1>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_HEARTBEAT;
function-enumerator = <1>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_HEARTBEAT;
function-enumerator = <0>;
};
led@3 {
reg = <3>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_HEARTBEAT;
function-enumerator = <2>;
};
led@4 {
reg = <4>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_HEARTBEAT;
function-enumerator = <3>;
};
};
&pmi8994_mpps {
pmi8994_mpp2_userled4: mpp2-userled4-state {
pins = "mpp2";
function = "sink";
output-low;
qcom,dtest = <4>;
};
};
&pmi8994_spmi_regulators {
vdd_s2-supply = <&vph_pwr>;
@ -957,7 +1012,7 @@
&sound {
compatible = "qcom,apq8096-sndcard";
model = "DB820c";
audio-routing = "RX_BIAS", "MCLK",
audio-routing = "RX_BIAS", "MCLK",
"MM_DL1", "MultiMedia1 Playback",
"MM_DL2", "MultiMedia2 Playback",
"MultiMedia3 Capture", "MM_UL3";

6
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
View File

@ -29,13 +29,13 @@
status = "okay";
};
&i2c_1 {
&blsp1_i2c3 {
pinctrl-0 = <&i2c_1_pins>;
pinctrl-names = "default";
status = "okay";
};
&spi_0 {
&blsp1_spi1 {
cs-select = <0>;
status = "okay";
@ -43,7 +43,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
compatible = "micron,n25q128a11", "jedec,spi-nor";
spi-max-frequency = <50000000>;
};
};

41
arch/arm64/boot/dts/qcom/ipq6018.dtsi
View File

@ -87,7 +87,7 @@
};
};
cpu_opp_table: cpu_opp_table {
cpu_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;
@ -125,7 +125,7 @@
firmware {
scm {
compatible = "qcom,scm";
compatible = "qcom,scm-ipq6018", "qcom,scm";
};
};
@ -282,7 +282,7 @@
status = "disabled";
};
spi_0: spi@78b5000 {
blsp1_spi1: spi@78b5000 {
compatible = "qcom,spi-qup-v2.2.1";
#address-cells = <1>;
#size-cells = <0>;
@ -297,7 +297,7 @@
status = "disabled";
};
spi_1: spi@78b6000 {
blsp1_spi2: spi@78b6000 {
compatible = "qcom,spi-qup-v2.2.1";
#address-cells = <1>;
#size-cells = <0>;
@ -312,7 +312,7 @@
status = "disabled";
};
i2c_0: i2c@78b6000 {
blsp1_i2c2: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
#address-cells = <1>;
#size-cells = <0>;
@ -321,13 +321,13 @@
clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
clock-frequency = <400000>;
clock-frequency = <400000>;
dmas = <&blsp_dma 14>, <&blsp_dma 15>;
dma-names = "tx", "rx";
status = "disabled";
};
i2c_1: i2c@78b7000 { /* BLSP1 QUP2 */
blsp1_i2c3: i2c@78b7000 {
compatible = "qcom,i2c-qup-v2.2.1";
#address-cells = <1>;
#size-cells = <0>;
@ -336,7 +336,7 @@
clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
clock-frequency = <400000>;
clock-frequency = <400000>;
dmas = <&blsp_dma 16>, <&blsp_dma 17>;
dma-names = "tx", "rx";
status = "disabled";
@ -525,9 +525,9 @@
};
timer@b120000 {
#address-cells = <2>;
#size-cells = <2>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0x10000000>;
compatible = "arm,armv7-timer-mem";
reg = <0x0 0x0b120000 0x0 0x1000>;
@ -535,49 +535,49 @@
frame-number = <0>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0x0b121000 0x0 0x1000>,
<0x0 0x0b122000 0x0 0x1000>;
reg = <0x0b121000 0x1000>,
<0x0b122000 0x1000>;
};
frame@b123000 {
frame-number = <1>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xb123000 0x0 0x1000>;
reg = <0x0b123000 0x1000>;
status = "disabled";
};
frame@b124000 {
frame-number = <2>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0x0b124000 0x0 0x1000>;
reg = <0x0b124000 0x1000>;
status = "disabled";
};
frame@b125000 {
frame-number = <3>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0x0b125000 0x0 0x1000>;
reg = <0x0b125000 0x1000>;
status = "disabled";
};
frame@b126000 {
frame-number = <4>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0x0b126000 0x0 0x1000>;
reg = <0x0b126000 0x1000>;
status = "disabled";
};
frame@b127000 {
frame-number = <5>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0x0b127000 0x0 0x1000>;
reg = <0x0b127000 0x1000>;
status = "disabled";
};
frame@b128000 {
frame-number = <6>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0x0b128000 0x0 0x1000>;
reg = <0x0b128000 0x1000>;
status = "disabled";
};
};
@ -621,6 +621,7 @@
glink-edge {
interrupts = <GIC_SPI 321 IRQ_TYPE_EDGE_RISING>;
label = "rtr";
qcom,remote-pid = <1>;
mboxes = <&apcs_glb 8>;
@ -710,7 +711,7 @@
<0x0 0x00078800 0x0 0x1F8>, /* PCS */
<0x0 0x00078600 0x0 0x044>; /* PCS misc */
#phy-cells = <0>;
#clock-cells = <1>;
#clock-cells = <0>;
clocks = <&gcc GCC_USB0_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_usb0_pipe_clk_src";

42
arch/arm64/boot/dts/qcom/ipq8074.dtsi
View File

@ -119,7 +119,7 @@
<&xo>;
clock-names = "aux", "cfg_ahb", "ref";
resets = <&gcc GCC_USB1_PHY_BCR>,
resets = <&gcc GCC_USB1_PHY_BCR>,
<&gcc GCC_USB3PHY_1_PHY_BCR>;
reset-names = "phy","common";
status = "disabled";
@ -130,7 +130,7 @@
<0x00058800 0x1f8>, /* PCS */
<0x00058600 0x044>; /* PCS misc*/
#phy-cells = <0>;
#clock-cells = <1>;
#clock-cells = <0>;
clocks = <&gcc GCC_USB1_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_usb1_pipe_clk_src";
@ -162,7 +162,7 @@
<&xo>;
clock-names = "aux", "cfg_ahb", "ref";
resets = <&gcc GCC_USB0_PHY_BCR>,
resets = <&gcc GCC_USB0_PHY_BCR>,
<&gcc GCC_USB3PHY_0_PHY_BCR>;
reset-names = "phy","common";
status = "disabled";
@ -173,7 +173,7 @@
<0x00078800 0x1f8>, /* PCS */
<0x00078600 0x044>; /* PCS misc*/
#phy-cells = <0>;
#clock-cells = <1>;
#clock-cells = <0>;
clocks = <&gcc GCC_USB0_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_usb0_pipe_clk_src";
@ -347,6 +347,7 @@
compatible = "qcom,gcc-ipq8074";
reg = <0x01800000 0x80000>;
#clock-cells = <0x1>;
#power-domain-cells = <1>;
#reset-cells = <0x1>;
};
@ -375,7 +376,7 @@
cell-index = <0>;
};
sdhc_1: sdhci@7824900 {
sdhc_1: mmc@7824900 {
compatible = "qcom,sdhci-msm-v4";
reg = <0x7824900 0x500>, <0x7824000 0x800>;
reg-names = "hc_mem", "core_mem";
@ -384,10 +385,11 @@
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&xo>,
<&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_SDCC1_APPS_CLK>;
clock-names = "xo", "iface", "core";
clocks = <&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_SDCC1_APPS_CLK>,
<&xo>;
clock-names = "iface", "core", "xo";
resets = <&gcc GCC_SDCC1_BCR>;
max-frequency = <384000000>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
@ -534,7 +536,7 @@
status = "disabled";
};
qpic_nand: nand@79b0000 {
qpic_nand: nand-controller@79b0000 {
compatible = "qcom,ipq8074-nand";
reg = <0x079b0000 0x10000>;
#address-cells = <1>;
@ -575,6 +577,8 @@
<133330000>,
<19200000>;
power-domains = <&gcc USB0_GDSC>;
resets = <&gcc GCC_USB0_BCR>;
status = "disabled";
@ -615,6 +619,8 @@
<133330000>,
<19200000>;
power-domains = <&gcc USB1_GDSC>;
resets = <&gcc GCC_USB1_BCR>;
status = "disabled";
@ -648,14 +654,6 @@
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
watchdog: watchdog@b017000 {
compatible = "qcom,kpss-wdt";
reg = <0xb017000 0x1000>;
@ -847,4 +845,12 @@
status = "disabled";
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
};

2
arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts
View File

@ -27,7 +27,7 @@
label = "GPIO Buttons";
volume-up {
button-volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;

4
arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts
View File

@ -28,14 +28,14 @@
label = "GPIO Buttons";
volume-up {
button-volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
debounce-interval = <15>;
};
volume-down {
button-volume-down {
label = "Volume Down";
gpios = <&msmgpio 117 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;

2
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts
View File

@ -39,7 +39,7 @@
label = "GPIO Buttons";
volume-up {
button-volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;

2
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
View File

@ -39,7 +39,7 @@
label = "GPIO Buttons";
volume-up {
button-volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;

2
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts
View File

@ -28,7 +28,7 @@
label = "GPIO Buttons";
volume-up {
button-volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;

16
arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi
View File

@ -31,13 +31,13 @@
label = "GPIO Buttons";
volume-up {
button-volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
home {
button-home {
label = "Home";
gpios = <&msmgpio 109 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
@ -52,7 +52,7 @@
label = "GPIO Hall Effect Sensor";
hall-sensor {
event-hall-sensor {
label = "Hall Effect Sensor";
gpios = <&msmgpio 52 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_SW>;
@ -460,10 +460,18 @@
drive-strength = <2>;
bias-disable;
};
ts_int_default: ts-int-default {
pins = "gpio13";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};
&pm8916_gpios {
nfc_clk_req: nfc-clk-req {
nfc_clk_req: nfc-clk-req-state {
pins = "gpio2";
function = "func1";

8
arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dts
View File

@ -128,12 +128,4 @@
drive-strength = <2>;
bias-disable;
};
ts_int_default: ts-int-default {
pins = "gpio13";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};

8
arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dts
View File

@ -69,12 +69,4 @@
drive-strength = <2>;
bias-disable;
};
ts_int_default: ts-int-default {
pins = "gpio13";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};

4
arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dts
View File

@ -34,13 +34,13 @@
label = "GPIO Buttons";
volume-up {
button-volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
home-key {
button-home {
label = "Home Key";
gpios = <&msmgpio 109 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;

6
arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts
View File

@ -49,13 +49,13 @@
label = "GPIO Buttons";
volume-up {
button-volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
home {
button-home {
label = "Home";
gpios = <&msmgpio 109 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
@ -70,7 +70,7 @@
label = "GPIO Hall Effect Sensor";
hall-sensor {
event-hall-sensor {
label = "Hall Effect Sensor";
gpios = <&msmgpio 52 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_SW>;

2
arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts
View File

@ -29,7 +29,7 @@
label = "GPIO Buttons";
volume-up {
button-volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;

28
arch/arm64/boot/dts/qcom/msm8916.dtsi
View File

@ -216,7 +216,7 @@
};
};
cpu_opp_table: cpu-opp-table {
cpu_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;
@ -301,6 +301,8 @@
rpmcc: clock-controller {
compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";
#clock-cells = <1>;
clocks = <&xo_board>;
clock-names = "xo";
};
rpmpd: power-controller {
@ -436,7 +438,7 @@
};
qfprom: qfprom@5c000 {
compatible = "qcom,qfprom";
compatible = "qcom,msm8916-qfprom", "qcom,qfprom";
reg = <0x0005c000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
@ -1464,7 +1466,7 @@
#sound-dai-cells = <1>;
};
sdhc_1: sdhci@7824000 {
sdhc_1: mmc@7824000 {
compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
reg = <0x07824900 0x11c>, <0x07824000 0x800>;
reg-names = "hc_mem", "core_mem";
@ -1472,17 +1474,17 @@
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC1_APPS_CLK>,
<&gcc GCC_SDCC1_AHB_CLK>,
clocks = <&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_SDCC1_APPS_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
clock-names = "iface", "core", "xo";
mmc-ddr-1_8v;
bus-width = <8>;
non-removable;
status = "disabled";
};
sdhc_2: sdhci@7864000 {
sdhc_2: mmc@7864000 {
compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
reg = <0x07864900 0x11c>, <0x07864000 0x800>;
reg-names = "hc_mem", "core_mem";
@ -1490,10 +1492,10 @@
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC2_APPS_CLK>,
<&gcc GCC_SDCC2_AHB_CLK>,
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
clock-names = "iface", "core", "xo";
bus-width = <4>;
status = "disabled";
};
@ -1788,8 +1790,8 @@
<&rpmpd MSM8916_VDDMX>;
power-domain-names = "cx", "mx";
qcom,state = <&wcnss_smp2p_out 0>;
qcom,state-names = "stop";
qcom,smem-states = <&wcnss_smp2p_out 0>;
qcom,smem-state-names = "stop";
pinctrl-names = "default";
pinctrl-0 = <&wcnss_pin_a>;
@ -1858,6 +1860,8 @@
compatible = "qcom,msm8916-a53pll";
reg = <0x0b016000 0x40>;
#clock-cells = <0>;
clocks = <&xo_board>;
clock-names = "xo";
};
timer@b020000 {

6
arch/arm64/boot/dts/qcom/msm8953.dtsi
View File

@ -215,7 +215,7 @@
firmware {
scm: scm {
compatible = "qcom,scm-msm8953";
compatible = "qcom,scm-msm8953", "qcom,scm";
clocks = <&gcc GCC_CRYPTO_CLK>,
<&gcc GCC_CRYPTO_AXI_CLK>,
<&gcc GCC_CRYPTO_AHB_CLK>;
@ -795,7 +795,7 @@
};
};
sdhc_1: sdhci@7824900 {
sdhc_1: mmc@7824900 {
compatible = "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4";
reg = <0x7824900 0x500>, <0x7824000 0x800>;
@ -855,7 +855,7 @@
};
};
sdhc_2: sdhci@7864900 {
sdhc_2: mmc@7864900 {
compatible = "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4";
reg = <0x7864900 0x500>, <0x7864000 0x800>;

2
arch/arm64/boot/dts/qcom/msm8992-lg-bullhead.dtsi
View File

@ -74,7 +74,7 @@
vdd_l17_29-supply = <&vph_pwr>;
vdd_l20_21-supply = <&vph_pwr>;
vdd_l25-supply = <&pm8994_s5>;
vdd_lvs1_2 = <&pm8994_s4>;
vdd_lvs1_2-supply = <&pm8994_s4>;
/* S1, S2, S6 and S12 are managed by RPMPD */

8
arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts
View File

@ -51,13 +51,11 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
button {
label = "Volume Up";
gpios = <&pm8994_gpios 3 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
@ -171,7 +169,7 @@
vdd_l17_29-supply = <&vph_pwr>;
vdd_l20_21-supply = <&vph_pwr>;
vdd_l25-supply = <&pm8994_s5>;
vdd_lvs1_2 = <&pm8994_s4>;
vdd_lvs1_2-supply = <&pm8994_s4>;
/* S1, S2, S6 and S12 are managed by RPMPD */

29
arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
View File

@ -64,7 +64,7 @@
compatible = "gpio-keys";
autorepeat;
volupkey {
volup-key {
label = "Volume Up";
gpios = <&pm8994_gpios 3 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
@ -73,7 +73,7 @@
debounce-interval = <15>;
};
camsnapkey {
camsnap-key {
label = "Camera Snapshot";
gpios = <&pm8994_gpios 4 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
@ -82,7 +82,7 @@
debounce-interval = <15>;
};
camfocuskey {
camfocus-key {
label = "Camera Focus";
gpios = <&pm8994_gpios 5 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
@ -100,7 +100,7 @@
label = "GPIO Hall Effect Sensor";
hall-front-sensor {
event-hall-front-sensor {
label = "Hall Effect Front Sensor";
gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
linux,input-type = <EV_SW>;
@ -108,7 +108,7 @@
linux,can-disable;
};
hall-back-sensor {
event-hall-back-sensor {
label = "Hall Effect Back Sensor";
gpios = <&tlmm 75 GPIO_ACTIVE_HIGH>;
linux,input-type = <EV_SW>;
@ -470,7 +470,7 @@
};
&pm8994_gpios {
bt_en_gpios: bt_en_gpios {
bt_en_gpios: bt-en-gpios-state {
pinconf {
pins = "gpio19";
function = PMIC_GPIO_FUNC_NORMAL;
@ -481,7 +481,7 @@
};
};
divclk4_pin_a: divclk4 {
divclk4_pin_a: divclk4-state {
pinconf {
pins = "gpio18";
function = PMIC_GPIO_FUNC_FUNC2;
@ -519,21 +519,24 @@
* TODO: remove once a driver is available
* TODO: add VBUS GPIO 5
*/
hd3ss460_pol: pol_low {
hd3ss460_pol: pol-low-state {
pins = "gpio8";
drive-strength = <3>;
function = PMIC_GPIO_FUNC_NORMAL;
qcom,drive-strength = <3>;
bias-pull-down;
};
hd3ss460_amsel: amsel_high {
hd3ss460_amsel: amsel-high-state {
pins = "gpio9";
drive-strength = <1>;
function = PMIC_GPIO_FUNC_NORMAL;
qcom,drive-strength = <1>;
bias-pull-up;
};
hd3ss460_en: en_high {
hd3ss460_en: en-high-state {
pins = "gpio10";
drive-strength = <1>;
function = PMIC_GPIO_FUNC_NORMAL;
qcom,drive-strength = <1>;
bias-pull-up;
};
};

12
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi
View File

@ -27,13 +27,11 @@
/* Kitakami firmware doesn't support PSCI */
/delete-node/ psci;
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
button-0 {
label = "Volume Down";
gpios = <&pm8994_gpios 2 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
@ -42,7 +40,7 @@
debounce-interval = <15>;
};
button@1 {
button-1 {
label = "Volume Up";
gpios = <&pm8994_gpios 3 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
@ -51,7 +49,7 @@
debounce-interval = <15>;
};
button@2 {
button-2 {
label = "Camera Snapshot";
gpios = <&pm8994_gpios 4 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
@ -60,7 +58,7 @@
debounce-interval = <15>;
};
button@3 {
button-3 {
label = "Camera Focus";
gpios = <&pm8994_gpios 5 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;

25
arch/arm64/boot/dts/qcom/msm8994.dtsi
View File

@ -100,7 +100,7 @@
CPU6: cpu@102 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x101>;
reg = <0x0 0x102>;
enable-method = "psci";
next-level-cache = <&L2_1>;
};
@ -108,7 +108,7 @@
CPU7: cpu@103 {
device_type = "cpu";
compatible = "arm,cortex-a57";
reg = <0x0 0x101>;
reg = <0x0 0x103>;
enable-method = "psci";
next-level-cache = <&L2_1>;
};
@ -461,7 +461,7 @@
};
};
sdhc1: sdhci@f9824900 {
sdhc1: mmc@f9824900 {
compatible = "qcom,msm8994-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
reg-names = "hc_mem", "core_mem";
@ -470,10 +470,10 @@
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC1_APPS_CLK>,
<&gcc GCC_SDCC1_AHB_CLK>,
clocks = <&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_SDCC1_APPS_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
clock-names = "iface", "core", "xo";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
@ -484,7 +484,7 @@
status = "disabled";
};
sdhc2: sdhci@f98a4900 {
sdhc2: mmc@f98a4900 {
compatible = "qcom,msm8994-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
reg-names = "hc_mem", "core_mem";
@ -493,10 +493,10 @@
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC2_APPS_CLK>,
<&gcc GCC_SDCC2_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>,
<&xo_board>;
clock-names = "iface", "core", "xo";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
@ -1069,11 +1069,12 @@
<600000000>;
};
ocmem: ocmem@fdd00000 {
ocmem: sram@fdd00000 {
compatible = "qcom,msm8974-ocmem";
reg = <0xfdd00000 0x2000>,
<0xfec00000 0x200000>;
reg-names = "ctrl", "mem";
ranges = <0 0xfec00000 0x200000>;
clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,
<&mmcc OCMEMCX_OCMEMNOC_CLK>;
clock-names = "core", "iface";

11
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-dora.dts
View File

@ -1,11 +0,0 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org>
*/
#include "msm8996-sony-xperia-tone-dora.dts"
#include "pmi8996.dtsi"
/ {
model = "Sony Xperia X Performance (PMI8996)";
};

11
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-kagura.dts
View File

@ -1,11 +0,0 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org>
*/
#include "msm8996-sony-xperia-tone-kagura.dts"
#include "pmi8996.dtsi"
/ {
model = "Sony Xperia XZ (PMI8996)";
};

11
arch/arm64/boot/dts/qcom/msm8996-pmi8996-sony-xperia-tone-keyaki.dts
View File

@ -1,11 +0,0 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org>
*/
#include "msm8996-sony-xperia-tone-keyaki.dts"
#include "pmi8996.dtsi"
/ {
model = "Sony Xperia XZs (PMI8996)";
};

77
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone.dtsi
View File

@ -8,6 +8,7 @@
#include "msm8996.dtsi"
#include "pm8994.dtsi"
#include "pmi8994.dtsi"
#include "pmi8996.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
@ -20,7 +21,6 @@
/ {
qcom,msm-id = <246 0x30001>; /* MSM8996 V3.1 (Final) */
qcom,pmic-id = <0x20009 0x2000a 0 0>; /* PM8994 + PMI8994 */
qcom,board-id = <8 0>;
chosen {
@ -42,11 +42,6 @@
ecc-size = <16>;
};
cont_splash_mem: memory@83401000 {
reg = <0 0x83401000 0 0x23ff000>;
no-map;
};
adsp_mem: adsp@8ea00000 {
reg = <0x0 0x8ea00000 0x0 0x1a00000>;
no-map;
@ -247,14 +242,14 @@
* probably a reason for it, and just to be on the safe side, we follow suit.
*/
pm8994_gpios_defaults: pm8994-gpios-default-state {
pm8994-gpio1-nc {
pm8994-gpio1-nc-pins {
pins = "gpio1";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
bias-high-impedance;
};
vol-down-n {
vol-down-n-pins {
pins = "gpio2";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -264,7 +259,7 @@
power-source = <PM8994_GPIO_S4>;
};
vol-up-n {
vol-up-n-pins {
pins = "gpio3";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -273,7 +268,7 @@
power-source = <PM8994_GPIO_S4>;
};
camera-snapshot-n {
camera-snapshot-n-pins {
pins = "gpio4";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -283,7 +278,7 @@
power-source = <PM8994_GPIO_S4>;
};
camera-focus-n {
camera-focus-n-pins {
pins = "gpio5";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -293,7 +288,7 @@
power-source = <PM8994_GPIO_S4>;
};
pm8994-gpio6-nc {
pm8994-gpio6-nc-pins {
pins = "gpio6";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -301,7 +296,7 @@
power-source = <PM8994_GPIO_VPH>;
};
nfc-download {
nfc-download-pins {
pins = "gpio7";
function = PMIC_GPIO_FUNC_NORMAL;
output-low;
@ -311,7 +306,7 @@
power-source = <PM8994_GPIO_S4>;
};
pm8994-gpio8-nc {
pm8994-gpio8-nc-pins {
pins = "gpio8";
function = PMIC_GPIO_FUNC_NORMAL;
output-low;
@ -321,7 +316,7 @@
power-source = <PM8994_GPIO_VPH>;
};
pm8994-gpio9-nc {
pm8994-gpio9-nc-pins {
pins = "gpio9";
function = PMIC_GPIO_FUNC_NORMAL;
output-high;
@ -331,7 +326,7 @@
power-source = <PM8994_GPIO_VPH>;
};
nfc-clock {
nfc-clock-pins {
pins = "gpio10";
function = PMIC_GPIO_FUNC_NORMAL;
input-enable;
@ -341,7 +336,7 @@
power-source = <PM8994_GPIO_S4>;
};
pm8994-gpio11-nc {
pm8994-gpio11-nc-pins {
pins = "gpio11";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -349,7 +344,7 @@
power-source = <PM8994_GPIO_VPH>;
};
pm8994-gpio12-nc {
pm8994-gpio12-nc-pins {
pins = "gpio12";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -357,7 +352,7 @@
power-source = <PM8994_GPIO_VPH>;
};
ear-enable {
ear-enable-pins {
pins = "gpio13";
function = PMIC_GPIO_FUNC_NORMAL;
output-high;
@ -367,7 +362,7 @@
power-source = <PM8994_GPIO_S4>;
};
pm8994-gpio14-nc {
pm8994-gpio14-nc-pins {
pins = "gpio14";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -377,7 +372,7 @@
power-source = <PM8994_GPIO_VPH>;
};
pm-divclk1-gpio {
pm-divclk1-gpio-pins {
pins = "gpio15";
function = "func1";
output-high;
@ -387,13 +382,13 @@
power-source = <PM8994_GPIO_VPH>;
};
pmi-clk-gpio {
pmi-clk-gpio-pins {
pins = "gpio16";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
};
pm8994-gpio17-nc {
pm8994-gpio17-nc-pins {
pins = "gpio17";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -401,7 +396,7 @@
power-source = <PM8994_GPIO_VPH>;
};
rome-sleep {
rome-sleep-pins {
pins = "gpio18";
function = PMIC_GPIO_FUNC_FUNC2;
output-low;
@ -411,7 +406,7 @@
power-source = <PM8994_GPIO_S4>;
};
pm8994-gpio19-nc {
pm8994-gpio19-nc-pins {
pins = "gpio19";
function = PMIC_GPIO_FUNC_NORMAL;
output-low;
@ -421,7 +416,7 @@
power-source = <PM8994_GPIO_VPH>;
};
pm8994-gpio22-nc {
pm8994-gpio22-nc-pins {
pins = "gpio22";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -446,34 +441,34 @@
"RF_ID";
pm8994_mpps_defaults: pm8994-mpps-default-state {
lcd-id_adc-mpp {
lcd-id_adc-mpp-pins {
pins = "mpp2";
function = "analog";
input-enable;
qcom,amux-route = <PMIC_MPP_AMUX_ROUTE_CH6>;
};
pm-mpp4-nc {
pm-mpp4-nc-pins {
pins = "mpp4";
function = "digital";
bias-high-impedance;
power-source = <PM8994_GPIO_VPH>;
};
flash-therm-mpp {
flash-therm-mpp-pins {
pins = "mpp5";
function = "analog";
input-enable;
qcom,amux-route = <PMIC_MPP_AMUX_ROUTE_CH5>;
};
mpp6-nc {
mpp6-nc-pins {
pins = "mpp6";
function = "digital";
bias-high-impedance;
};
rf-id-mpp {
rf-id-mpp-pins {
pins = "mpp8";
function = "analog";
input-enable;
@ -504,7 +499,7 @@
"NC";
pmi8994_gpios_defaults: pmi8994-gpios-default-state {
vib-ldo-en-gpio {
vib-ldo-en-gpio-pins {
pins = "gpio1";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -513,7 +508,7 @@
power-source = <PM8994_GPIO_S4>;
};
pmi-gpio2-nc {
pmi-gpio2-nc-pins {
pins = "gpio2";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -523,7 +518,7 @@
power-source = <PM8994_GPIO_VPH>;
};
pmi-gpio3-nc {
pmi-gpio3-nc-pins {
pins = "gpio3";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -533,7 +528,7 @@
power-source = <PM8994_GPIO_VPH>;
};
pmi-gpio4-nc {
pmi-gpio4-nc-pins {
pins = "gpio4";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -542,7 +537,7 @@
power-source = <PM8994_GPIO_S4>;
};
pmi-gpio5-nc {
pmi-gpio5-nc-pins {
pins = "gpio5";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -551,7 +546,7 @@
power-source = <PM8994_GPIO_S4>;
};
pmi-gpio6-nc {
pmi-gpio6-nc-pins {
pins = "gpio6";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -560,7 +555,7 @@
power-source = <PM8994_GPIO_S4>;
};
pmi-gpio7-nc {
pmi-gpio7-nc-pins {
pins = "gpio7";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -569,7 +564,7 @@
power-source = <PM8994_GPIO_S4>;
};
pmi-gpio8-nc {
pmi-gpio8-nc-pins {
pins = "gpio8";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
@ -578,13 +573,13 @@
power-source = <PM8994_GPIO_S4>;
};
usb-switch-sel {
usb-switch-sel-pins {
pins = "gpio9";
function = PMIC_GPIO_FUNC_NORMAL;
drive-push-pull;
};
pmi-gpio10-nc {
pmi-gpio10-nc-pins {
pins = "gpio10";
function = PMIC_GPIO_FUNC_NORMAL;
output-low;

14
arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
View File

@ -38,10 +38,10 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
vol_up {
key-vol-up {
label = "Volume Up";
gpios = <&pm8994_gpios 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
@ -49,7 +49,7 @@
debounce-interval = <15>;
};
dome {
key-dome {
label = "Home";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOME>;
@ -608,7 +608,7 @@
};
&pm8994_gpios {
wlan_en_default: wlan-en-default {
wlan_en_default: wlan-en-state {
pins = "gpio8";
function = PMIC_GPIO_FUNC_NORMAL;
output-low;
@ -617,7 +617,7 @@
bias-disable;
};
rome_enable_default: rome-enable-default {
rome_enable_default: rome-enable-state {
pins = "gpio9";
function = PMIC_GPIO_FUNC_NORMAL;
output-high;
@ -625,7 +625,7 @@
power-source = <PM8994_GPIO_VPH>;
};
divclk1_default: divclk1_default {
divclk1_default: divclk1-state {
pins = "gpio15";
function = PMIC_GPIO_FUNC_FUNC1;
bias-disable;
@ -633,7 +633,7 @@
qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
};
divclk4_pin_a: divclk4 {
divclk4_pin_a: divclk4-state {
pins = "gpio18";
function = PMIC_GPIO_FUNC_FUNC2;
bias-disable;

4
arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts
View File

@ -156,7 +156,7 @@
&sound {
compatible = "qcom,apq8096-sndcard";
model = "gemini";
audio-routing = "RX_BIAS", "MCLK",
audio-routing = "RX_BIAS", "MCLK",
"MM_DL1", "MultiMedia1 Playback",
"MM_DL2", "MultiMedia2 Playback",
"MultiMedia3 Capture", "MM_UL3";
@ -257,7 +257,7 @@
"UIM_BATT_ALARM", /* GPIO_21 */
"NC"; /* GPIO_22 */
divclk2_pin_a: divclk2 {
divclk2_pin_a: divclk2-state {
pins = "gpio16";
function = PMIC_GPIO_FUNC_FUNC2;
bias-disable;

414
arch/arm64/boot/dts/qcom/msm8996-xiaomi-natrium.dts Normal file
View File

@ -0,0 +1,414 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2022, Alec Su <ae40515@yahoo.com.tw>
*/
/dts-v1/;
#include "msm8996-xiaomi-common.dtsi"
#include "pmi8996.dtsi"
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
/ {
model = "Xiaomi Mi 5s Plus";
compatible = "xiaomi,natrium", "qcom,msm8996";
chassis-type = "handset";
qcom,msm-id = <305 0x10000>;
qcom,board-id = <47 0>;
};
&adsp_pil {
firmware-name = "qcom/msm8996/natrium/adsp.mbn";
};
&blsp2_i2c6 {
touchscreen@20 {
compatible = "syna,rmi4-i2c";
reg = <0x20>;
interrupt-parent = <&tlmm>;
interrupts = <125 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&vdd_3v2_tp>;
syna,reset-delay-ms = <200>;
syna,startup-delay-ms = <5>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&touchscreen_default>;
pinctrl-1 = <&touchscreen_sleep>;
};
};
&dsi0 {
status = "okay";
vdda-supply = <&vreg_l2a_1p25>;
vcca-supply = <&vreg_l28a_0p925>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mdss_dsi_default &mdss_te_default>;
pinctrl-1 = <&mdss_dsi_sleep &mdss_te_sleep>;
panel: panel@0 {
compatible = "jdi,fhd-r63452";
reg = <0>;
reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
backlight = <&pmi8994_wled>;
port {
panel_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
};
};
&dsi0_out {
remote-endpoint = <&panel_in>;
};
&gpu {
zap-shader {
firmware-name = "qcom/msm8996/natrium/a530_zap.mbn";
};
};
&mss_pil {
firmware-name = "qcom/msm8996/natrium/mba.mbn",
"qcom/msm8996/natrium/modem.mbn";
};
&pmi8994_wled {
status = "okay";
qcom,enabled-strings = <0 1>;
qcom,switching-freq = <600>;
};
&q6asmdai {
dai@0 {
reg = <0>;
};
dai@1 {
reg = <1>;
};
dai@2 {
reg = <2>;
};
};
&slpi_pil {
firmware-name = "qcom/msm8996/natrium/slpi.mbn";
};
&sound {
compatible = "qcom,apq8096-sndcard";
model = "natrium";
audio-routing = "RX_BIAS", "MCLK";
mm1-dai-link {
link-name = "MultiMedia1";
cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
};
mm2-dai-link {
link-name = "MultiMedia2";
cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
};
};
mm3-dai-link {
link-name = "MultiMedia3";
cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
};
};
slim-dai-link {
link-name = "SLIM Playback";
cpu {
sound-dai = <&q6afedai SLIMBUS_6_RX>;
};
platform {
sound-dai = <&q6routing>;
};
codec {
sound-dai = <&wcd9335 6>;
};
};
slimcap-dai-link {
link-name = "SLIM Capture";
cpu {
sound-dai = <&q6afedai SLIMBUS_0_TX>;
};
platform {
sound-dai = <&q6routing>;
};
codec {
sound-dai = <&wcd9335 1>;
};
};
};
&venus {
firmware-name = "qcom/msm8996/natrium/venus.mbn";
};
&rpm_requests {
pm8994-regulators {
vreg_l3a_0p875: l3 {
regulator-name = "vreg_l3a_0p875";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1300000>;
};
vreg_l11a_1p1: l11 {
regulator-name = "vreg_l11a_1p1";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
vreg_l17a_2p8: l17 {
regulator-name = "vreg_l17a_2p8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
vreg_l18a_2p8: l18 {
regulator-name = "vreg_l18a_2p8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
vreg_l29a_2p8: l29 {
regulator-name = "vreg_l29a_2p8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
};
};
&pm8994_gpios {
gpio-line-names =
"NC", /* GPIO_1 */
"VOL_UP_N", /* GPIO_2 */
"SPKR_ID", /* GPIO_3 */
"PWM_HAPTICS", /* GPIO_4 */
"INFARED_DRV", /* GPIO_5 */
"NC", /* GPIO_6 */
"KEYPAD_LED_EN_A", /* GPIO_7 */
"WL_EN", /* GPIO_8 */
"3P3_ENABLE", /* GPIO_9 */
"NC", /* GPIO_10 */
"NC", /* GPIO_11 */
"NC", /* GPIO_12 */
"NC", /* GPIO_13 */
"NC", /* GPIO_14 */
"DIVCLK1_CDC", /* GPIO_15 */
"DIVCLK2_HAPTICS", /* GPIO_16 */
"NC", /* GPIO_17 */
"32KHz_CLK_IN", /* GPIO_18 */
"BT_EN", /* GPIO_19 */
"PMIC_SLB", /* GPIO_20 */
"UIM_BATT_ALARM", /* GPIO_21 */
"NC"; /* GPIO_22 */
};
&pm8994_mpps {
gpio-line-names =
"NC", /* MPP_1 */
"CCI_TIMER1", /* MPP_2 */
"PMIC_SLB", /* MPP_3 */
"EXT_FET_WLED_PWR_EN_N",/* MPP_4 */
"NC", /* MPP_5 */
"NC", /* MPP_6 */
"NC", /* MPP_7 */
"NC"; /* MPP_8 */
};
&pmi8994_gpios {
gpio-line-names =
"NC", /* GPIO_1 */
"SPKR_PA_EN", /* GPIO_2 */
"NC", /* GPIO_3 */
"NC", /* GPIO_4 */
"NC", /* GPIO_5 */
"NC", /* GPIO_6 */
"NC", /* GPIO_7 */
"NC", /* GPIO_8 */
"NC", /* GPIO_9 */
"NC"; /* GPIO_10 */
};
&tlmm {
gpio-line-names =
"ESE_SPI_MOSI", /* GPIO_0 */
"ESE_SPI_MISO", /* GPIO_1 */
"NC", /* GPIO_2 */
"ESE_SPI_CLK", /* GPIO_3 */
"MSM_UART_TX", /* GPIO_4 */
"MSM_UART_RX", /* GPIO_5 */
"NFC_I2C_SDA", /* GPIO_6 */
"NFC_I2C_SCL", /* GPIO_7 */
"LCD0_RESET_N", /* GPIO_8 */
"NFC_IRQ", /* GPIO_9 */
"LCD_TE", /* GPIO_10 */
"LCD_ID_DET1", /* GPIO_11 */
"NFC_DISABLE", /* GPIO_12 */
"CAM_MCLK0", /* GPIO_13 */
"CAM_MCLK1", /* GPIO_14 */
"CAM_MCLK2", /* GPIO_15 */
"ESE_PWR_REQ", /* GPIO_16 */
"CCI_I2C_SDA0", /* GPIO_17 */
"CCI_I2C_SCL0", /* GPIO_18 */
"CCI_I2C_SDA1", /* GPIO_19 */
"CCI_I2C_SCL1", /* GPIO_20 */
"NFC_DWL_REQ", /* GPIO_21 */
"CCI_TIMER1", /* GPIO_22 */
"WEBCAM1_RESET_N", /* GPIO_23 */
"ESE_IRQ", /* GPIO_24 */
"NC", /* GPIO_25 */
"WEBCAM1_STANDBY", /* GPIO_26 */
"NC", /* GPIO_27 */
"NC", /* GPIO_28 */
"NC", /* GPIO_29 */
"CAM_VDD_1P2_EN_2", /* GPIO_30 */
"CAM_RESET_0", /* GPIO_31 */
"CAM_RESET_1", /* GPIO_32 */
"NC", /* GPIO_33 */
"NC", /* GPIO_34 */
"PCI_E0_RST_N", /* GPIO_35 */
"PCI_E0_CLKREQ_N", /* GPIO_36 */
"PCI_E0_WAKE", /* GPIO_37 */
"CHARGER_INT", /* GPIO_38 */
"CHARGER_RESET", /* GPIO_39 */
"NC", /* GPIO_40 */
"QCA_UART_TXD", /* GPIO_41 */
"QCA_UART_RXD", /* GPIO_42 */
"QCA_UART_CTS", /* GPIO_43 */
"QCA_UART_RTS", /* GPIO_44 */
"MAWC_UART_TX", /* GPIO_45 */
"MAWC_UART_RX", /* GPIO_46 */
"NC", /* GPIO_47 */
"NC", /* GPIO_48 */
"NC", /* GPIO_49 */
"FP_SPI_RST", /* GPIO_50 */
"TYPEC_I2C_SDA", /* GPIO_51 */
"TYPEC_I2C_SCL", /* GPIO_52 */
"CODEC_INT2_N", /* GPIO_53 */
"CODEC_INT1_N", /* GPIO_54 */
"APPS_I2C7_SDA", /* GPIO_55 */
"APPS_I2C7_SCL", /* GPIO_56 */
"FORCE_USB_BOOT", /* GPIO_57 */
"NC", /* GPIO_58 */
"NC", /* GPIO_59 */
"NC", /* GPIO_60 */
"NC", /* GPIO_61 */
"ESE_RSTN", /* GPIO_62 */
"TYPEC_INT", /* GPIO_63 */
"CODEC_RESET_N", /* GPIO_64 */
"PCM_CLK", /* GPIO_65 */
"PCM_SYNC", /* GPIO_66 */
"PCM_DIN", /* GPIO_67 */
"PCM_DOUT", /* GPIO_68 */
"CDC_44K1_CLK", /* GPIO_69 */
"SLIMBUS_CLK", /* GPIO_70 */
"SLIMBUS_DATA0", /* GPIO_71 */
"SLIMBUS_DATA1", /* GPIO_72 */
"LDO_5V_IN_EN", /* GPIO_73 */
"TYPEC_EN_N", /* GPIO_74 */
"NC", /* GPIO_75 */
"NC", /* GPIO_76 */
"NC", /* GPIO_77 */
"NC", /* GPIO_78 */
"NC", /* GPIO_79 */
"SENSOR_RESET_N", /* GPIO_80 */
"FP_SPI_MOSI", /* GPIO_81 */
"FP_SPI_MISO", /* GPIO_82 */
"FP_SPI_CS_N", /* GPIO_83 */
"FP_SPI_CLK", /* GPIO_84 */
"NC", /* GPIO_85 */
"CAM_VDD_1P2_EN", /* GPIO_86 */
"MSM_TS_I2C_SDA", /* GPIO_87 */
"MSM_TS_I2C_SCL", /* GPIO_88 */
"TS_RESOUT_N", /* GPIO_89 */
"ESE_SPI_CS_N", /* GPIO_90 */
"NC", /* GPIO_91 */
"CAM2_AVDD_EN", /* GPIO_92 */
"CAM2_VCM_EN", /* GPIO_93 */
"NC", /* GPIO_94 */
"NC", /* GPIO_95 */
"NC", /* GPIO_96 */
"GRFC_0", /* GPIO_97 */
"GRFC_1", /* GPIO_98 */
"NC", /* GPIO_99 */
"GRFC_3", /* GPIO_100 */
"GRFC_4", /* GPIO_101 */
"GRFC_5", /* GPIO_102 */
"NC", /* GPIO_103 */
"GRFC_7", /* GPIO_104 */
"UIM2_DATA", /* GPIO_105 */
"UIM2_CLK", /* GPIO_106 */
"UIM2_RESET", /* GPIO_107 */
"UIM2_PRESENT", /* GPIO_108 */
"UIM1_DATA", /* GPIO_109 */
"UIM1_CLK", /* GPIO_110 */
"UIM1_RESET", /* GPIO_111 */
"UIM1_PRESENT", /* GPIO_112 */
"UIM_BATT_ALARM", /* GPIO_113 */
"GRFC_8", /* GPIO_114 */
"GRFC_9", /* GPIO_115 */
"TX_GTR_THRES", /* GPIO_116 */
"ACCEL_INT", /* GPIO_117 */
"GYRO_INT", /* GPIO_118 */
"COMPASS_INT", /* GPIO_119 */
"PROXIMITY_INT_N", /* GPIO_120 */
"FP_IRQ", /* GPIO_121 */
"P_SENSE", /* GPIO_122 */
"HALL_INTR2", /* GPIO_123 */
"HALL_INTR1", /* GPIO_124 */
"TS_INT_N", /* GPIO_125 */
"NC", /* GPIO_126 */
"GRFC_11", /* GPIO_127 */
"NC", /* GPIO_128 */
"EXT_GPS_LNA_EN", /* GPIO_129 */
"NC", /* GPIO_130 */
"LCD_ID_DET2", /* GPIO_131 */
"LCD_TE2", /* GPIO_132 */
"GRFC_14", /* GPIO_133 */
"GSM_TX2_PHASE_D", /* GPIO_134 */
"NC", /* GPIO_135 */
"GRFC_15", /* GPIO_136 */
"RFFE3_DATA", /* GPIO_137 */
"RFFE3_CLK", /* GPIO_138 */
"NC", /* GPIO_139 */
"NC", /* GPIO_140 */
"RFFE5_DATA", /* GPIO_141 */
"RFFE5_CLK", /* GPIO_142 */
"NC", /* GPIO_143 */
"COEX_UART_TX", /* GPIO_144 */
"COEX_UART_RX", /* GPIO_145 */
"RFFE2_DATA", /* GPIO_146 */
"RFFE2_CLK", /* GPIO_147 */
"RFFE1_DATA", /* GPIO_148 */
"RFFE1_CLK"; /* GPIO_149 */
touchscreen_default: touchscreen-default {
pins = "gpio89", "gpio125";
function = "gpio";
drive-strength = <10>;
bias-pull-up;
};
touchscreen_sleep: touchscreen-sleep {
pins = "gpio89", "gpio125";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};

2
arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts
View File

@ -137,7 +137,7 @@
&sound {
compatible = "qcom,apq8096-sndcard";
model = "scorpio";
audio-routing = "RX_BIAS", "MCLK";
audio-routing = "RX_BIAS", "MCLK";
mm1-dai-link {
link-name = "MultiMedia1";

297
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@ -6,6 +6,7 @@
#include <dt-bindings/clock/qcom,gcc-msm8996.h>
#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/interconnect/qcom,msm8996.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,apr.h>
#include <dt-bindings/thermal/thermal.h>
@ -357,7 +358,7 @@
firmware {
scm {
compatible = "qcom,scm-msm8996";
compatible = "qcom,scm-msm8996", "qcom,scm";
qcom,dload-mode = <&tcsr 0x13000>;
};
};
@ -463,6 +464,8 @@
rpmcc: qcom,rpmcc {
compatible = "qcom,rpmcc-msm8996", "qcom,rpmcc";
#clock-cells = <1>;
clocks = <&xo_board>;
clock-names = "xo";
};
rpmpd: power-controller {
@ -585,12 +588,12 @@
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
pcie_phy: phy@34000 {
pcie_phy: phy-wrapper@34000 {
compatible = "qcom,msm8996-qmp-pcie-phy";
reg = <0x00034000 0x488>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
ranges = <0x0 0x00034000 0x4000>;
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
<&gcc GCC_PCIE_PHY_CFG_AHB_CLK>,
@ -601,46 +604,55 @@
<&gcc GCC_PCIE_PHY_COM_BCR>,
<&gcc GCC_PCIE_PHY_COM_NOCSR_BCR>;
reset-names = "phy", "common", "cfg";
status = "disabled";
pciephy_0: phy@35000 {
reg = <0x00035000 0x130>,
<0x00035200 0x200>,
<0x00035400 0x1dc>;
#phy-cells = <0>;
pciephy_0: phy@1000 {
reg = <0x1000 0x130>,
<0x1200 0x200>,
<0x1400 0x1dc>;
#clock-cells = <1>;
clock-output-names = "pcie_0_pipe_clk_src";
clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
clock-names = "pipe0";
resets = <&gcc GCC_PCIE_0_PHY_BCR>;
reset-names = "lane0";
#clock-cells = <0>;
clock-output-names = "pcie_0_pipe_clk_src";
#phy-cells = <0>;
};
pciephy_1: phy@36000 {
reg = <0x00036000 0x130>,
<0x00036200 0x200>,
<0x00036400 0x1dc>;
#phy-cells = <0>;
pciephy_1: phy@2000 {
reg = <0x2000 0x130>,
<0x2200 0x200>,
<0x2400 0x1dc>;
clock-output-names = "pcie_1_pipe_clk_src";
clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
clock-names = "pipe1";
resets = <&gcc GCC_PCIE_1_PHY_BCR>;
reset-names = "lane1";
#clock-cells = <0>;
clock-output-names = "pcie_1_pipe_clk_src";
#phy-cells = <0>;
};
pciephy_2: phy@37000 {
reg = <0x00037000 0x130>,
<0x00037200 0x200>,
<0x00037400 0x1dc>;
#phy-cells = <0>;
pciephy_2: phy@3000 {
reg = <0x3000 0x130>,
<0x3200 0x200>,
<0x3400 0x1dc>;
clock-output-names = "pcie_2_pipe_clk_src";
clocks = <&gcc GCC_PCIE_2_PIPE_CLK>;
clock-names = "pipe2";
resets = <&gcc GCC_PCIE_2_PHY_BCR>;
reset-names = "lane2";
#clock-cells = <0>;
clock-output-names = "pcie_2_pipe_clk_src";
#phy-cells = <0>;
};
};
@ -650,7 +662,7 @@
};
qfprom@74000 {
compatible = "qcom,qfprom";
compatible = "qcom,msm8996-qfprom", "qcom,qfprom";
reg = <0x00074000 0x8ff>;
#address-cells = <1>;
#size-cells = <1>;
@ -687,8 +699,31 @@
clocks = <&rpmcc RPM_SMD_BB_CLK1>,
<&rpmcc RPM_SMD_LN_BB_CLK>,
<&sleep_clk>;
clock-names = "cxo", "cxo2", "sleep_clk";
<&sleep_clk>,
<&pciephy_0>,
<&pciephy_1>,
<&pciephy_2>,
<&ssusb_phy_0>,
<0>, <0>, <0>;
clock-names = "cxo",
"cxo2",
"sleep_clk",
"pcie_0_pipe_clk_src",
"pcie_1_pipe_clk_src",
"pcie_2_pipe_clk_src",
"usb3_phy_pipe_clk_src",
"ufs_rx_symbol_0_clk_src",
"ufs_rx_symbol_1_clk_src",
"ufs_tx_symbol_0_clk_src";
};
bimc: interconnect@408000 {
compatible = "qcom,msm8996-bimc";
reg = <0x00408000 0x5a000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
<&rpmcc RPM_SMD_BIMC_A_CLK>;
};
tsens0: thermal-sensor@4a9000 {
@ -735,6 +770,74 @@
dma-names = "rx", "tx";
};
cnoc: interconnect@500000 {
compatible = "qcom,msm8996-cnoc";
reg = <0x00500000 0x1000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
<&rpmcc RPM_SMD_CNOC_A_CLK>;
};
snoc: interconnect@524000 {
compatible = "qcom,msm8996-snoc";
reg = <0x00524000 0x1c000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
<&rpmcc RPM_SMD_SNOC_A_CLK>;
};
a0noc: interconnect@543000 {
compatible = "qcom,msm8996-a0noc";
reg = <0x00543000 0x6000>;
#interconnect-cells = <1>;
clock-names = "aggre0_snoc_axi",
"aggre0_cnoc_ahb",
"aggre0_noc_mpu_cfg";
clocks = <&gcc GCC_AGGRE0_SNOC_AXI_CLK>,
<&gcc GCC_AGGRE0_CNOC_AHB_CLK>,
<&gcc GCC_AGGRE0_NOC_MPU_CFG_AHB_CLK>;
power-domains = <&gcc AGGRE0_NOC_GDSC>;
};
a1noc: interconnect@562000 {
compatible = "qcom,msm8996-a1noc";
reg = <0x00562000 0x5000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_AGGR1_NOC_CLK>,
<&rpmcc RPM_SMD_AGGR1_NOC_A_CLK>;
};
a2noc: interconnect@583000 {
compatible = "qcom,msm8996-a2noc";
reg = <0x00583000 0x7000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>;
};
mnoc: interconnect@5a4000 {
compatible = "qcom,msm8996-mnoc";
reg = <0x005a4000 0x1c000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a", "iface";
clocks = <&rpmcc RPM_SMD_MMAXI_CLK>,
<&rpmcc RPM_SMD_MMAXI_A_CLK>,
<&mmcc AHB_CLK_SRC>;
};
pnoc: interconnect@5c0000 {
compatible = "qcom,msm8996-pnoc";
reg = <0x005c0000 0x3000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_PCNOC_CLK>,
<&rpmcc RPM_SMD_PCNOC_A_CLK>;
};
tcsr_mutex_regs: syscon@740000 {
compatible = "syscon";
reg = <0x00740000 0x40000>;
@ -751,6 +854,22 @@
#reset-cells = <1>;
#power-domain-cells = <1>;
reg = <0x008c0000 0x40000>;
clocks = <&xo_board>,
<&gcc GCC_MMSS_NOC_CFG_AHB_CLK>,
<&gcc GPLL0>,
<&dsi0_phy 1>,
<&dsi0_phy 0>,
<0>,
<0>,
<0>;
clock-names = "xo",
"gcc_mmss_noc_cfg_ahb_clk",
"gpll0",
"dsi0pll",
"dsi0pllbyte",
"dsi1pll",
"dsi1pllbyte",
"hdmipll";
assigned-clocks = <&mmcc MMPLL9_PLL>,
<&mmcc MMPLL1_PLL>,
<&mmcc MMPLL3_PLL>,
@ -779,8 +898,9 @@
interrupt-controller;
#interrupt-cells = <1>;
clocks = <&mmcc MDSS_AHB_CLK>;
clock-names = "iface";
clocks = <&mmcc MDSS_AHB_CLK>,
<&mmcc MDSS_MDP_CLK>;
clock-names = "iface", "core";
#address-cells = <1>;
#size-cells = <1>;
@ -814,6 +934,11 @@
assigned-clock-rates = <300000000>,
<19200000>;
interconnects = <&mnoc MASTER_MDP_PORT0 &bimc SLAVE_EBI_CH0>,
<&mnoc MASTER_MDP_PORT1 &bimc SLAVE_EBI_CH0>,
<&mnoc MASTER_ROTATOR &bimc SLAVE_EBI_CH0>;
interconnect-names = "mdp0-mem", "mdp1-mem", "rotator-mem";
ports {
#address-cells = <1>;
#size-cells = <0>;
@ -831,6 +956,13 @@
remote-endpoint = <&dsi0_in>;
};
};
port@2 {
reg = <2>;
mdp5_intf2_out: endpoint {
remote-endpoint = <&dsi1_in>;
};
};
};
};
@ -856,6 +988,8 @@
"core_mmss",
"pixel",
"core";
assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
phys = <&dsi0_phy>;
phy-names = "dsi";
@ -900,6 +1034,74 @@
status = "disabled";
};
dsi1: dsi@996000 {
compatible = "qcom,mdss-dsi-ctrl";
reg = <0x00996000 0x400>;
reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>;
interrupts = <4>;
clocks = <&mmcc MDSS_MDP_CLK>,
<&mmcc MDSS_BYTE1_CLK>,
<&mmcc MDSS_AHB_CLK>,
<&mmcc MDSS_AXI_CLK>,
<&mmcc MMSS_MISC_AHB_CLK>,
<&mmcc MDSS_PCLK1_CLK>,
<&mmcc MDSS_ESC1_CLK>;
clock-names = "mdp_core",
"byte",
"iface",
"bus",
"core_mmss",
"pixel",
"core";
assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;
assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
phys = <&dsi1_phy>;
phy-names = "dsi";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi1_in: endpoint {
remote-endpoint = <&mdp5_intf2_out>;
};
};
port@1 {
reg = <1>;
dsi1_out: endpoint {
};
};
};
};
dsi1_phy: dsi-phy@996400 {
compatible = "qcom,dsi-phy-14nm";
reg = <0x00996400 0x100>,
<0x00996500 0x300>,
<0x00996800 0x188>;
reg-names = "dsi_phy",
"dsi_phy_lane",
"dsi_pll";
#clock-cells = <1>;
#phy-cells = <0>;
clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_BB_CLK1>;
clock-names = "iface", "ref";
status = "disabled";
};
hdmi: hdmi-tx@9a0000 {
compatible = "qcom,hdmi-tx-8996";
reg = <0x009a0000 0x50c>,
@ -925,7 +1127,6 @@
"extp";
phys = <&hdmi_phy>;
phy-names = "hdmi_phy";
#sound-dai-cells = <1>;
status = "disabled";
@ -988,6 +1189,9 @@
"mem",
"mem_iface";
interconnects = <&bimc MASTER_GRAPHICS_3D &bimc SLAVE_EBI_CH0>;
interconnect-names = "gfx-mem";
power-domains = <&mmcc GPU_GX_GDSC>;
iommus = <&adreno_smmu 0>;
@ -1001,7 +1205,7 @@
#cooling-cells = <2>;
gpu_opp_table: opp-table {
compatible ="operating-points-v2";
compatible = "operating-points-v2";
/*
* 624Mhz and 560Mhz are only available on speed
@ -1623,7 +1827,7 @@
<&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_0_SLV_AXI_CLK>;
clock-names = "pipe",
clock-names = "pipe",
"aux",
"cfg",
"bus_master",
@ -1637,7 +1841,7 @@
bus-range = <0x00 0xff>;
num-lanes = <1>;
status = "disabled";
status = "disabled";
reg = <0x00608000 0x2000>,
<0x0d000000 0xf1d>,
@ -1677,7 +1881,7 @@
<&gcc GCC_PCIE_1_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_1_SLV_AXI_CLK>;
clock-names = "pipe",
clock-names = "pipe",
"aux",
"cfg",
"bus_master",
@ -1727,7 +1931,7 @@
<&gcc GCC_PCIE_2_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_2_SLV_AXI_CLK>;
clock-names = "pipe",
clock-names = "pipe",
"aux",
"cfg",
"bus_master",
@ -2013,6 +2217,9 @@
<&mmcc VIDEO_AXI_CLK>,
<&mmcc VIDEO_MAXI_CLK>;
clock-names = "core", "iface", "bus", "mbus";
interconnects = <&mnoc MASTER_VIDEO_P0 &bimc SLAVE_EBI_CH0>,
<&bimc MASTER_AMPSS_M0 &mnoc SLAVE_VENUS_CFG>;
interconnect-names = "video-mem", "cpu-cfg";
iommus = <&venus_smmu 0x00>,
<&venus_smmu 0x01>,
<&venus_smmu 0x0a>,
@ -2732,6 +2939,10 @@
<&gcc GCC_USB30_MASTER_CLK>;
assigned-clock-rates = <19200000>, <120000000>;
interconnects = <&a2noc MASTER_USB3 &bimc SLAVE_EBI_CH0>,
<&bimc MASTER_AMPSS_M0 &snoc SLAVE_USB3>;
interconnect-names = "usb-ddr", "apps-usb";
power-domains = <&gcc USB30_GDSC>;
status = "disabled";
@ -2769,7 +2980,7 @@
<0x07410600 0x1a8>;
#phy-cells = <0>;
#clock-cells = <1>;
#clock-cells = <0>;
clock-output-names = "usb3_phy_pipe_clk_src";
clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
clock-names = "pipe0";
@ -2804,7 +3015,7 @@
status = "disabled";
};
sdhc1: sdhci@7464900 {
sdhc1: mmc@7464900 {
compatible = "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4";
reg = <0x07464900 0x11c>, <0x07464000 0x800>;
reg-names = "hc_mem", "core_mem";
@ -2817,6 +3028,7 @@
clocks = <&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_SDCC1_APPS_CLK>,
<&rpmcc RPM_SMD_BB_CLK1>;
resets = <&gcc GCC_SDCC1_BCR>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_state_on>;
@ -2827,7 +3039,7 @@
status = "disabled";
};
sdhc2: sdhci@74a4900 {
sdhc2: mmc@74a4900 {
compatible = "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4";
reg = <0x074a4900 0x314>, <0x074a4000 0x800>;
reg-names = "hc_mem", "core_mem";
@ -2840,6 +3052,7 @@
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>,
<&rpmcc RPM_SMD_BB_CLK1>;
resets = <&gcc GCC_SDCC2_BCR>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_state_on>;
@ -3084,7 +3297,7 @@
compatible = "qcom,bam-v1.7.0";
qcom,controlled-remotely;
reg = <0x09184000 0x32000>;
num-channels = <31>;
num-channels = <31>;
interrupts = <0 164 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
qcom,ee = <1>;
@ -3096,7 +3309,7 @@
reg = <0x091c0000 0x2C000>;
reg-names = "ctrl";
interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&slimbam 3>, <&slimbam 4>,
dmas = <&slimbam 3>, <&slimbam 4>,
<&slimbam 5>, <&slimbam 6>;
dma-names = "rx", "tx", "tx2", "rx2";
#address-cells = <1>;
@ -3108,7 +3321,7 @@
tasha_ifd: tas-ifd {
compatible = "slim217,1a0";
reg = <0 0>;
reg = <0 0>;
};
wcd9335: codec@1{
@ -3116,17 +3329,17 @@
pinctrl-names = "default";
compatible = "slim217,1a0";
reg = <1 0>;
reg = <1 0>;
interrupt-parent = <&tlmm>;
interrupts = <54 IRQ_TYPE_LEVEL_HIGH>,
<53 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "intr1", "intr2";
interrupt-names = "intr1", "intr2";
interrupt-controller;
#interrupt-cells = <1>;
reset-gpios = <&tlmm 64 0>;
slim-ifc-dev = <&tasha_ifd>;
slim-ifc-dev = <&tasha_ifd>;
#sound-dai-cells = <1>;
};

23
arch/arm64/boot/dts/qcom/msm8998-asus-novago-tp370ql.dts
View File

@ -16,20 +16,22 @@
touchpad@15 {
compatible = "hid-over-i2c";
interrupt-parent = <&tlmm>;
interrupts = <0x7b IRQ_TYPE_LEVEL_LOW>;
reg = <0x15>;
hid-descr-addr = <0x0001>;
pinctrl-names = "default";
pinctrl-0 = <&touchpad>;
interrupt-parent = <&tlmm>;
interrupts = <123 IRQ_TYPE_LEVEL_LOW>;
hid-descr-addr = <0x0001>;
};
keyboard@3a {
compatible = "hid-over-i2c";
interrupt-parent = <&tlmm>;
interrupts = <0x25 IRQ_TYPE_LEVEL_LOW>;
reg = <0x3a>;
interrupt-parent = <&tlmm>;
interrupts = <37 IRQ_TYPE_LEVEL_LOW>;
hid-descr-addr = <0x0001>;
};
};
@ -37,12 +39,3 @@
&sdhc2 {
cd-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
};
&tlmm {
touchpad: touchpad {
config {
pins = "gpio123";
bias-pull-up;
};
};
};

138
arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi
View File

@ -8,13 +8,10 @@
*/
#include "msm8998.dtsi"
#include "pm8998.dtsi"
#include "pm8005.dtsi"
#include "pm8998.dtsi"
/ {
chosen {
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
@ -37,6 +34,28 @@
};
};
&blsp1_uart3_on {
rx {
/delete-property/ bias-disable;
/*
* Configure a pull-up on 45 (RX). This is needed to
* avoid garbage data when the TX pin of the Bluetooth
* module is in tri-state (module powered off or not
* driving the signal yet).
*/
bias-pull-up;
};
cts {
/delete-property/ bias-disable;
/*
* Configure a pull-down on 47 (CTS) to match the pull
* of the Bluetooth module.
*/
bias-pull-down;
};
};
/*
* The laptop FW does not appear to support the retention state as it is
* not advertised as enabled in ACPI, and enabling it in DT can cause boot
@ -74,6 +93,20 @@
cpu-idle-states = <&BIG_CPU_SLEEP_1>;
};
/*
* If EFIFB is used, enabling MMCC will cause important MMSS clocks to be cleaned
* up, because as far as Linux is concerned - they are unused. Disable it by default
* on clamshell devices, as it will break them, unless either simplefb is configured to
* hold a vote for these clocks, or panels are brought up properly, using drm/msm.
*/
&mmcc {
status = "disabled";
};
&mmss_smmu {
status = "disabled";
};
&pcie0 {
status = "okay";
};
@ -82,20 +115,16 @@
status = "okay";
};
&pm8005_lsid1 {
pm8005-regulators {
compatible = "qcom,pm8005-regulators";
&pm8005_regulators {
vdd_s1-supply = <&vph_pwr>;
vdd_s1-supply = <&vph_pwr>;
pm8005_s1: s1 { /* VDD_GFX supply */
regulator-min-microvolt = <524000>;
regulator-max-microvolt = <1100000>;
regulator-enable-ramp-delay = <500>;
pm8005_s1: s1 { /* VDD_GFX supply */
regulator-min-microvolt = <524000>;
regulator-max-microvolt = <1100000>;
regulator-enable-ramp-delay = <500>;
/* hack until we rig up the gpu consumer */
regulator-always-on;
};
/* hack until we rig up the gpu consumer */
regulator-always-on;
};
};
@ -143,127 +172,156 @@
regulator-min-microvolt = <1352000>;
regulator-max-microvolt = <1352000>;
};
vreg_s4a_1p8: s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-allow-set-load;
};
vreg_s5a_2p04: s5 {
regulator-min-microvolt = <1904000>;
regulator-max-microvolt = <2040000>;
};
vreg_s7a_1p025: s7 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1028000>;
};
vreg_l1a_0p875: l1 {
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
regulator-allow-set-load;
};
vreg_l2a_1p2: l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-allow-set-load;
};
vreg_l3a_1p0: l3 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
vreg_l5a_0p8: l5 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
};
vreg_l6a_1p8: l6 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <1808000>;
};
vreg_l7a_1p8: l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-allow-set-load;
};
vreg_l8a_1p2: l8 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vreg_l9a_1p8: l9 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l10a_1p8: l10 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l11a_1p0: l11 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
vreg_l12a_1p8: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l13a_2p95: l13 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l14a_1p88: l14 {
regulator-min-microvolt = <1880000>;
regulator-max-microvolt = <1880000>;
};
vreg_l15a_1p8: l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l16a_2p7: l16 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
};
vreg_l17a_1p3: l17 {
regulator-min-microvolt = <1304000>;
regulator-max-microvolt = <1304000>;
regulator-allow-set-load;
};
vreg_l18a_2p7: l18 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
};
vreg_l19a_3p0: l19 {
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>;
};
vreg_l20a_2p95: l20 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-allow-set-load;
};
vreg_l21a_2p95: l21 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-allow-set-load;
regulator-system-load = <800000>;
};
vreg_l22a_2p85: l22 {
regulator-min-microvolt = <2864000>;
regulator-max-microvolt = <2864000>;
};
vreg_l23a_3p3: l23 {
regulator-min-microvolt = <3312000>;
regulator-max-microvolt = <3312000>;
};
vreg_l24a_3p075: l24 {
regulator-min-microvolt = <3088000>;
regulator-max-microvolt = <3088000>;
};
vreg_l25a_3p3: l25 {
regulator-min-microvolt = <3104000>;
regulator-max-microvolt = <3312000>;
regulator-allow-set-load;
};
vreg_l26a_1p2: l26 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vreg_l28_3p0: l28 {
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>;
@ -278,7 +336,6 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
};
@ -286,17 +343,6 @@
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <0 4>, <81 4>;
touchpad: touchpad {
config {
pins = "gpio123";
bias-pull-up; /* pull up */
};
};
};
&sdhc2 {
status = "okay";
@ -304,8 +350,17 @@
vqmmc-supply = <&vreg_l13a_2p95>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
pinctrl-0 = <&sdc2_on &sdc2_cd>;
pinctrl-1 = <&sdc2_off &sdc2_cd>;
};
&tlmm {
gpio-reserved-ranges = <0 4>, <81 4>;
touchpad: touchpad-pin {
pins = "gpio123";
bias-pull-up;
};
};
&ufshc {
@ -341,26 +396,3 @@
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
};
/* PINCTRL - board-specific pinctrl */
&blsp1_uart3_on {
rx {
/delete-property/ bias-disable;
/*
* Configure a pull-up on 45 (RX). This is needed to
* avoid garbage data when the TX pin of the Bluetooth
* module is in tri-state (module powered off or not
* driving the signal yet).
*/
bias-pull-up;
};
cts {
/delete-property/ bias-disable;
/*
* Configure a pull-down on 47 (CTS) to match the pull
* of the Bluetooth module.
*/
bias-pull-down;
};
};

460
arch/arm64/boot/dts/qcom/msm8998-fxtec-pro1.dts
View File

@ -6,11 +6,13 @@
/dts-v1/;
#include "msm8998-mtp.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include "msm8998.dtsi"
#include "pm8005.dtsi"
#include "pm8998.dtsi"
#include "pmi8998.dtsi"
/ {
model = "F(x)tec Pro1 (QX1000)";
@ -18,6 +20,11 @@
chassis-type = "handset";
qcom,board-id = <0x02000b 0x10>;
aliases {
serial0 = &blsp2_uart1;
serial1 = &blsp1_uart3;
};
/*
* Until we hook up type-c detection, we
* have to stick with this. But it works.
@ -33,7 +40,7 @@
pinctrl-names = "default";
pinctrl-0 = <&hall_sensor1_default>;
hall-sensor1 {
event-hall-sensor1 {
label = "Keyboard Hall Sensor";
gpios = <&tlmm 124 GPIO_ACTIVE_HIGH>;
debounce-interval = <15>;
@ -49,7 +56,7 @@
pinctrl-names = "default";
pinctrl-0 = <&gpio_kb_pins_extra>;
home {
key-home {
label = "Home";
gpios = <&tlmm 21 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
@ -57,7 +64,7 @@
linux,can-disable;
};
super-l {
key-super-l {
label = "Super Left";
gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
linux,code = <KEY_FN>;
@ -65,7 +72,7 @@
linux,can-disable;
};
super-r {
key-super-r {
label = "Super Right";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
linux,code = <KEY_FN>;
@ -73,7 +80,7 @@
linux,can-disable;
};
shift {
key-shift {
label = "Shift";
gpios = <&tlmm 114 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RIGHTSHIFT>;
@ -81,7 +88,7 @@
linux,can-disable;
};
ctrl {
key-ctrl {
label = "Ctrl";
gpios = <&tlmm 128 GPIO_ACTIVE_LOW>;
linux,code = <KEY_LEFTCTRL>;
@ -89,7 +96,7 @@
linux,can-disable;
};
alt {
key-alt {
label = "Alt";
gpios = <&tlmm 129 GPIO_ACTIVE_LOW>;
linux,code = <KEY_LEFTALT>;
@ -101,12 +108,10 @@
gpio-keys {
compatible = "gpio-keys";
label = "Side buttons";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&vol_up_pin_a>, <&cam_focus_pin_a>,
<&cam_snapshot_pin_a>;
vol-up {
button-vol-up {
label = "Volume Up";
gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
@ -115,7 +120,7 @@
debounce-interval = <15>;
};
camera-snapshot {
button-camera-snapshot {
label = "Camera Snapshot";
gpios = <&pm8998_gpio 7 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
@ -123,7 +128,7 @@
debounce-interval = <15>;
};
camera-focus {
button-camera-focus {
label = "Camera Focus";
gpios = <&pm8998_gpio 8 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
@ -135,7 +140,7 @@
keyboard-leds {
compatible = "gpio-leds";
backlight {
led-0 {
color = <LED_COLOR_ID_WHITE>;
default-state = "off";
function = LED_FUNCTION_KBD_BACKLIGHT;
@ -144,7 +149,7 @@
retain-state-suspended;
};
caps-lock {
led-1 {
color = <LED_COLOR_ID_YELLOW>;
default-state = "off";
function = LED_FUNCTION_CAPSLOCK;
@ -187,10 +192,57 @@
pinctrl-0 = <&ts_vio_default>;
regulator-always-on;
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-always-on;
regulator-boot-on;
};
};
&blsp1_uart3 {
status = "okay";
bluetooth {
compatible = "qcom,wcn3990-bt";
vddio-supply = <&vreg_s4a_1p8>;
vddxo-supply = <&vreg_l7a_1p8>;
vddrf-supply = <&vreg_l17a_1p3>;
vddch0-supply = <&vreg_l25a_3p3>;
max-speed = <3200000>;
};
};
&blsp1_uart3_on {
rx {
/delete-property/ bias-disable;
/*
* Configure a pull-up on 45 (RX). This is needed to
* avoid garbage data when the TX pin of the Bluetooth
* module is in tri-state (module powered off or not
* driving the signal yet).
*/
bias-pull-up;
};
cts {
/delete-property/ bias-disable;
/*
* Configure a pull-down on 47 (CTS) to match the pull
* of the Bluetooth module.
*/
bias-pull-down;
};
};
&blsp2_uart1 {
status = "okay";
};
&blsp2_i2c1 {
status = "ok";
status = "okay";
touchscreen@14 {
compatible = "goodix,gt9286";
@ -205,16 +257,93 @@
};
};
&mmcc {
status = "ok";
&etf {
status = "okay";
};
&mmss_smmu {
status = "ok";
&etm1 {
status = "okay";
};
&etm2 {
status = "okay";
};
&etm3 {
status = "okay";
};
&etm4 {
status = "okay";
};
&etm5 {
status = "okay";
};
&etm6 {
status = "okay";
};
&etm7 {
status = "okay";
};
&etm8 {
status = "okay";
};
&etr {
status = "okay";
};
&funnel1 {
status = "okay";
};
&funnel2 {
status = "okay";
};
&funnel3 {
status = "okay";
};
&funnel4 {
// FIXME: Figure out why clock late_initcall crashes the board with
// this enabled.
// status = "okay";
};
&funnel5 {
// FIXME: Figure out why clock late_initcall crashes the board with
// this enabled.
// status = "okay";
};
&pcie0 {
status = "okay";
};
&pcie_phy {
status = "okay";
};
&pm8005_regulators {
vdd_s1-supply = <&vph_pwr>;
pm8005_s1: s1 { /* VDD_GFX supply */
regulator-min-microvolt = <524000>;
regulator-max-microvolt = <1100000>;
regulator-enable-ramp-delay = <500>;
/* Hack until we rig up the gpu consumer */
regulator-always-on;
};
};
&pm8998_gpio {
vol_up_pin_a: vol-up-active {
vol_up_pin_a: vol-up-active-state {
pins = "gpio6";
function = "normal";
bias-pull-up;
@ -222,7 +351,7 @@
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
};
cam_focus_pin_a: cam-focus-btn-active {
cam_focus_pin_a: cam-focus-btn-active-state {
pins = "gpio7";
function = "normal";
bias-pull-up;
@ -230,7 +359,7 @@
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
};
cam_snapshot_pin_a: cam-snapshot-btn-active {
cam_snapshot_pin_a: cam-snapshot-btn-active-state {
pins = "gpio8";
function = "normal";
bias-pull-up;
@ -249,6 +378,240 @@
};
};
&qusb2phy {
status = "okay";
vdda-pll-supply = <&vreg_l12a_1p8>;
vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
};
&replicator1 {
status = "okay";
};
&rpm_requests {
pm8998-regulators {
compatible = "qcom,rpm-pm8998-regulators";
vdd_s1-supply = <&vph_pwr>;
vdd_s2-supply = <&vph_pwr>;
vdd_s3-supply = <&vph_pwr>;
vdd_s4-supply = <&vph_pwr>;
vdd_s5-supply = <&vph_pwr>;
vdd_s6-supply = <&vph_pwr>;
vdd_s7-supply = <&vph_pwr>;
vdd_s8-supply = <&vph_pwr>;
vdd_s9-supply = <&vph_pwr>;
vdd_s10-supply = <&vph_pwr>;
vdd_s11-supply = <&vph_pwr>;
vdd_s12-supply = <&vph_pwr>;
vdd_s13-supply = <&vph_pwr>;
vdd_l1_l27-supply = <&vreg_s7a_1p025>;
vdd_l2_l8_l17-supply = <&vreg_s3a_1p35>;
vdd_l3_l11-supply = <&vreg_s7a_1p025>;
vdd_l4_l5-supply = <&vreg_s7a_1p025>;
vdd_l6-supply = <&vreg_s5a_2p04>;
vdd_l7_l12_l14_l15-supply = <&vreg_s5a_2p04>;
vdd_l9-supply = <&vreg_bob>;
vdd_l10_l23_l25-supply = <&vreg_bob>;
vdd_l13_l19_l21-supply = <&vreg_bob>;
vdd_l16_l28-supply = <&vreg_bob>;
vdd_l18_l22-supply = <&vreg_bob>;
vdd_l20_l24-supply = <&vreg_bob>;
vdd_l26-supply = <&vreg_s3a_1p35>;
vdd_lvs1_lvs2-supply = <&vreg_s4a_1p8>;
vreg_s3a_1p35: s3 {
regulator-min-microvolt = <1352000>;
regulator-max-microvolt = <1352000>;
};
vreg_s4a_1p8: s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-allow-set-load;
};
vreg_s5a_2p04: s5 {
regulator-min-microvolt = <1904000>;
regulator-max-microvolt = <2040000>;
};
vreg_s7a_1p025: s7 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1028000>;
};
vreg_l1a_0p875: l1 {
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
};
vreg_l2a_1p2: l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vreg_l3a_1p0: l3 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
vreg_l5a_0p8: l5 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
};
vreg_l6a_1p8: l6 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <1808000>;
};
vreg_l7a_1p8: l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l8a_1p2: l8 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vreg_l9a_1p8: l9 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l10a_1p8: l10 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l11a_1p0: l11 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
vreg_l12a_1p8: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l13a_2p95: l13 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l14a_1p88: l14 {
regulator-min-microvolt = <1880000>;
regulator-max-microvolt = <1880000>;
};
vreg_l15a_1p8: l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l16a_2p7: l16 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
};
vreg_l17a_1p3: l17 {
regulator-min-microvolt = <1304000>;
regulator-max-microvolt = <1304000>;
};
vreg_l18a_2p7: l18 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
};
vreg_l19a_3p0: l19 {
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>;
};
vreg_l20a_2p95: l20 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-allow-set-load;
};
vreg_l21a_2p95: l21 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-system-load = <800000>;
regulator-allow-set-load;
};
vreg_l22a_2p85: l22 {
regulator-min-microvolt = <2864000>;
regulator-max-microvolt = <2864000>;
};
vreg_l23a_3p3: l23 {
regulator-min-microvolt = <3312000>;
regulator-max-microvolt = <3312000>;
};
vreg_l24a_3p075: l24 {
regulator-min-microvolt = <3088000>;
regulator-max-microvolt = <3088000>;
};
vreg_l25a_3p3: l25 {
regulator-min-microvolt = <3104000>;
regulator-max-microvolt = <3312000>;
};
vreg_l26a_1p2: l26 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-allow-set-load;
};
vreg_l28_3p0: l28 {
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>;
};
vreg_lvs1a_1p8: lvs1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_lvs2a_1p8: lvs2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
pmi8998-regulators {
compatible = "qcom,rpm-pmi8998-regulators";
vdd_bob-supply = <&vph_pwr>;
vreg_bob: bob {
regulator-min-microvolt = <3312000>;
regulator-max-microvolt = <3600000>;
};
};
};
&remoteproc_adsp {
status = "okay";
};
&remoteproc_mss {
status = "okay";
};
&remoteproc_slpi {
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <0 4>;
@ -297,12 +660,41 @@
};
};
&sdhc2 {
status = "okay";
cd-gpios = <&tlmm 95 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vreg_l21a_2p95>;
vqmmc-supply = <&vreg_l13a_2p95>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_on &sdc2_cd>;
pinctrl-1 = <&sdc2_off &sdc2_cd>;
};
&stm {
status = "okay";
};
&ufshc {
status = "ok";
status = "okay";
vcc-supply = <&vreg_l20a_2p95>;
vccq-supply = <&vreg_l26a_1p2>;
vccq2-supply = <&vreg_s4a_1p8>;
vcc-max-microamp = <750000>;
vccq-max-microamp = <560000>;
vccq2-max-microamp = <750000>;
};
&ufsphy {
status = "ok";
status = "okay";
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l2a_1p2>;
vddp-ref-clk-supply = <&vreg_l26a_1p2>;
};
&usb3 {
status = "okay";
};
&usb3_dwc3 {
@ -310,8 +702,24 @@
extcon = <&extcon_usb>;
};
&usb3phy {
status = "okay";
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l2a_1p2>;
};
/* GT9286 analog supply */
&vreg_l28_3p0 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
&wifi {
status = "okay";
vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
};

9
arch/arm64/boot/dts/qcom/msm8998-hp-envy-x2.dts
View File

@ -16,13 +16,14 @@
keyboard@3a {
compatible = "hid-over-i2c";
interrupt-parent = <&tlmm>;
interrupts = <0x79 IRQ_TYPE_LEVEL_LOW>;
reg = <0x3a>;
hid-descr-addr = <0x0001>;
pinctrl-names = "default";
pinctrl-0 = <&touchpad>;
interrupt-parent = <&tlmm>;
interrupts = <121 IRQ_TYPE_LEVEL_LOW>;
hid-descr-addr = <0x0001>;
};
};

9
arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dts
View File

@ -16,13 +16,14 @@
keyboard@3a {
compatible = "hid-over-i2c";
interrupt-parent = <&tlmm>;
interrupts = <0x79 IRQ_TYPE_LEVEL_LOW>;
reg = <0x3a>;
hid-descr-addr = <0x0001>;
pinctrl-names = "default";
pinctrl-0 = <&touchpad>;
interrupt-parent = <&tlmm>;
interrupts = <121 IRQ_TYPE_LEVEL_LOW>;
hid-descr-addr = <0x0001>;
};
};

443
arch/arm64/boot/dts/qcom/msm8998-mtp.dts
View File

@ -3,11 +3,450 @@
/dts-v1/;
#include "msm8998-mtp.dtsi"
#include "msm8998.dtsi"
#include "pm8005.dtsi"
#include "pm8998.dtsi"
#include "pmi8998.dtsi"
/ {
model = "Qualcomm Technologies, Inc. MSM8998 v1 MTP";
compatible = "qcom,msm8998-mtp";
compatible = "qcom,msm8998-mtp", "qcom,msm8998";
qcom,board-id = <8 0>;
aliases {
serial0 = &blsp2_uart1;
serial1 = &blsp1_uart3;
};
chosen {
stdout-path = "serial0:115200n8";
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-always-on;
regulator-boot-on;
};
};
&blsp1_uart3 {
status = "okay";
bluetooth {
compatible = "qcom,wcn3990-bt";
vddio-supply = <&vreg_s4a_1p8>;
vddxo-supply = <&vreg_l7a_1p8>;
vddrf-supply = <&vreg_l17a_1p3>;
vddch0-supply = <&vreg_l25a_3p3>;
max-speed = <3200000>;
};
};
&blsp1_uart3_on {
rx {
/delete-property/ bias-disable;
/*
* Configure a pull-up on 45 (RX). This is needed to
* avoid garbage data when the TX pin of the Bluetooth
* module is in tri-state (module powered off or not
* driving the signal yet).
*/
bias-pull-up;
};
cts {
/delete-property/ bias-disable;
/*
* Configure a pull-down on 47 (CTS) to match the pull
* of the Bluetooth module.
*/
bias-pull-down;
};
};
&blsp2_uart1 {
status = "okay";
};
&etf {
status = "okay";
};
&etm1 {
status = "okay";
};
&etm2 {
status = "okay";
};
&etm3 {
status = "okay";
};
&etm4 {
status = "okay";
};
&etm5 {
status = "okay";
};
&etm6 {
status = "okay";
};
&etm7 {
status = "okay";
};
&etm8 {
status = "okay";
};
&etr {
status = "okay";
};
&funnel1 {
status = "okay";
};
&funnel2 {
status = "okay";
};
&funnel3 {
status = "okay";
};
&funnel4 {
// FIXME: Figure out why clock late_initcall crashes the board with
// this enabled.
// status = "okay";
};
&funnel5 {
// FIXME: Figure out why clock late_initcall crashes the board with
// this enabled.
// status = "okay";
};
&pcie0 {
status = "okay";
};
&pcie_phy {
status = "okay";
};
&pm8005_regulators {
vdd_s1-supply = <&vph_pwr>;
pm8005_s1: s1 { /* VDD_GFX supply */
regulator-min-microvolt = <524000>;
regulator-max-microvolt = <1100000>;
regulator-enable-ramp-delay = <500>;
/* Hack until we rig up the gpu consumer */
regulator-always-on;
};
};
&qusb2phy {
status = "okay";
vdda-pll-supply = <&vreg_l12a_1p8>;
vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
};
&replicator1 {
status = "okay";
};
&rpm_requests {
pm8998-regulators {
compatible = "qcom,rpm-pm8998-regulators";
vdd_s1-supply = <&vph_pwr>;
vdd_s2-supply = <&vph_pwr>;
vdd_s3-supply = <&vph_pwr>;
vdd_s4-supply = <&vph_pwr>;
vdd_s5-supply = <&vph_pwr>;
vdd_s6-supply = <&vph_pwr>;
vdd_s7-supply = <&vph_pwr>;
vdd_s8-supply = <&vph_pwr>;
vdd_s9-supply = <&vph_pwr>;
vdd_s10-supply = <&vph_pwr>;
vdd_s11-supply = <&vph_pwr>;
vdd_s12-supply = <&vph_pwr>;
vdd_s13-supply = <&vph_pwr>;
vdd_l1_l27-supply = <&vreg_s7a_1p025>;
vdd_l2_l8_l17-supply = <&vreg_s3a_1p35>;
vdd_l3_l11-supply = <&vreg_s7a_1p025>;
vdd_l4_l5-supply = <&vreg_s7a_1p025>;
vdd_l6-supply = <&vreg_s5a_2p04>;
vdd_l7_l12_l14_l15-supply = <&vreg_s5a_2p04>;
vdd_l9-supply = <&vreg_bob>;
vdd_l10_l23_l25-supply = <&vreg_bob>;
vdd_l13_l19_l21-supply = <&vreg_bob>;
vdd_l16_l28-supply = <&vreg_bob>;
vdd_l18_l22-supply = <&vreg_bob>;
vdd_l20_l24-supply = <&vreg_bob>;
vdd_l26-supply = <&vreg_s3a_1p35>;
vdd_lvs1_lvs2-supply = <&vreg_s4a_1p8>;
vreg_s3a_1p35: s3 {
regulator-min-microvolt = <1352000>;
regulator-max-microvolt = <1352000>;
};
vreg_s4a_1p8: s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-allow-set-load;
};
vreg_s5a_2p04: s5 {
regulator-min-microvolt = <1904000>;
regulator-max-microvolt = <2040000>;
};
vreg_s7a_1p025: s7 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1028000>;
};
vreg_l1a_0p875: l1 {
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
};
vreg_l2a_1p2: l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vreg_l3a_1p0: l3 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
vreg_l5a_0p8: l5 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
};
vreg_l6a_1p8: l6 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <1808000>;
};
vreg_l7a_1p8: l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l8a_1p2: l8 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vreg_l9a_1p8: l9 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l10a_1p8: l10 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l11a_1p0: l11 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
vreg_l12a_1p8: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l13a_2p95: l13 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l14a_1p88: l14 {
regulator-min-microvolt = <1880000>;
regulator-max-microvolt = <1880000>;
};
vreg_l15a_1p8: l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l16a_2p7: l16 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
};
vreg_l17a_1p3: l17 {
regulator-min-microvolt = <1304000>;
regulator-max-microvolt = <1304000>;
};
vreg_l18a_2p7: l18 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
};
vreg_l19a_3p0: l19 {
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>;
};
vreg_l20a_2p95: l20 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-allow-set-load;
};
vreg_l21a_2p95: l21 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-system-load = <800000>;
regulator-allow-set-load;
};
vreg_l22a_2p85: l22 {
regulator-min-microvolt = <2864000>;
regulator-max-microvolt = <2864000>;
};
vreg_l23a_3p3: l23 {
regulator-min-microvolt = <3312000>;
regulator-max-microvolt = <3312000>;
};
vreg_l24a_3p075: l24 {
regulator-min-microvolt = <3088000>;
regulator-max-microvolt = <3088000>;
};
vreg_l25a_3p3: l25 {
regulator-min-microvolt = <3104000>;
regulator-max-microvolt = <3312000>;
};
vreg_l26a_1p2: l26 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-allow-set-load;
};
vreg_l28_3p0: l28 {
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>;
};
vreg_lvs1a_1p8: lvs1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_lvs2a_1p8: lvs2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
pmi8998-regulators {
compatible = "qcom,rpm-pmi8998-regulators";
vdd_bob-supply = <&vph_pwr>;
vreg_bob: bob {
regulator-min-microvolt = <3312000>;
regulator-max-microvolt = <3600000>;
};
};
};
&remoteproc_adsp {
status = "okay";
};
&remoteproc_mss {
status = "okay";
};
&remoteproc_slpi {
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <0 4>, <81 4>;
};
&sdhc2 {
status = "okay";
cd-gpios = <&tlmm 95 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vreg_l21a_2p95>;
vqmmc-supply = <&vreg_l13a_2p95>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_on &sdc2_cd>;
pinctrl-1 = <&sdc2_off &sdc2_cd>;
};
&stm {
status = "okay";
};
&ufshc {
status = "okay";
vcc-supply = <&vreg_l20a_2p95>;
vccq-supply = <&vreg_l26a_1p2>;
vccq2-supply = <&vreg_s4a_1p8>;
vcc-max-microamp = <750000>;
vccq-max-microamp = <560000>;
vccq2-max-microamp = <750000>;
};
&ufsphy {
status = "okay";
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l2a_1p2>;
vddp-ref-clk-supply = <&vreg_l26a_1p2>;
};
&usb3 {
status = "okay";
};
&usb3_dwc3 {
dr_mode = "host"; /* Force to host until we have Type-C hooked up */
};
&usb3phy {
status = "okay";
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l2a_1p2>;
};
&wifi {
status = "okay";
vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
};

421
arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
View File

@ -1,421 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright (c) 2016, The Linux Foundation. All rights reserved. */
#include "msm8998.dtsi"
#include "pm8998.dtsi"
#include "pmi8998.dtsi"
#include "pm8005.dtsi"
/ {
aliases {
serial0 = &blsp2_uart1;
serial1 = &blsp1_uart3;
};
chosen {
stdout-path = "serial0:115200n8";
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-always-on;
regulator-boot-on;
};
};
&blsp1_uart3 {
status = "okay";
bluetooth {
compatible = "qcom,wcn3990-bt";
vddio-supply = <&vreg_s4a_1p8>;
vddxo-supply = <&vreg_l7a_1p8>;
vddrf-supply = <&vreg_l17a_1p3>;
vddch0-supply = <&vreg_l25a_3p3>;
max-speed = <3200000>;
};
};
&blsp2_uart1 {
status = "okay";
};
&etf {
status = "okay";
};
&etm1 {
status = "okay";
};
&etm2 {
status = "okay";
};
&etm3 {
status = "okay";
};
&etm4 {
status = "okay";
};
&etm5 {
status = "okay";
};
&etm6 {
status = "okay";
};
&etm7 {
status = "okay";
};
&etm8 {
status = "okay";
};
&etr {
status = "okay";
};
&funnel1 {
status = "okay";
};
&funnel2 {
status = "okay";
};
&funnel3 {
status = "okay";
};
&funnel4 {
// FIXME: Figure out why clock late_initcall crashes the board with
// this enabled.
// status = "okay";
};
&funnel5 {
// FIXME: Figure out why clock late_initcall crashes the board with
// this enabled.
// status = "okay";
};
&pcie0 {
status = "okay";
};
&pcie_phy {
status = "okay";
};
&pm8005_lsid1 {
pm8005-regulators {
compatible = "qcom,pm8005-regulators";
vdd_s1-supply = <&vph_pwr>;
pm8005_s1: s1 { /* VDD_GFX supply */
regulator-min-microvolt = <524000>;
regulator-max-microvolt = <1100000>;
regulator-enable-ramp-delay = <500>;
/* hack until we rig up the gpu consumer */
regulator-always-on;
};
};
};
&qusb2phy {
status = "okay";
vdda-pll-supply = <&vreg_l12a_1p8>;
vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
};
&replicator1 {
status = "okay";
};
&rpm_requests {
pm8998-regulators {
compatible = "qcom,rpm-pm8998-regulators";
vdd_s1-supply = <&vph_pwr>;
vdd_s2-supply = <&vph_pwr>;
vdd_s3-supply = <&vph_pwr>;
vdd_s4-supply = <&vph_pwr>;
vdd_s5-supply = <&vph_pwr>;
vdd_s6-supply = <&vph_pwr>;
vdd_s7-supply = <&vph_pwr>;
vdd_s8-supply = <&vph_pwr>;
vdd_s9-supply = <&vph_pwr>;
vdd_s10-supply = <&vph_pwr>;
vdd_s11-supply = <&vph_pwr>;
vdd_s12-supply = <&vph_pwr>;
vdd_s13-supply = <&vph_pwr>;
vdd_l1_l27-supply = <&vreg_s7a_1p025>;
vdd_l2_l8_l17-supply = <&vreg_s3a_1p35>;
vdd_l3_l11-supply = <&vreg_s7a_1p025>;
vdd_l4_l5-supply = <&vreg_s7a_1p025>;
vdd_l6-supply = <&vreg_s5a_2p04>;
vdd_l7_l12_l14_l15-supply = <&vreg_s5a_2p04>;
vdd_l9-supply = <&vreg_bob>;
vdd_l10_l23_l25-supply = <&vreg_bob>;
vdd_l13_l19_l21-supply = <&vreg_bob>;
vdd_l16_l28-supply = <&vreg_bob>;
vdd_l18_l22-supply = <&vreg_bob>;
vdd_l20_l24-supply = <&vreg_bob>;
vdd_l26-supply = <&vreg_s3a_1p35>;
vdd_lvs1_lvs2-supply = <&vreg_s4a_1p8>;
vreg_s3a_1p35: s3 {
regulator-min-microvolt = <1352000>;
regulator-max-microvolt = <1352000>;
};
vreg_s4a_1p8: s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-allow-set-load;
};
vreg_s5a_2p04: s5 {
regulator-min-microvolt = <1904000>;
regulator-max-microvolt = <2040000>;
};
vreg_s7a_1p025: s7 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1028000>;
};
vreg_l1a_0p875: l1 {
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
};
vreg_l2a_1p2: l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vreg_l3a_1p0: l3 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
vreg_l5a_0p8: l5 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
};
vreg_l6a_1p8: l6 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <1808000>;
};
vreg_l7a_1p8: l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l8a_1p2: l8 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vreg_l9a_1p8: l9 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l10a_1p8: l10 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l11a_1p0: l11 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
vreg_l12a_1p8: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l13a_2p95: l13 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l14a_1p88: l14 {
regulator-min-microvolt = <1880000>;
regulator-max-microvolt = <1880000>;
};
vreg_l15a_1p8: l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l16a_2p7: l16 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
};
vreg_l17a_1p3: l17 {
regulator-min-microvolt = <1304000>;
regulator-max-microvolt = <1304000>;
};
vreg_l18a_2p7: l18 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
};
vreg_l19a_3p0: l19 {
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>;
};
vreg_l20a_2p95: l20 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-allow-set-load;
};
vreg_l21a_2p95: l21 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-allow-set-load;
regulator-system-load = <800000>;
};
vreg_l22a_2p85: l22 {
regulator-min-microvolt = <2864000>;
regulator-max-microvolt = <2864000>;
};
vreg_l23a_3p3: l23 {
regulator-min-microvolt = <3312000>;
regulator-max-microvolt = <3312000>;
};
vreg_l24a_3p075: l24 {
regulator-min-microvolt = <3088000>;
regulator-max-microvolt = <3088000>;
};
vreg_l25a_3p3: l25 {
regulator-min-microvolt = <3104000>;
regulator-max-microvolt = <3312000>;
};
vreg_l26a_1p2: l26 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-allow-set-load;
};
vreg_l28_3p0: l28 {
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>;
};
vreg_lvs1a_1p8: lvs1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_lvs2a_1p8: lvs2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
pmi8998-regulators {
compatible = "qcom,rpm-pmi8998-regulators";
vdd_bob-supply = <&vph_pwr>;
vreg_bob: bob {
regulator-min-microvolt = <3312000>;
regulator-max-microvolt = <3600000>;
};
};
};
&remoteproc_adsp {
status = "okay";
};
&remoteproc_mss {
status = "okay";
};
&remoteproc_slpi {
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <0 4>, <81 4>;
};
&sdhc2 {
status = "okay";
cd-gpios = <&tlmm 95 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vreg_l21a_2p95>;
vqmmc-supply = <&vreg_l13a_2p95>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
};
&stm {
status = "okay";
};
&ufshc {
status = "okay";
vcc-supply = <&vreg_l20a_2p95>;
vccq-supply = <&vreg_l26a_1p2>;
vccq2-supply = <&vreg_s4a_1p8>;
vcc-max-microamp = <750000>;
vccq-max-microamp = <560000>;
vccq2-max-microamp = <750000>;
};
&ufsphy {
status = "okay";
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l2a_1p2>;
vddp-ref-clk-supply = <&vreg_l26a_1p2>;
};
&usb3 {
status = "okay";
};
&usb3_dwc3 {
dr_mode = "host"; /* Force to host until we have Type-C hooked up */
};
&usb3phy {
status = "okay";
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l2a_1p2>;
};
&wifi {
status = "okay";
vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
};
/* PINCTRL - board-specific pinctrl */
&blsp1_uart3_on {
rx {
/delete-property/ bias-disable;
/*
* Configure a pull-up on 45 (RX). This is needed to
* avoid garbage data when the TX pin of the Bluetooth
* module is in tri-state (module powered off or not
* driving the signal yet).
*/
bias-pull-up;
};
cts {
/delete-property/ bias-disable;
/*
* Configure a pull-down on 47 (CTS) to match the pull
* of the Bluetooth module.
*/
bias-pull-down;
};
};

2
arch/arm64/boot/dts/qcom/msm8998-oneplus-cheeseburger.dts
View File

@ -32,7 +32,7 @@
};
&pmi8998_gpio {
button_backlight_default: button-backlight-default {
button_backlight_default: button-backlight-state {
pinconf {
pins = "gpio5";
function = "normal";

88
arch/arm64/boot/dts/qcom/msm8998-oneplus-common.dtsi
View File

@ -11,9 +11,9 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include "msm8998.dtsi"
#include "pm8005.dtsi"
#include "pm8998.dtsi"
#include "pmi8998.dtsi"
#include "pm8005.dtsi"
/ {
/* Required for bootloader to select correct board */
@ -32,6 +32,19 @@
height = <1920>;
stride = <(1080 * 4)>;
format = "a8r8g8b8";
/*
* That's a lot of clocks, but it's necessary due
* to unused clk cleanup & no panel driver yet..
*/
clocks = <&mmcc MDSS_AHB_CLK>,
<&mmcc MDSS_AXI_CLK>,
<&mmcc MDSS_VSYNC_CLK>,
<&mmcc MDSS_MDP_CLK>,
<&mmcc MDSS_BYTE0_CLK>,
<&mmcc MDSS_BYTE0_INTF_CLK>,
<&mmcc MDSS_PCLK0_CLK>,
<&mmcc MDSS_ESC0_CLK>;
power-domains = <&mmcc MDSS_GDSC>;
};
};
@ -77,7 +90,7 @@
pinctrl-names = "default";
pinctrl-0 = <&vol_keys_default>;
vol-down {
button-vol-down {
label = "Volume down";
gpios = <&pm8998_gpio 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
@ -85,7 +98,7 @@
wakeup-source;
};
vol-up {
button-vol-up {
label = "Volume up";
gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
@ -101,7 +114,7 @@
pinctrl-names = "default";
pinctrl-0 = <&hall_sensor_default>;
hall-sensor {
event-hall-sensor {
label = "Hall Effect Sensor";
gpios = <&tlmm 124 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_SW>;
@ -245,32 +258,24 @@
status = "okay";
};
&pm8005_lsid1 {
pm8005-regulators {
compatible = "qcom,pm8005-regulators";
vdd_s1-supply = <&vph_pwr>;
pm8005_s1: s1 { /* VDD_GFX supply */
regulator-min-microvolt = <524000>;
regulator-max-microvolt = <1100000>;
regulator-enable-ramp-delay = <500>;
/* hack until we rig up the gpu consumer */
regulator-always-on;
};
&pm8005_regulators {
/* VDD_GFX supply */
pm8005_s1: s1 {
regulator-min-microvolt = <524000>;
regulator-max-microvolt = <1100000>;
regulator-enable-ramp-delay = <500>;
/* Hack until we rig up the gpu consumer */
regulator-always-on;
};
};
&pm8998_gpio {
vol_keys_default: vol-keys-default {
pinconf {
pins = "gpio5", "gpio6";
function = "normal";
bias-pull-up;
input-enable;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
};
vol_keys_default: vol-keys-state {
pins = "gpio5", "gpio6";
function = "normal";
bias-pull-up;
input-enable;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
};
};
@ -318,91 +323,113 @@
regulator-min-microvolt = <1352000>;
regulator-max-microvolt = <1352000>;
};
vreg_s4a_1p8: s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-allow-set-load;
};
vreg_s5a_2p04: s5 {
regulator-min-microvolt = <1904000>;
regulator-max-microvolt = <2040000>;
};
vreg_s7a_1p025: s7 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1028000>;
};
vreg_l1a_0p875: l1 {
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
};
vreg_l2a_1p2: l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vreg_l3a_1p0: l3 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
vreg_l5a_0p8: l5 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
};
vreg_l6a_1p8: l6 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <1808000>;
};
vreg_l7a_1p8: l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l8a_1p2: l8 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vreg_l9a_1p8: l9 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l10a_1p8: l10 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l11a_1p0: l11 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
vreg_l12a_1p8: l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l13a_2p95: l13 {
regulator-min-microvolt = <1808000>;
regulator-max-microvolt = <2960000>;
};
vreg_l14a_1p88: l14 {
regulator-min-microvolt = <1880000>;
regulator-max-microvolt = <1880000>;
};
vreg_l15a_1p8: l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l16a_2p7: l16 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
};
vreg_l17a_1p3: l17 {
regulator-min-microvolt = <1304000>;
regulator-max-microvolt = <1304000>;
};
vreg_l18a_2p7: l18 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
};
vreg_l19a_3p0: l19 {
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>;
};
vreg_l20a_2p95: l20 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
@ -411,34 +438,41 @@
vreg_l21a_2p95: l21 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-allow-set-load;
regulator-system-load = <800000>;
regulator-allow-set-load;
};
vreg_l22a_2p85: l22 {
regulator-min-microvolt = <2864000>;
regulator-max-microvolt = <2864000>;
};
vreg_l23a_3p3: l23 {
regulator-min-microvolt = <3312000>;
regulator-max-microvolt = <3312000>;
};
vreg_l24a_3p075: l24 {
regulator-min-microvolt = <3088000>;
regulator-max-microvolt = <3088000>;
};
vreg_l25a_3p3: l25 {
regulator-min-microvolt = <3104000>;
regulator-max-microvolt = <3312000>;
};
vreg_l26a_1p2: l26 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-allow-set-load;
};
vreg_l28_3p0: l28 {
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>;
};
vreg_lvs1a_1p8: lvs1 { };
vreg_lvs2a_1p8: lvs2 { };
};

4
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino-lilac.dts
View File

@ -29,3 +29,7 @@
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
&vreg_lvs1a_1p8 {
status = "disabled";
};

2
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino-maple.dts
View File

@ -38,7 +38,7 @@
};
&pmi8998_gpio {
disp_dvdd_en: disp-dvdd-en-active {
disp_dvdd_en: disp-dvdd-en-active-state {
pins = "gpio10";
function = "normal";
bias-disable;

120
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi
View File

@ -5,15 +5,13 @@
* Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org>
*/
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include "msm8998.dtsi"
#include "pm8005.dtsi"
#include "pm8998.dtsi"
#include "pmi8998.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
/ {
/* required for bootloader to select correct board */
@ -21,8 +19,6 @@
qcom,board-id = <8 0>;
clocks {
compatible = "simple-bus";
div1_mclk: divclk1 {
compatible = "gpio-gate-clock";
pinctrl-0 = <&audio_mclk_pin>;
@ -91,13 +87,21 @@
regulator-boot-on;
};
extcon_usb: extcon-usb {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&tlmm 38 GPIO_ACTIVE_HIGH>;
vbus-gpio = <&tlmm 128 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_extcon_active &usb_vbus_active>;
};
gpio-keys {
compatible = "gpio-keys";
label = "Side buttons";
pinctrl-names = "default";
pinctrl-0 = <&vol_down_pin_a>, <&cam_focus_pin_a>,
<&cam_snapshot_pin_a>;
vol-down {
button-vol-down {
label = "Volume Down";
gpios = <&pm8998_gpio 5 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
@ -106,7 +110,7 @@
debounce-interval = <15>;
};
camera-snapshot {
button-camera-snapshot {
label = "Camera Snapshot";
gpios = <&pm8998_gpio 7 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
@ -114,7 +118,7 @@
debounce-interval = <15>;
};
camera-focus {
button-camera-focus {
label = "Camera Focus";
gpios = <&pm8998_gpio 8 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
@ -129,7 +133,7 @@
pinctrl-names = "default";
pinctrl-0 = <&hall_sensor0_default>;
hall-sensor0 {
event-hall-sensor0 {
label = "Cover Hall Sensor";
gpios = <&tlmm 124 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_SW>;
@ -245,6 +249,24 @@
status = "okay";
};
&blsp2_i2c2 {
status = "okay";
proximity@29 {
compatible = "st,vl53l0x";
reg = <0x29>;
interrupt-parent = <&tlmm>;
interrupts = <22 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
vdd-supply = <&cam_vio_vreg>;
pinctrl-names = "default";
pinctrl-0 = <&tof_int &tof_reset>;
};
};
&ibb {
regulator-min-microamp = <800000>;
regulator-max-microamp = <800000>;
@ -270,32 +292,19 @@
regulator-soft-start;
};
&mmcc {
status = "ok";
};
&mmss_smmu {
status = "ok";
};
&pm8005_lsid1 {
pm8005-regulators {
compatible = "qcom,pm8005-regulators";
vdd_s1-supply = <&vph_pwr>;
/* VDD_GFX supply */
pm8005_s1: s1 {
regulator-min-microvolt = <524000>;
regulator-max-microvolt = <1088000>;
regulator-enable-ramp-delay = <500>;
regulator-always-on;
};
&pm8005_regulators {
/* VDD_GFX supply */
pm8005_s1: s1 {
regulator-min-microvolt = <524000>;
regulator-max-microvolt = <1088000>;
regulator-enable-ramp-delay = <500>;
/* Hack until we rig up the gpu consumer */
regulator-always-on;
};
};
&pm8998_gpio {
vol_down_pin_a: vol-down-active {
vol_down_pin_a: vol-down-active-state {
pins = "gpio5";
function = PMIC_GPIO_FUNC_NORMAL;
bias-pull-up;
@ -303,7 +312,7 @@
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
};
cam_focus_pin_a: cam-focus-btn-active {
cam_focus_pin_a: cam-focus-btn-active-state {
pins = "gpio7";
function = PMIC_GPIO_FUNC_NORMAL;
bias-pull-up;
@ -311,7 +320,7 @@
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
};
cam_snapshot_pin_a: cam-snapshot-btn-active {
cam_snapshot_pin_a: cam-snapshot-btn-active-state {
pins = "gpio8";
function = PMIC_GPIO_FUNC_NORMAL;
bias-pull-up;
@ -319,7 +328,7 @@
qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
};
audio_mclk_pin: audio-mclk-pin-active {
audio_mclk_pin: audio-mclk-pin-active-state {
pins = "gpio13";
function = "func2";
power-source = <0>;
@ -327,7 +336,7 @@
};
&pmi8998_gpio {
cam_vio_default: cam-vio-active {
cam_vio_default: cam-vio-active-state {
pins = "gpio1";
function = PMIC_GPIO_FUNC_NORMAL;
bias-disable;
@ -337,7 +346,7 @@
power-source = <1>;
};
vib_default: vib-en {
vib_default: vib-en-state {
pins = "gpio5";
function = PMIC_GPIO_FUNC_NORMAL;
bias-disable;
@ -549,8 +558,8 @@
vqmmc-supply = <&vreg_l13a_2p95>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
pinctrl-0 = <&sdc2_on &sdc2_cd>;
pinctrl-1 = <&sdc2_off &sdc2_cd>;
};
&tlmm {
@ -606,6 +615,14 @@
drive-strength = <2>;
};
tof_int: tof-int {
pins = "gpio22";
function = "gpio";
bias-pull-up;
drive-strength = <2>;
input-enable;
};
cam1_vdig_default: cam1-vdig-default {
pins = "gpio25";
function = "gpio";
@ -613,6 +630,20 @@
drive-strength = <2>;
};
usb_extcon_active: usb-extcon-active {
pins = "gpio38";
function = "gpio";
bias-disable;
drive-strength = <16>;
};
tof_reset: tof-reset {
pins = "gpio27";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
hall_sensor0_default: acc-cover-open {
pins = "gpio124";
function = "gpio";
@ -628,6 +659,14 @@
bias-pull-up;
};
usb_vbus_active: usb-vbus-active {
pins = "gpio128";
function = "gpio";
bias-disable;
drive-strength = <2>;
output-low;
};
ts_vddio_en: ts-vddio-en-default {
pins = "gpio133";
function = "gpio";
@ -658,6 +697,7 @@
&usb3_dwc3 {
/* Force to peripheral until we have Type-C hooked up */
dr_mode = "peripheral";
extcon = <&extcon_usb>;
};
&usb3phy {

95
arch/arm64/boot/dts/qcom/msm8998.dtsi
View File

@ -838,7 +838,7 @@
};
qfprom: qfprom@784000 {
compatible = "qcom,qfprom";
compatible = "qcom,msm8998-qfprom", "qcom,qfprom";
reg = <0x00784000 0x621c>;
#address-cells = <1>;
#size-cells = <1>;
@ -929,7 +929,7 @@
interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 0 135 IRQ_TYPE_LEVEL_HIGH>,
interrupt-map = <0 0 0 1 &intc 0 0 135 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &intc 0 0 136 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &intc 0 0 138 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &intc 0 0 139 IRQ_TYPE_LEVEL_HIGH>;
@ -1057,85 +1057,58 @@
reg = <0x03400000 0xc00000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <0x2>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <0x2>;
#interrupt-cells = <2>;
sdc2_clk_on: sdc2_clk_on {
config {
sdc2_on: sdc2-on {
clk {
pins = "sdc2_clk";
bias-disable;
drive-strength = <16>;
};
};
sdc2_clk_off: sdc2_clk_off {
config {
pins = "sdc2_clk";
bias-disable;
drive-strength = <2>;
};
};
sdc2_cmd_on: sdc2_cmd_on {
config {
cmd {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <10>;
bias-pull-up;
};
data {
pins = "sdc2_data";
drive-strength = <10>;
bias-pull-up;
};
};
sdc2_cmd_off: sdc2_cmd_off {
config {
sdc2_off: sdc2-off {
clk {
pins = "sdc2_clk";
drive-strength = <2>;
bias-disable;
};
cmd {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <2>;
bias-pull-up;
};
};
sdc2_data_on: sdc2_data_on {
config {
data {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <10>;
};
};
sdc2_data_off: sdc2_data_off {
config {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <2>;
};
};
sdc2_cd_on: sdc2_cd_on {
mux {
pins = "gpio95";
function = "gpio";
};
config {
pins = "gpio95";
bias-pull-up;
drive-strength = <2>;
};
};
sdc2_cd_off: sdc2_cd_off {
mux {
pins = "gpio95";
function = "gpio";
};
config {
pins = "gpio95";
bias-pull-up;
drive-strength = <2>;
};
sdc2_cd: sdc2-cd {
pins = "gpio95";
function = "gpio";
bias-pull-up;
drive-strength = <2>;
};
blsp1_uart3_on: blsp1_uart3_on {
blsp1_uart3_on: blsp1-uart3-on {
tx {
pins = "gpio45";
function = "blsp_uart3_a";
@ -1416,7 +1389,7 @@
status = "disabled";
gpu_opp_table: opp-table {
compatible = "operating-points-v2";
compatible = "operating-points-v2";
opp-710000097 {
opp-hz = /bits/ 64 <710000097>;
opp-level = <RPM_SMD_LEVEL_TURBO>;
@ -2080,7 +2053,7 @@
<0xc010600 0x128>,
<0xc010800 0x200>;
#phy-cells = <0>;
#clock-cells = <1>;
#clock-cells = <0>;
clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "usb3_phy_pipe_clk_src";
@ -2102,7 +2075,7 @@
nvmem-cells = <&qusb2_hstx_trim>;
};
sdhc2: sdhci@c0a4900 {
sdhc2: mmc@c0a4900 {
compatible = "qcom,sdhci-msm-v4";
reg = <0x0c0a4900 0x314>, <0x0c0a4000 0x800>;
reg-names = "hc_mem", "core_mem";
@ -2415,7 +2388,6 @@
#reset-cells = <1>;
#power-domain-cells = <1>;
reg = <0xc8c0000 0x40000>;
status = "disabled";
clock-names = "xo",
"gpll0",
@ -2450,7 +2422,6 @@
<&mmcc BIMC_SMMU_AXI_CLK>;
clock-names = "iface-mm", "iface-smmu",
"bus-mm", "bus-smmu";
status = "disabled";
#global-interrupts = <0>;
interrupts =

3
arch/arm64/boot/dts/qcom/pm6350.dtsi
View File

@ -36,9 +36,10 @@
};
pm6350_gpios: gpios@c000 {
compatible = "qcom,pm6350-gpio";
compatible = "qcom,pm6350-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm6350_gpios 0 0 9>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

2
arch/arm64/boot/dts/qcom/pm660.dtsi
View File

@ -171,7 +171,7 @@
};
pm660_gpios: gpios@c000 {
compatible = "qcom,pm660-gpio";
compatible = "qcom,pm660-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm660_gpios 0 0 13>;

8
arch/arm64/boot/dts/qcom/pm660l.dtsi
View File

@ -65,9 +65,15 @@
#address-cells = <1>;
#size-cells = <0>;
pm660l_lpg: lpg@b100 {
compatible = "qcom,pm660l-lpg";
status = "disabled";
};
pm660l_wled: leds@d800 {
compatible = "qcom,pm660l-wled";
reg = <0xd800 0xd900>;
reg = <0xd800>, <0xd900>;
interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ovp";
label = "backlight";

4
arch/arm64/boot/dts/qcom/pm8005.dtsi
View File

@ -28,5 +28,9 @@
reg = <0x5 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8005_regulators: regulators {
compatible = "qcom,pm8005-regulators";
};
};
};

3
arch/arm64/boot/dts/qcom/pm8009.dtsi
View File

@ -19,9 +19,10 @@
};
pm8009_gpios: gpio@c000 {
compatible = "qcom,pm8005-gpio";
compatible = "qcom,pm8005-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8009_gpios 0 0 4>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

3
arch/arm64/boot/dts/qcom/pm8150.dtsi
View File

@ -127,9 +127,10 @@
};
pm8150_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio";
compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8150_gpios 0 0 10>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

13
arch/arm64/boot/dts/qcom/pm8150b.dtsi
View File

@ -112,9 +112,10 @@
};
pm8150b_gpios: gpio@c000 {
compatible = "qcom,pm8150b-gpio";
compatible = "qcom,pm8150b-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8150b_gpios 0 0 12>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@ -126,5 +127,15 @@
reg = <0x3 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8150b_lpg: lpg {
compatible = "qcom,pm8150b-lpg";
#address-cells = <1>;
#size-cells = <0>;
#pwm-cells = <2>;
status = "disabled";
};
};
};

14
arch/arm64/boot/dts/qcom/pm8150l.dtsi
View File

@ -100,9 +100,10 @@
};
pm8150l_gpios: gpio@c000 {
compatible = "qcom,pm8150l-gpio";
compatible = "qcom,pm8150l-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8150l_gpios 0 0 12>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@ -114,5 +115,16 @@
reg = <0x5 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8150l_lpg: lpg {
compatible = "qcom,pm8150l-lpg";
#address-cells = <1>;
#size-cells = <0>;
#pwm-cells = <2>;
status = "disabled";
};
};
};

3
arch/arm64/boot/dts/qcom/pm8350.dtsi
View File

@ -45,9 +45,10 @@
};
pm8350_gpios: gpio@8800 {
compatible = "qcom,pm8350-gpio";
compatible = "qcom,pm8350-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pm8350_gpios 0 0 10>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

3
arch/arm64/boot/dts/qcom/pm8350b.dtsi
View File

@ -45,9 +45,10 @@
};
pm8350b_gpios: gpio@8800 {
compatible = "qcom,pm8350b-gpio";
compatible = "qcom,pm8350b-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pm8350b_gpios 0 0 8>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

17
arch/arm64/boot/dts/qcom/pm8916.dtsi
View File

@ -108,14 +108,13 @@
};
pm8916_gpios: gpios@c000 {
compatible = "qcom,pm8916-gpio";
compatible = "qcom,pm8916-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm8916_gpios 0 0 4>;
#gpio-cells = <2>;
interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
<0 0xc1 0 IRQ_TYPE_NONE>,
<0 0xc2 0 IRQ_TYPE_NONE>,
<0 0xc3 0 IRQ_TYPE_NONE>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
@ -125,6 +124,14 @@
#address-cells = <1>;
#size-cells = <0>;
pm8916_pwm: pwm {
compatible = "qcom,pm8916-pwm";
#pwm-cells = <2>;
status = "disabled";
};
pm8916_vib: vibrator@c000 {
compatible = "qcom,pm8916-vib";
reg = <0xc000>;

10
arch/arm64/boot/dts/qcom/pm8994.dtsi
View File

@ -135,6 +135,16 @@
#address-cells = <1>;
#size-cells = <0>;
pm8994_lpg: lpg {
compatible = "qcom,pm8994-lpg";
#address-cells = <1>;
#size-cells = <0>;
#pwm-cells = <2>;
status = "disabled";
};
pm8994_spmi_regulators: regulators {
compatible = "qcom,pm8994-regulators";
};

22
arch/arm64/boot/dts/qcom/pmi8994.dtsi
View File

@ -19,6 +19,16 @@
interrupt-controller;
#interrupt-cells = <2>;
};
pmi8994_mpps: mpps@a000 {
compatible = "qcom,pmi8994-mpp";
reg = <0xa000>;
gpio-controller;
gpio-ranges = <&pmi8994_mpps 0 0 4>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pmic@3 {
@ -27,6 +37,16 @@
#address-cells = <1>;
#size-cells = <0>;
pmi8994_lpg: lpg {
compatible = "qcom,pmi8994-lpg";
#address-cells = <1>;
#size-cells = <0>;
#pwm-cells = <2>;
status = "disabled";
};
pmi8994_spmi_regulators: regulators {
compatible = "qcom,pmi8994-regulators";
#address-cells = <1>;
@ -35,7 +55,7 @@
pmi8994_wled: wled@d800 {
compatible = "qcom,pmi8994-wled";
reg = <0xd800 0xd900>;
reg = <0xd800>, <0xd900>;
interrupts = <3 0xd8 0x02 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "short";
qcom,cabc;

13
arch/arm64/boot/dts/qcom/pmi8998.dtsi
View File

@ -42,9 +42,19 @@
};
};
pmi8998_lpg: lpg {
compatible = "qcom,pmi8998-lpg";
#address-cells = <1>;
#size-cells = <0>;
#pwm-cells = <2>;
status = "disabled";
};
pmi8998_wled: leds@d800 {
compatible = "qcom,pmi8998-wled";
reg = <0xd800 0xd900>;
reg = <0xd800>, <0xd900>;
interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>,
<0x3 0xd8 0x2 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ovp", "short";
@ -52,6 +62,5 @@
status = "disabled";
};
};
};

2
arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
View File

@ -116,7 +116,7 @@
};
pmm8155au_1_gpios: gpio@c000 {
compatible = "qcom,pmm8155au-gpio";
compatible = "qcom,pmm8155au-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
#gpio-cells = <2>;

2
arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi
View File

@ -89,7 +89,7 @@
};
pmm8155au_2_gpios: gpio@c000 {
compatible = "qcom,pmm8155au-gpio";
compatible = "qcom,pmm8155au-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
#gpio-cells = <2>;

3
arch/arm64/boot/dts/qcom/pmr735b.dtsi
View File

@ -45,9 +45,10 @@
};
pmr735b_gpios: gpio@8800 {
compatible = "qcom,pmr735b-gpio";
compatible = "qcom,pmr735b-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pmr735b_gpios 0 0 4>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;

17
arch/arm64/boot/dts/qcom/pms405.dtsi
View File

@ -38,22 +38,13 @@
#size-cells = <0>;
pms405_gpios: gpio@c000 {
compatible = "qcom,pms405-gpio";
compatible = "qcom,pms405-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pms405_gpios 0 0 12>;
#gpio-cells = <2>;
interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
<0 0xc1 0 IRQ_TYPE_NONE>,
<0 0xc2 0 IRQ_TYPE_NONE>,
<0 0xc3 0 IRQ_TYPE_NONE>,
<0 0xc4 0 IRQ_TYPE_NONE>,
<0 0xc5 0 IRQ_TYPE_NONE>,
<0 0xc6 0 IRQ_TYPE_NONE>,
<0 0xc7 0 IRQ_TYPE_NONE>,
<0 0xc8 0 IRQ_TYPE_NONE>,
<0 0xc9 0 IRQ_TYPE_NONE>,
<0 0xca 0 IRQ_TYPE_NONE>,
<0 0xcb 0 IRQ_TYPE_NONE>;
interrupt-controller;
#interrupt-cells = <2>;
};
pon@800 {

4
arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
View File

@ -304,7 +304,7 @@
};
&pms405_gpios {
usb_vbus_boost_pin: usb-vbus-boost-pin {
usb_vbus_boost_pin: usb-vbus-boost-state {
pinconf {
pins = "gpio3";
function = PMIC_GPIO_FUNC_NORMAL;
@ -312,7 +312,7 @@
power-source = <1>;
};
};
usb3_vbus_pin: usb3-vbus-pin {
usb3_vbus_pin: usb3-vbus-state {
pinconf {
pins = "gpio12";
function = PMIC_GPIO_FUNC_NORMAL;

35
arch/arm64/boot/dts/qcom/qcs404.dtsi
View File

@ -366,7 +366,7 @@
};
qfprom: qfprom@a4000 {
compatible = "qcom,qfprom";
compatible = "qcom,qcs404-qfprom", "qcom,qfprom";
reg = <0x000a4000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
@ -669,8 +669,25 @@
};
blsp1_spi1_default: blsp1-spi1-default {
pins = "gpio22", "gpio23", "gpio24", "gpio25";
function = "blsp_spi1";
mosi {
pins = "gpio22";
function = "blsp_spi_mosi_a1";
};
miso {
pins = "gpio23";
function = "blsp_spi_miso_a1";
};
cs_n {
pins = "gpio24";
function = "blsp_spi_cs_n_a1";
};
clk {
pins = "gpio25";
function = "blsp_spi_clk_a1";
};
};
blsp1_spi2_default: blsp1-spi2-default {
@ -789,7 +806,7 @@
status = "disabled";
};
sdcc1: sdcc@7804000 {
sdcc1: mmc@7804000 {
compatible = "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5";
reg = <0x07804000 0x1000>, <0x7805000 0x1000>;
reg-names = "hc", "cqhci";
@ -798,10 +815,10 @@
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC1_APPS_CLK>,
<&gcc GCC_SDCC1_AHB_CLK>,
clocks = <&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_SDCC1_APPS_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
clock-names = "iface", "core", "xo";
status = "disabled";
};
@ -1102,8 +1119,8 @@
status = "disabled";
};
imem@8600000 {
compatible = "simple-mfd";
sram@8600000 {
compatible = "qcom,qcs404-imem", "syscon", "simple-mfd";
reg = <0x08600000 0x1000>;
#address-cells = <1>;

44
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
View File

@ -5,6 +5,7 @@
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
@ -59,6 +60,8 @@
user4 {
label = "green:user4";
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "panic-indicator";
default-state = "off";
@ -66,6 +69,8 @@
wlan {
label = "yellow:wlan";
function = LED_FUNCTION_WLAN;
color = <LED_COLOR_ID_YELLOW>;
gpios = <&pm8150_gpios 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tx";
default-state = "off";
@ -73,6 +78,8 @@
bt {
label = "blue:bt";
function = LED_FUNCTION_BLUETOOTH;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pm8150_gpios 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "bluetooth-power";
default-state = "off";
@ -796,7 +803,7 @@
"NC",
"PM3003A_MODE";
lt9611_rst_pin: lt9611-rst-pin {
lt9611_rst_pin: lt9611-rst-state {
pins = "gpio5";
function = "normal";
@ -806,6 +813,35 @@
};
};
&pm8150l_lpg {
status = "okay";
led@1 {
reg = <1>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_HEARTBEAT;
function-enumerator = <3>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_INDICATOR;
function-enumerator = <2>;
default-state = "on";
};
led@3 {
reg = <3>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_INDICATOR;
function-enumerator = <1>;
};
};
&pon_pwrkey {
status = "okay";
};
@ -830,7 +866,7 @@
&q6afedai {
qi2s@16 {
reg = <16>;
reg = <PRIMARY_MI2S_RX>;
qcom,sd-lines = <0 1 2 3>;
};
};
@ -838,7 +874,7 @@
/* TERT I2S Uses 1 I2S SD Lines for audio on LT9611 HDMI Bridge */
&q6afedai {
qi2s@20 {
reg = <20>;
reg = <TERTIARY_MI2S_RX>;
qcom,sd-lines = <0>;
};
};
@ -915,7 +951,7 @@
};
codec {
sound-dai = <&lt9611_codec 0>;
sound-dai = <&lt9611_codec 0>;
};
};

389
arch/arm64/boot/dts/qcom/sa8295p-adp.dts Normal file
View File

@ -0,0 +1,389 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022, Linaro Limited
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/spmi/spmi.h>
#include "sa8540p.dtsi"
/ {
model = "Qualcomm SA8295P ADP";
compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
aliases {
serial0 = &qup2_uart17;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&apps_rsc {
pmm8540-a-regulators {
compatible = "qcom,pm8150-rpmh-regulators";
qcom,pmic-id = "a";
vreg_l3a: ldo3 {
regulator-name = "vreg_l3a";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1208000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l5a: ldo5 {
regulator-name = "vreg_l5a";
regulator-min-microvolt = <912000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l7a: ldo7 {
regulator-name = "vreg_l7a";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l13a: ldo13 {
regulator-name = "vreg_l13a";
regulator-min-microvolt = <3072000>;
regulator-max-microvolt = <3072000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
};
pmm8540-c-regulators {
compatible = "qcom,pm8150-rpmh-regulators";
qcom,pmic-id = "c";
vreg_l1c: ldo1 {
regulator-name = "vreg_l1c";
regulator-min-microvolt = <912000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l2c: ldo2 {
regulator-name = "vreg_l2c";
regulator-min-microvolt = <3072000>;
regulator-max-microvolt = <3072000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l3c: ldo3 {
regulator-name = "vreg_l3c";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l4c: ldo4 {
regulator-name = "vreg_l4c";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1208000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l6c: ldo6 {
regulator-name = "vreg_l6c";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l7c: ldo7 {
regulator-name = "vreg_l7c";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l10c: ldo10 {
regulator-name = "vreg_l10c";
regulator-min-microvolt = <2504000>;
regulator-max-microvolt = <2504000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l17c: ldo17 {
regulator-name = "vreg_l17c";
regulator-min-microvolt = <2504000>;
regulator-max-microvolt = <2504000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
};
pmm8540-g-regulators {
compatible = "qcom,pm8150-rpmh-regulators";
qcom,pmic-id = "g";
vreg_l3g: ldo3 {
regulator-name = "vreg_l3g";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l7g: ldo7 {
regulator-name = "vreg_l7g";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
vreg_l8g: ldo8 {
regulator-name = "vreg_l8g";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
};
};
};
&qup2 {
status = "okay";
};
&qup2_uart17 {
compatible = "qcom,geni-debug-uart";
status = "okay";
};
&remoteproc_adsp {
firmware-name = "qcom/sa8540p/adsp.mbn";
status = "okay";
};
&remoteproc_nsp0 {
firmware-name = "qcom/sa8540p/cdsp.mbn";
status = "okay";
};
&remoteproc_nsp1 {
firmware-name = "qcom/sa8540p/cdsp1.mbn";
status = "okay";
};
&spmi_bus {
pm8450a: pmic@0 {
compatible = "qcom,pm8150", "qcom,spmi-pmic";
reg = <0x0 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8450a_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio";
reg = <0xc000>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pm8450c: pmic@4 {
compatible = "qcom,pm8150", "qcom,spmi-pmic";
reg = <0x4 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8450c_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio";
reg = <0xc000>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pm8450e: pmic@8 {
compatible = "qcom,pm8150", "qcom,spmi-pmic";
reg = <0x8 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8450e_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio";
reg = <0xc000>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pm8450g: pmic@c {
compatible = "qcom,pm8150", "qcom,spmi-pmic";
reg = <0xc SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm8450g_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio";
reg = <0xc000>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};
&ufs_mem_hc {
reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
vcc-supply = <&vreg_l17c>;
vcc-max-microamp = <800000>;
vccq-supply = <&vreg_l6c>;
vccq-max-microamp = <900000>;
status = "okay";
};
&ufs_mem_phy {
vdda-phy-supply = <&vreg_l8g>;
vdda-pll-supply = <&vreg_l3g>;
status = "okay";
};
&ufs_card_hc {
reset-gpios = <&tlmm 229 GPIO_ACTIVE_LOW>;
vcc-supply = <&vreg_l10c>;
vcc-max-microamp = <800000>;
vccq-supply = <&vreg_l3c>;
vccq-max-microamp = <900000>;
status = "okay";
};
&ufs_card_phy {
vdda-phy-supply = <&vreg_l8g>;
vdda-pll-supply = <&vreg_l3g>;
status = "okay";
};
&usb_0 {
status = "okay";
};
&usb_0_dwc3 {
/* TODO: Define USB-C connector properly */
dr_mode = "peripheral";
};
&usb_0_hsphy {
vdda-pll-supply = <&vreg_l5a>;
vdda18-supply = <&vreg_l7a>;
vdda33-supply = <&vreg_l13a>;
status = "okay";
};
&usb_0_qmpphy {
vdda-phy-supply = <&vreg_l3a>;
vdda-pll-supply = <&vreg_l5a>;
status = "okay";
};
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
/* TODO: Define USB-C connector properly */
dr_mode = "host";
};
&usb_1_hsphy {
vdda-pll-supply = <&vreg_l1c>;
vdda18-supply = <&vreg_l7c>;
vdda33-supply = <&vreg_l2c>;
status = "okay";
};
&usb_1_qmpphy {
vdda-phy-supply = <&vreg_l4c>;
vdda-pll-supply = <&vreg_l1c>;
status = "okay";
};
&usb_2_hsphy0 {
vdda-pll-supply = <&vreg_l5a>;
vdda18-supply = <&vreg_l7g>;
vdda33-supply = <&vreg_l13a>;
status = "okay";
};
&usb_2_hsphy1 {
vdda-pll-supply = <&vreg_l5a>;
vdda18-supply = <&vreg_l7g>;
vdda33-supply = <&vreg_l13a>;
status = "okay";
};
&usb_2_hsphy2 {
vdda-pll-supply = <&vreg_l5a>;
vdda18-supply = <&vreg_l7g>;
vdda33-supply = <&vreg_l13a>;
status = "okay";
};
&usb_2_hsphy3 {
vdda-pll-supply = <&vreg_l5a>;
vdda18-supply = <&vreg_l7g>;
vdda33-supply = <&vreg_l13a>;
status = "okay";
};
&usb_2_qmpphy0 {
vdda-phy-supply = <&vreg_l3a>;
vdda-pll-supply = <&vreg_l5a>;
status = "okay";
};
&usb_2_qmpphy1 {
vdda-phy-supply = <&vreg_l3a>;
vdda-pll-supply = <&vreg_l5a>;
status = "okay";
};
&xo_board_clk {
clock-frequency = <38400000>;
};
/* PINCTRL */

133
arch/arm64/boot/dts/qcom/sa8540p.dtsi Normal file
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@ -0,0 +1,133 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022, Linaro Limited
*/
#include "sc8280xp.dtsi"
/delete-node/ &cpu0_opp_table;
/delete-node/ &cpu4_opp_table;
/ {
cpu0_opp_table: cpu0-opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-403200000 {
opp-hz = /bits/ 64 <403200000>;
};
opp-499200000 {
opp-hz = /bits/ 64 <499200000>;
};
opp-595200000 {
opp-hz = /bits/ 64 <595200000>;
};
opp-710400000 {
opp-hz = /bits/ 64 <710400000>;
};
opp-806400000 {
opp-hz = /bits/ 64 <806400000>;
};
opp-902400000 {
opp-hz = /bits/ 64 <902400000>;
};
opp-1017600000 {
opp-hz = /bits/ 64 <1017600000>;
};
opp-1113600000 {
opp-hz = /bits/ 64 <1113600000>;
};
opp-1209600000 {
opp-hz = /bits/ 64 <1209600000>;
};
opp-1324800000 {
opp-hz = /bits/ 64 <1324800000>;
};
opp-1440000000 {
opp-hz = /bits/ 64 <1440000000>;
};
opp-1555200000 {
opp-hz = /bits/ 64 <1555200000>;
};
opp-1670400000 {
opp-hz = /bits/ 64 <1670400000>;
};
opp-1785600000 {
opp-hz = /bits/ 64 <1785600000>;
};
opp-1881600000 {
opp-hz = /bits/ 64 <1881600000>;
};
opp-2016000000 {
opp-hz = /bits/ 64 <2016000000>;
};
opp-2131200000 {
opp-hz = /bits/ 64 <2131200000>;
};
opp-2246400000 {
opp-hz = /bits/ 64 <2246400000>;
};
};
cpu4_opp_table: cpu4-opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-825600000 {
opp-hz = /bits/ 64 <825600000>;
};
opp-940800000 {
opp-hz = /bits/ 64 <940800000>;
};
opp-1056000000 {
opp-hz = /bits/ 64 <1056000000>;
};
opp-1171200000 {
opp-hz = /bits/ 64 <1171200000>;
};
opp-1286400000 {
opp-hz = /bits/ 64 <1286400000>;
};
opp-1401600000 {
opp-hz = /bits/ 64 <1401600000>;
};
opp-1516800000 {
opp-hz = /bits/ 64 <1516800000>;
};
opp-1632000000 {
opp-hz = /bits/ 64 <1632000000>;
};
opp-1747200000 {
opp-hz = /bits/ 64 <1747200000>;
};
opp-1862400000 {
opp-hz = /bits/ 64 <1862400000>;
};
opp-1977600000 {
opp-hz = /bits/ 64 <1977600000>;
};
opp-2073600000 {
opp-hz = /bits/ 64 <2073600000>;
};
opp-2169600000 {
opp-hz = /bits/ 64 <2169600000>;
};
opp-2284800000 {
opp-hz = /bits/ 64 <2284800000>;
};
opp-2380800000 {
opp-hz = /bits/ 64 <2380800000>;
};
opp-2496000000 {
opp-hz = /bits/ 64 <2496000000>;
};
opp-2592000000 {
opp-hz = /bits/ 64 <2592000000>;
};
};
};
&rpmhpd {
compatible = "qcom,sa8540p-rpmhpd";
};

5
arch/arm64/boot/dts/qcom/sc7180-idp.dts
View File

@ -330,6 +330,7 @@
&dsi_phy {
status = "okay";
vdds-supply = <&vreg_l4a_0p8>;
};
&mdp {
@ -389,7 +390,7 @@
pinctrl-names = "default","sleep";
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
vmmc-supply = <&vreg_l9c_2p9>;
vmmc-supply = <&vreg_l9c_2p9>;
vqmmc-supply = <&vreg_l6c_2p9>;
cd-gpios = <&tlmm 69 GPIO_ACTIVE_LOW>;
@ -467,7 +468,7 @@
/* PINCTRL - additions to nodes defined in sc7180.dtsi */
&pm6150l_gpio {
disp_pins: disp-pins {
disp_pins: disp-state {
pinconf {
pins = "gpio3";
function = PMIC_GPIO_FUNC_FUNC1;

4
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi
View File

@ -81,6 +81,10 @@
};
&cros_ec {
keyboard-controller {
compatible = "google,cros-ec-keyb-switches";
};
cros_ec_proximity: proximity {
compatible = "google,cros-ec-mkbp-proximity";
label = "proximity-wifi";

8
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi
View File

@ -5,7 +5,7 @@
* Copyright 2021 Google LLC.
*/
#include "sc7180-trogdor.dtsi"
/* This file must be included after sc7180-trogdor.dtsi */
/ {
/* BOARD-SPECIFIC TOP LEVEL NODES */
@ -114,6 +114,12 @@ ap_ts_pen_1v8: &i2c4 {
status = "okay";
};
&cros_ec {
keyboard-controller {
compatible = "google,cros-ec-keyb-switches";
};
};
&panel {
compatible = "samsung,atna33xc20";
enable-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;

44
arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown-r0.dts Normal file
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@ -0,0 +1,44 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Kingoftown board device tree source
*
* Copyright 2021 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
#include "sc7180-trogdor-kingoftown.dtsi"
/ {
model = "Google Kingoftown (rev0)";
compatible = "google,kingoftown-rev0", "qcom,sc7180";
};
/*
* In rev1+, the enable pin of pp3300_fp_tp will be tied to pp1800_l10a
* power rail instead, since kingoftown does not have FP.
*/
&pp3300_fp_tp {
gpio = <&tlmm 74 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&en_fp_rails>;
};
&tlmm {
en_fp_rails: en-fp-rails {
pinmux {
pins = "gpio74";
function = "gpio";
};
pinconf {
pins = "gpio74";
drive-strength = <2>;
bias-disable;
};
};
};

17
arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown-r1.dts Normal file
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@ -0,0 +1,17 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Kingoftown board device tree source
*
* Copyright 2021 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-parade-ps8640.dtsi"
#include "sc7180-trogdor-kingoftown.dtsi"
/ {
model = "Google Kingoftown (rev1+)";
compatible = "google,kingoftown", "qcom,sc7180";
};

225
arch/arm64/boot/dts/qcom/sc7180-trogdor-kingoftown.dtsi Normal file
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@ -0,0 +1,225 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Kingoftown board device tree source
*
* Copyright 2021 Google LLC.
*/
/* This file must be included after sc7180-trogdor.dtsi */
#include <arm/cros-ec-keyboard.dtsi>
#include "sc7180-trogdor-lte-sku.dtsi"
&alc5682 {
compatible = "realtek,rt5682s";
realtek,dmic1-clk-pin = <2>;
realtek,dmic-clk-rate-hz = <2048000>;
};
&ap_tp_i2c {
status = "okay";
};
ap_ts_pen_1v8: &i2c4 {
status = "okay";
clock-frequency = <400000>;
ap_ts: touchscreen@10 {
compatible = "elan,ekth3500";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
vcc33-supply = <&pp3300_ts>;
reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
};
};
&keyboard_controller {
function-row-physmap = <
MATRIX_KEY(0x00, 0x02, 0) /* T1 */
MATRIX_KEY(0x03, 0x02, 0) /* T2 */
MATRIX_KEY(0x02, 0x02, 0) /* T3 */
MATRIX_KEY(0x01, 0x02, 0) /* T4 */
MATRIX_KEY(0x03, 0x04, 0) /* T5 */
MATRIX_KEY(0x02, 0x04, 0) /* T6 */
MATRIX_KEY(0x01, 0x04, 0) /* T7 */
MATRIX_KEY(0x02, 0x09, 0) /* T8 */
MATRIX_KEY(0x01, 0x09, 0) /* T9 */
MATRIX_KEY(0x00, 0x04, 0) /* T10 */
>;
linux,keymap = <
MATRIX_KEY(0x00, 0x02, KEY_BACK)
MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
MATRIX_KEY(0x01, 0x02, KEY_SCALE)
MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
MATRIX_KEY(0x02, 0x09, KEY_MUTE)
MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
CROS_STD_MAIN_KEYMAP
>;
};
&panel {
compatible = "edp-panel";
};
&pp3300_dx_edp {
gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>;
};
&sound {
compatible = "google,sc7180-trogdor";
model = "sc7180-rt5682s-max98357a-1mic";
};
&wifi {
qcom,ath10k-calibration-variant = "GO_KINGOFTOWN";
};
/* PINCTRL - modifications to sc7180-trogdor.dtsi */
&en_pp3300_dx_edp {
pinmux {
pins = "gpio67";
};
pinconf {
pins = "gpio67";
};
};
/* PINCTRL - board-specific pinctrl */
&tlmm {
gpio-line-names = "TP_INT_L", /* 0 */
"AP_RAM_ID0",
"AP_SKU_ID2",
"AP_RAM_ID1",
"",
"AP_RAM_ID2",
"AP_TP_I2C_SDA",
"AP_TP_I2C_SCL",
"TS_RESET_L",
"TS_INT_L",
"", /* 10 */
"EDP_BRIJ_IRQ",
"AP_EDP_BKLTEN",
"",
"",
"EDP_BRIJ_I2C_SDA",
"EDP_BRIJ_I2C_SCL",
"HUB_RST_L",
"",
"",
"", /* 20 */
"",
"",
"AMP_EN",
"",
"",
"",
"",
"HP_IRQ",
"",
"", /* 30 */
"AP_BRD_ID2",
"BRIJ_SUSPEND",
"AP_BRD_ID0",
"AP_H1_SPI_MISO",
"AP_H1_SPI_MOSI",
"AP_H1_SPI_CLK",
"AP_H1_SPI_CS_L",
"BT_UART_CTS",
"BT_UART_RTS",
"BT_UART_TXD", /* 40 */
"BT_UART_RXD",
"H1_AP_INT_ODL",
"",
"UART_AP_TX_DBG_RX",
"UART_DBG_TX_AP_RX",
"HP_I2C_SDA",
"HP_I2C_SCL",
"FORCED_USB_BOOT",
"AMP_BCLK",
"AMP_LRCLK", /* 50 */
"AMP_DIN",
"",
"HP_BCLK",
"HP_LRCLK",
"HP_DOUT",
"HP_DIN",
"HP_MCLK",
"AP_SKU_ID0",
"AP_EC_SPI_MISO",
"AP_EC_SPI_MOSI", /* 60 */
"AP_EC_SPI_CLK",
"AP_EC_SPI_CS_L",
"AP_SPI_CLK",
"AP_SPI_MOSI",
"AP_SPI_MISO",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it BIOS_FLASH_WP_L.
*/
"AP_FLASH_WP_L",
"EN_PP3300_DX_EDP",
"AP_SPI_CS0_L",
"",
"", /* 70 */
"",
"",
"",
"EN_FP_RAILS",
"UIM2_DATA",
"UIM2_CLK",
"UIM2_RST",
"UIM2_PRESENT_L",
"UIM1_DATA",
"UIM1_CLK", /* 80 */
"UIM1_RST",
"",
"CODEC_PWR_EN",
"HUB_EN",
"",
"",
"",
"",
"",
"AP_SKU_ID1", /* 90 */
"AP_RST_REQ",
"",
"AP_BRD_ID1",
"AP_EC_INT_L",
"",
"",
"",
"",
"",
"", /* 100 */
"",
"",
"",
"EDP_BRIJ_EN",
"",
"",
"",
"",
"",
"", /* 110 */
"",
"",
"",
"",
"AP_TS_PEN_I2C_SDA",
"AP_TS_PEN_I2C_SCL",
"DP_HOT_PLUG_DET",
"EC_IN_RW_ODL";
};

3
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi
View File

@ -5,7 +5,8 @@
* Copyright 2020 Google LLC.
*/
#include "sc7180-trogdor.dtsi"
/* This file must be included after sc7180-trogdor.dtsi */
#include <arm/cros-ec-keyboard.dtsi>
&ap_sar_sensor {
semtech,cs0-ground;

22
arch/arm64/boot/dts/qcom/sc7180-trogdor-mrbland-rev0-auo.dts Normal file
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@ -0,0 +1,22 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Mrbland board device tree source
*
* Copyright 2021 Google LLC.
*
* SKU: 0x0 => 0
* - bits 7..4: Panel ID: 0x0 (AUO)
*/
/dts-v1/;
#include "sc7180-trogdor-mrbland-rev0.dtsi"
/ {
model = "Google Mrbland rev0 AUO panel board";
compatible = "google,mrbland-rev0-sku0", "qcom,sc7180";
};
&panel {
compatible = "auo,b101uan08.3";
};

22
arch/arm64/boot/dts/qcom/sc7180-trogdor-mrbland-rev0-boe.dts Normal file
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@ -0,0 +1,22 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Mrbland board device tree source
*
* Copyright 2021 Google LLC.
*
* SKU: 0x10 => 16
* - bits 7..4: Panel ID: 0x1 (BOE)
*/
/dts-v1/;
#include "sc7180-trogdor-mrbland-rev0.dtsi"
/ {
model = "Google Mrbland rev0 BOE panel board";
compatible = "google,mrbland-rev0-sku16", "qcom,sc7180";
};
&panel {
compatible = "boe,tv101wum-n53";
};

53
arch/arm64/boot/dts/qcom/sc7180-trogdor-mrbland-rev0.dtsi Normal file
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@ -0,0 +1,53 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Mrbland board device tree source
*
* Copyright 2021 Google LLC.
*
*/
/dts-v1/;
#include "sc7180-trogdor-mrbland.dtsi"
&avdd_lcd {
gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>;
};
&panel {
enable-gpios = <&tlmm 76 GPIO_ACTIVE_HIGH>;
};
&v1p8_mipi {
gpio = <&tlmm 81 GPIO_ACTIVE_HIGH>;
};
/* PINCTRL - modifications to sc7180-trogdor-mrbland.dtsi */
&avdd_lcd_en {
pinmux {
pins = "gpio80";
};
pinconf {
pins = "gpio80";
};
};
&mipi_1800_en {
pinmux {
pins = "gpio81";
};
pinconf {
pins = "gpio81";
};
};
&vdd_reset_1800 {
pinmux {
pins = "gpio76";
};
pinconf {
pins = "gpio76";
};
};

22
arch/arm64/boot/dts/qcom/sc7180-trogdor-mrbland-rev1-auo.dts Normal file
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@ -0,0 +1,22 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Mrbland board device tree source
*
* Copyright 2021 Google LLC.
*
* SKU: 0x600 => 1536
* - bits 11..8: Panel ID: 0x6 (AUO)
*/
/dts-v1/;
#include "sc7180-trogdor-mrbland.dtsi"
/ {
model = "Google Mrbland rev1+ AUO panel board";
compatible = "google,mrbland-sku1536", "qcom,sc7180";
};
&panel {
compatible = "auo,b101uan08.3";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Mrbland board device tree source
*
* Copyright 2021 Google LLC.
*
* SKU: 0x300 => 768
* - bits 11..8: Panel ID: 0x3 (BOE)
*/
/dts-v1/;
#include "sc7180-trogdor-mrbland.dtsi"
/ {
model = "Google Mrbland (rev1 - 2) BOE panel board";
/* Uses ID 768 on rev1 and 1024 on rev2+ */
compatible = "google,mrbland-sku1024", "google,mrbland-sku768",
"qcom,sc7180";
};
&panel {
compatible = "boe,tv101wum-n53";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Mrbland board device tree source
*
* Copyright 2021 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor.dtsi"
/* This board only has 1 USB Type-C port. */
/delete-node/ &usb_c1;
/ {
avdd_lcd: avdd-lcd {
compatible = "regulator-fixed";
regulator-name = "avdd_lcd";
gpio = <&tlmm 88 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&avdd_lcd_en>;
vin-supply = <&pp5000_a>;
};
avee_lcd: avee-lcd {
compatible = "regulator-fixed";
regulator-name = "avee_lcd";
gpio = <&tlmm 21 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&avee_lcd_en>;
vin-supply = <&pp5000_a>;
};
v1p8_mipi: v1p8-mipi {
compatible = "regulator-fixed";
regulator-name = "v1p8_mipi";
gpio = <&tlmm 86 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&mipi_1800_en>;
vin-supply = <&pp3300_a>;
};
};
&backlight {
pwms = <&cros_ec_pwm 0>;
};
&camcc {
status = "okay";
};
&cros_ec {
keyboard-controller {
compatible = "google,cros-ec-keyb-switches";
};
};
&dsi0 {
panel: panel@0 {
/* Compatible will be filled in per-board */
reg = <0>;
enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vdd_reset_1800>;
avdd-supply = <&avdd_lcd>;
avee-supply = <&avee_lcd>;
pp1800-supply = <&v1p8_mipi>;
pp3300-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
rotation = <270>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
};
};
ports {
port@1 {
endpoint {
remote-endpoint = <&panel_in>;
data-lanes = <0 1 2 3>;
};
};
};
};
&gpio_keys {
status = "okay";
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
ap_ts: touchscreen@5d {
compatible = "goodix,gt7375p";
reg = <0x5d>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
vdd-supply = <&pp3300_ts>;
};
};
&pp1800_uf_cam {
status = "okay";
};
&pp1800_wf_cam {
status = "okay";
};
&pp2800_uf_cam {
status = "okay";
};
&pp2800_wf_cam {
status = "okay";
};
&wifi {
qcom,ath10k-calibration-variant = "GO_MRBLAND";
};
/*
* No eDP on this board but it's logically the same signal so just give it
* a new name and assign the proper GPIO.
*/
pp3300_disp_on: &pp3300_dx_edp {
gpio = <&tlmm 85 GPIO_ACTIVE_HIGH>;
};
/* PINCTRL - modifications to sc7180-trogdor.dtsi */
/*
* No eDP on this board but it's logically the same signal so just give it
* a new name and assign the proper GPIO.
*/
tp_en: &en_pp3300_dx_edp {
pinmux {
pins = "gpio85";
};
pinconf {
pins = "gpio85";
};
};
/* PINCTRL - board-specific pinctrl */
&tlmm {
gpio-line-names = "HUB_RST_L",
"AP_RAM_ID0",
"AP_SKU_ID2",
"AP_RAM_ID1",
"",
"AP_RAM_ID2",
"UF_CAM_EN",
"WF_CAM_EN",
"TS_RESET_L",
"TS_INT_L",
"",
"",
"AP_EDP_BKLTEN",
"UF_CAM_MCLK",
"WF_CAM_CLK",
"",
"",
"UF_CAM_SDA",
"UF_CAM_SCL",
"WF_CAM_SDA",
"WF_CAM_SCL",
"AVEE_LCD_EN",
"",
"AMP_EN",
"",
"",
"",
"",
"HP_IRQ",
"WF_CAM_RST_L",
"UF_CAM_RST_L",
"AP_BRD_ID2",
"",
"AP_BRD_ID0",
"AP_H1_SPI_MISO",
"AP_H1_SPI_MOSI",
"AP_H1_SPI_CLK",
"AP_H1_SPI_CS_L",
"BT_UART_CTS",
"BT_UART_RTS",
"BT_UART_TXD",
"BT_UART_RXD",
"H1_AP_INT_ODL",
"",
"UART_AP_TX_DBG_RX",
"UART_DBG_TX_AP_RX",
"HP_I2C_SDA",
"HP_I2C_SCL",
"FORCED_USB_BOOT",
"AMP_BCLK",
"AMP_LRCLK",
"AMP_DIN",
"PEN_DET_ODL",
"HP_BCLK",
"HP_LRCLK",
"HP_DOUT",
"HP_DIN",
"HP_MCLK",
"AP_SKU_ID0",
"AP_EC_SPI_MISO",
"AP_EC_SPI_MOSI",
"AP_EC_SPI_CLK",
"AP_EC_SPI_CS_L",
"AP_SPI_CLK",
"AP_SPI_MOSI",
"AP_SPI_MISO",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it BIOS_FLASH_WP_L.
*/
"AP_FLASH_WP_L",
"",
"AP_SPI_CS0_L",
"",
"",
"",
"",
"WLAN_SW_CTRL",
"",
"REPORT_E",
"",
"ID0",
"",
"ID1",
"",
"",
"",
"CODEC_PWR_EN",
"HUB_EN",
"TP_EN",
"MIPI_1.8V_EN",
"VDD_RESET_1.8V",
"AVDD_LCD_EN",
"",
"AP_SKU_ID1",
"AP_RST_REQ",
"",
"AP_BRD_ID1",
"AP_EC_INT_L",
"SDM_GRFC_3",
"",
"",
"BOOT_CONFIG_4",
"BOOT_CONFIG_2",
"",
"",
"",
"",
"",
"",
"",
"BOOT_CONFIG_3",
"WCI2_LTE_COEX_TXD",
"WCI2_LTE_COEX_RXD",
"",
"",
"",
"",
"FORCED_USB_BOOT_POL",
"AP_TS_PEN_I2C_SDA",
"AP_TS_PEN_I2C_SCL",
"DP_HOT_PLUG_DET",
"EC_IN_RW_ODL";
avdd_lcd_en: avdd-lcd-en {
pinmux {
pins = "gpio88";
function = "gpio";
};
pinconf {
pins = "gpio88";
drive-strength = <2>;
bias-disable;
};
};
avee_lcd_en: avee-lcd-en {
pinmux {
pins = "gpio21";
function = "gpio";
};
pinconf {
pins = "gpio21";
drive-strength = <2>;
bias-disable;
};
};
mipi_1800_en: mipi-1800-en {
pinmux {
pins = "gpio86";
function = "gpio";
};
pinconf {
pins = "gpio86";
drive-strength = <2>;
bias-disable;
};
};
vdd_reset_1800: vdd-reset-1800 {
pinmux {
pins = "gpio87";
function = "gpio";
};
pinconf {
pins = "gpio87";
drive-strength = <2>;
bias-disable;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pazquel board device tree source
*
* Copyright 2021 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-parade-ps8640.dtsi"
#include "sc7180-trogdor-pazquel.dtsi"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google Pazquel (Parade,LTE)";
compatible = "google,pazquel-sku4", "qcom,sc7180";
};
&ap_sar_sensor_i2c {
status = "okay";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pazquel board device tree source
*
* Copyright 2021 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
#include "sc7180-trogdor-pazquel.dtsi"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google Pazquel (TI,LTE)";
compatible = "google,pazquel-sku0", "google,pazquel-sku2", "qcom,sc7180";
};
&ap_sar_sensor_i2c {
status = "okay";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pazquel board device tree source
*
* Copyright 2022 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-parade-ps8640.dtsi"
#include "sc7180-trogdor-pazquel.dtsi"
/ {
model = "Google Pazquel (Parade)";
compatible = "google,pazquel-sku5", "qcom,sc7180";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pazquel board device tree source
*
* Copyright 2021 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
#include "sc7180-trogdor-pazquel.dtsi"
/ {
model = "Google Pazquel (TI)";
compatible = "google,pazquel-sku1", "qcom,sc7180";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pazquel board device tree source
*
* Copyright 2021 Google LLC.
*/
/* This file must be included after sc7180-trogdor.dtsi */
#include <arm/cros-ec-keyboard.dtsi>
&ap_sar_sensor {
compatible = "semtech,sx9324";
semtech,ph0-pin = <1 3 3>;
semtech,ph1-pin = <3 1 3>;
semtech,ph2-pin = <1 3 3>;
semtech,ph3-pin = <0 0 0>;
semtech,ph01-resolution = <1024>;
semtech,ph23-resolution = <1024>;
semtech,startup-sensor = <1>;
semtech,ph01-proxraw-strength = <3>;
semtech,ph23-proxraw-strength = <1>;
semtech,avg-pos-strength = <128>;
semtech,input-analog-gain = <0>;
semtech,cs-idle-sleep = "gnd";
/delete-property/ svdd-supply;
vdd-supply = <&pp1800_prox>;
};
/delete-node/&trackpad;
&ap_tp_i2c {
status = "okay";
trackpad: trackpad@15 {
compatible = "hid-over-i2c";
reg = <0x15>;
pinctrl-names = "default";
pinctrl-0 = <&tp_int_odl>;
interrupt-parent = <&tlmm>;
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
vcc-supply = <&pp3300_fp_tp>;
post-power-on-delay-ms = <100>;
hid-descr-addr = <0x0001>;
wakeup-source;
};
};
&keyboard_controller {
function-row-physmap = <
MATRIX_KEY(0x00, 0x02, 0) /* T1 */
MATRIX_KEY(0x03, 0x02, 0) /* T2 */
MATRIX_KEY(0x02, 0x02, 0) /* T3 */
MATRIX_KEY(0x01, 0x02, 0) /* T4 */
MATRIX_KEY(0x03, 0x04, 0) /* T5 */
MATRIX_KEY(0x02, 0x04, 0) /* T6 */
MATRIX_KEY(0x01, 0x04, 0) /* T7 */
MATRIX_KEY(0x02, 0x09, 0) /* T8 */
MATRIX_KEY(0x01, 0x09, 0) /* T9 */
MATRIX_KEY(0x00, 0x04, 0) /* T10 */
>;
linux,keymap = <
MATRIX_KEY(0x00, 0x02, KEY_BACK)
MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
MATRIX_KEY(0x01, 0x02, KEY_SCALE)
MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
MATRIX_KEY(0x02, 0x09, KEY_MUTE)
MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
CROS_STD_MAIN_KEYMAP
>;
};
&panel {
compatible = "edp-panel";
};
&pp3300_dx_edp {
gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>;
};
&en_pp3300_dx_edp {
pinmux {
pins = "gpio67";
};
pinconf {
pins = "gpio67";
};
};
/* PINCTRL - board-specific pinctrl */
&tlmm {
gpio-line-names = "TP_INT_ODL",
"AP_RAM_ID0",
"AP_SKU_ID2",
"AP_RAM_ID1",
"",
"AP_RAM_ID2",
"AP_TP_I2C_SDA",
"AP_TP_I2C_SCL",
"TS_RESET_L",
"TS_INT_L",
"",
"EDP_BRIJ_IRQ",
"AP_EDP_BKLTEN",
"",
"",
"EDP_BRIJ_I2C_SDA",
"EDP_BRIJ_I2C_SCL",
"HUB_RST_L",
"",
"",
"",
"",
"",
"AMP_EN",
"P_SENSOR_INT_L",
"AP_SAR_SENSOR_SDA",
"AP_SAR_SENSOR_SCL",
"",
"HP_IRQ",
"",
"",
"AP_BRD_ID2",
"BRIJ_SUSPEND",
"AP_BRD_ID0",
"AP_H1_SPI_MISO",
"AP_H1_SPI_MOSI",
"AP_H1_SPI_CLK",
"AP_H1_SPI_CS_L",
"",
"",
"",
"",
"H1_AP_INT_ODL",
"",
"UART_AP_TX_DBG_RX",
"UART_DBG_TX_AP_RX",
"HP_I2C_SDA",
"HP_I2C_SCL",
"FORCED_USB_BOOT",
"AMP_BCLK",
"AMP_LRCLK",
"AMP_DIN",
"",
"HP_BCLK",
"HP_LRCLK",
"HP_DOUT",
"HP_DIN",
"HP_MCLK",
"AP_SKU_ID0",
"AP_EC_SPI_MISO",
"AP_EC_SPI_MOSI",
"AP_EC_SPI_CLK",
"AP_EC_SPI_CS_L",
"AP_SPI_CLK",
"AP_SPI_MOSI",
"AP_SPI_MISO",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it BIOS_FLASH_WP_L.
*/
"AP_FLASH_WP_L",
"EN_PP3300_DX_EDP",
"AP_SPI_CS0_L",
"",
"",
"",
"",
"",
"",
"UIM2_DATA",
"UIM2_CLK",
"UIM2_RST",
"UIM2_PRESENT",
"UIM1_DATA",
"UIM1_CLK",
"UIM1_RST",
"",
"CODEC_PWR_EN",
"HUB_EN",
"",
"",
"",
"",
"",
"AP_SKU_ID1",
"AP_RST_REQ",
"",
"AP_BRD_ID1",
"AP_EC_INT_L",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"EDP_BRIJ_EN",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"AP_TS_PEN_I2C_SDA",
"AP_TS_PEN_I2C_SCL",
"DP_HOT_PLUG_DET",
"EC_IN_RW_ODL";
};

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arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi
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*/
#include "sc7180-trogdor.dtsi"
/* Must come after sc7180-trogdor.dtsi to modify cros_ec */
#include <arm/cros-ec-keyboard.dtsi>
#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
/ {

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Quackingstick board device tree source
*
* Copyright 2021 Google LLC.
*
* SKU: 0x600 => 1536
* - bits 11..8: Panel ID: 0x6 (AUO)
*/
#include "sc7180-trogdor-quackingstick-r0.dts"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google Quackingstick (rev0+) with LTE";
compatible = "google,quackingstick-sku1536", "qcom,sc7180";
};
&ap_sar_sensor {
compatible = "semtech,sx9324";
semtech,ph0-pin = <3 1 3>;
semtech,ph1-pin = <2 1 2>;
semtech,ph2-pin = <3 3 1>;
semtech,ph3-pin = <1 3 3>;
semtech,ph01-resolution = <1024>;
semtech,ph23-resolution = <1024>;
semtech,startup-sensor = <1>;
semtech,ph01-proxraw-strength = <3>;
semtech,ph23-proxraw-strength = <3>;
semtech,avg-pos-strength = <256>;
/delete-property/ svdd-supply;
vdd-supply = <&pp1800_prox>;
};
&ap_sar_sensor_i2c {
status = "okay";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Quackingstick board device tree source
*
* Copyright 2021 Google LLC.
*
* SKU: 0x601 => 1537
* - bits 11..8: Panel ID: 0x6 (AUO)
*/
#include "sc7180-trogdor-quackingstick.dtsi"
/ {
model = "Google Quackingstick (rev0+)";
compatible = "google,quackingstick-sku1537", "qcom,sc7180";
};
&dsi_phy {
qcom,phy-rescode-offset-top = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>;
qcom,phy-rescode-offset-bot = /bits/ 8 <(-13) (-13) (-13) (-13) (-13)>;
qcom,phy-drive-ldo-level = <375>;
};
&panel {
compatible = "auo,b101uan08.3";
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Quackingstick board device tree source
*
* Copyright 2021 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor.dtsi"
/* This board only has 1 USB Type-C port. */
/delete-node/ &usb_c1;
/ {
ppvar_lcd: ppvar-lcd {
compatible = "regulator-fixed";
regulator-name = "ppvar_lcd";
gpio = <&tlmm 88 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&ppvar_lcd_en>;
vin-supply = <&pp5000_a>;
};
v1p8_disp: v1p8-disp {
compatible = "regulator-fixed";
regulator-name = "v1p8_disp";
gpio = <&tlmm 86 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&pp1800_disp_on>;
vin-supply = <&pp3300_a>;
};
};
&backlight {
pwms = <&cros_ec_pwm 0>;
};
&camcc {
status = "okay";
};
&cros_ec {
keyboard-controller {
compatible = "google,cros-ec-keyb-switches";
};
};
&dsi0 {
panel: panel@0 {
/* Compatible will be filled in per-board */
reg = <0>;
enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst>;
avdd-supply = <&ppvar_lcd>;
pp1800-supply = <&v1p8_disp>;
pp3300-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
rotation = <270>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
};
};
ports {
port@1 {
endpoint {
remote-endpoint = <&panel_in>;
data-lanes = <0 1 2 3>;
};
};
};
};
&gpio_keys {
status = "okay";
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
ap_ts: touchscreen@10 {
compatible = "hid-over-i2c";
reg = <0x10>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
post-power-on-delay-ms = <20>;
hid-descr-addr = <0x0001>;
vdd-supply = <&pp3300_ts>;
};
};
&sdhc_2 {
status = "okay";
};
&pp1800_uf_cam {
status = "okay";
};
&pp1800_wf_cam {
status = "okay";
};
&pp2800_uf_cam {
status = "okay";
};
&pp2800_wf_cam {
status = "okay";
};
/*
* No eDP on this board but it's logically the same signal so just give it
* a new name and assign the proper GPIO.
*/
pp3300_disp_on: &pp3300_dx_edp {
gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>;
};
/* PINCTRL - modifications to sc7180-trogdor.dtsi */
/*
* No eDP on this board but it's logically the same signal so just give it
* a new name and assign the proper GPIO.
*/
tp_en: &en_pp3300_dx_edp {
pinmux {
pins = "gpio67";
};
pinconf {
pins = "gpio67";
};
};
/* PINCTRL - board-specific pinctrl */
&tlmm {
gpio-line-names = "HUB_RST_L",
"AP_RAM_ID0",
"AP_SKU_ID2",
"AP_RAM_ID1",
"",
"AP_RAM_ID2",
"UF_CAM_EN",
"WF_CAM_EN",
"TS_RESET_L",
"TS_INT_L",
"",
"",
"AP_EDP_BKLTEN",
"UF_CAM_MCLK",
"WF_CAM_CLK",
"EDP_BRIJ_I2C_SDA",
"EDP_BRIJ_I2C_SCL",
"UF_CAM_SDA",
"UF_CAM_SCL",
"WF_CAM_SDA",
"WF_CAM_SCL",
"",
"",
"AMP_EN",
"P_SENSOR_INT_L",
"AP_SAR_SENSOR_SDA",
"AP_SAR_SENSOR_SCL",
"",
"HP_IRQ",
"WF_CAM_RST_L",
"UF_CAM_RST_L",
"AP_BRD_ID2",
"",
"AP_BRD_ID0",
"AP_H1_SPI_MISO",
"AP_H1_SPI_MOSI",
"AP_H1_SPI_CLK",
"AP_H1_SPI_CS_L",
"",
"",
"",
"",
"H1_AP_INT_ODL",
"",
"UART_AP_TX_DBG_RX",
"UART_DBG_TX_AP_RX",
"HP_I2C_SDA",
"HP_I2C_SCL",
"FORCED_USB_BOOT",
"",
"",
"AMP_DIN",
"PEN_DET_ODL",
"HP_BCLK",
"HP_LRCLK",
"HP_DOUT",
"HP_DIN",
"HP_MCLK",
"AP_SKU_ID0",
"AP_EC_SPI_MISO",
"AP_EC_SPI_MOSI",
"AP_EC_SPI_CLK",
"AP_EC_SPI_CS_L",
"AP_SPI_CLK",
"AP_SPI_MOSI",
"AP_SPI_MISO",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it BIOS_FLASH_WP_L.
*/
"AP_FLASH_WP_L",
"EN_PP3300_DX_EDP",
"AP_SPI_CS0_L",
"SD_CD_ODL",
"",
"",
"",
"",
"",
"UIM2_DATA",
"UIM2_CLK",
"UIM2_RST",
"UIM2_PRESENT_L",
"UIM1_DATA",
"UIM1_CLK",
"UIM1_RST",
"",
"CODEC_PWR_EN",
"HUB_EN",
"",
"PP1800_DISP_ON",
"LCD_RST",
"PPVAR_LCD_EN",
"",
"AP_SKU_ID1",
"AP_RST_REQ",
"",
"AP_BRD_ID1",
"AP_EC_INT_L",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"AP_TS_I2C_SDA",
"AP_TS_I2C_SCL",
"DP_HOT_PLUG_DET",
"EC_IN_RW_ODL";
lcd_rst: lcd-rst {
pinmux {
pins = "gpio87";
function = "gpio";
};
pinconf {
pins = "gpio87";
drive-strength = <2>;
bias-disable;
};
};
ppvar_lcd_en: ppvar-lcd-en {
pinmux {
pins = "gpio88";
function = "gpio";
};
pinconf {
pins = "gpio88";
drive-strength = <2>;
bias-disable;
};
};
pp1800_disp_on: pp1800-disp-on {
pinmux {
pins = "gpio86";
function = "gpio";
};
pinconf {
pins = "gpio86";
drive-strength = <2>;
bias-disable;
};
};
};

2
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts
View File

@ -8,6 +8,8 @@
/dts-v1/;
#include "sc7180-trogdor.dtsi"
/* Must come after sc7180-trogdor.dtsi to modify cros_ec */
#include <arm/cros-ec-keyboard.dtsi>
#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
/ {

22
arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler-rev0-boe.dts Normal file
View File

@ -0,0 +1,22 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Wormdingler board device tree source
*
* Copyright 2021 Google LLC.
*
* SKU: 0x10 => 16
* - bits 7..4: Panel ID: 0x1 (BOE)
*/
/dts-v1/;
#include "sc7180-trogdor-wormdingler-rev0.dtsi"
/ {
model = "Google Wormdingler rev0 BOE panel board";
compatible = "google,wormdingler-rev0-sku16", "qcom,sc7180";
};
&panel {
compatible = "boe,tv110c9m-ll3";
};

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