Merge branch 'renesas-r8a7740' into renesas-armadillo

* renesas-r8a7740:
  ARM: shmobile: use common DMAEngine definitions on r8a7740
  ARM: shmobile: r8a7740: add DMAEngine support for USB
  ARM: shmobile: r8a7740: add DMAEngine support for SDHI
  ARM: shmobile: r8a7740: add DMAEngine support for FSI
  ARM: shmobile: add common DMAEngine definitions
  ARM: shmobile: add common extra gpio functions
This commit is contained in:
Rafael J. Wysocki 2012-06-30 15:24:35 +02:00
commit e01fa821b8
5 changed files with 414 additions and 1 deletions

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@ -463,6 +463,7 @@ enum {
MSTP230, MSTP230,
MSTP222, MSTP222,
MSTP218, MSTP217, MSTP216, MSTP214,
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
MSTP329, MSTP328, MSTP323, MSTP320, MSTP329, MSTP328, MSTP323, MSTP320,
@ -485,6 +486,10 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP230] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 30, 0), /* SCIFA6 */ [MSTP230] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 30, 0), /* SCIFA6 */
[MSTP222] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 22, 0), /* SCIFA7 */ [MSTP222] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 22, 0), /* SCIFA7 */
[MSTP218] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC1 */
[MSTP217] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* DMAC2 */
[MSTP216] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 16, 0), /* DMAC3 */
[MSTP214] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 14, 0), /* USBDMAC */
[MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
[MSTP206] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ [MSTP206] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
[MSTP204] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ [MSTP204] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
@ -563,7 +568,10 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]),
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]),
CLKDEV_DEV_ID("sh-dma-engine.3", &mstp_clks[MSTP214]),
CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]),
CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]),
CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]),
CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP222]), CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP222]),
CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]), CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]),

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@ -0,0 +1,84 @@
/*
* SH-ARM CPU-specific DMA definitions, used by both DMA drivers
*
* Copyright (C) 2012 Renesas Solutions Corp
*
* Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
*
* Based on arch/sh/include/cpu-sh4/cpu/dma-register.h
* Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef DMA_REGISTER_H
#define DMA_REGISTER_H
/*
* Direct Memory Access Controller
*/
/* Transmit sizes and respective CHCR register values */
enum {
XMIT_SZ_8BIT = 0,
XMIT_SZ_16BIT = 1,
XMIT_SZ_32BIT = 2,
XMIT_SZ_64BIT = 7,
XMIT_SZ_128BIT = 3,
XMIT_SZ_256BIT = 4,
XMIT_SZ_512BIT = 5,
};
/* log2(size / 8) - used to calculate number of transfers */
static const unsigned int dma_ts_shift[] = {
[XMIT_SZ_8BIT] = 0,
[XMIT_SZ_16BIT] = 1,
[XMIT_SZ_32BIT] = 2,
[XMIT_SZ_64BIT] = 3,
[XMIT_SZ_128BIT] = 4,
[XMIT_SZ_256BIT] = 5,
[XMIT_SZ_512BIT] = 6,
};
#define TS_LOW_BIT 0x3 /* --xx */
#define TS_HI_BIT 0xc /* xx-- */
#define TS_LOW_SHIFT (3)
#define TS_HI_SHIFT (20 - 2) /* 2 bits for shifted low TS */
#define TS_INDEX2VAL(i) \
((((i) & TS_LOW_BIT) << TS_LOW_SHIFT) |\
(((i) & TS_HI_BIT) << TS_HI_SHIFT))
#define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL((xmit_sz)))
#define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL((xmit_sz)))
/*
* USB High-Speed DMAC
*/
/* Transmit sizes and respective CHCR register values */
enum {
USBTS_XMIT_SZ_8BYTE = 0,
USBTS_XMIT_SZ_16BYTE = 1,
USBTS_XMIT_SZ_32BYTE = 2,
};
/* log2(size / 8) - used to calculate number of transfers */
static const unsigned int dma_usbts_shift[] = {
[USBTS_XMIT_SZ_8BYTE] = 3,
[USBTS_XMIT_SZ_16BYTE] = 4,
[USBTS_XMIT_SZ_32BYTE] = 5,
};
#define USBTS_LOW_BIT 0x3 /* --xx */
#define USBTS_HI_BIT 0x0 /* ---- */
#define USBTS_LOW_SHIFT 6
#define USBTS_HI_SHIFT 0
#define USBTS_INDEX2VAL(i) (((i) & 3) << 6)
#endif /* DMA_REGISTER_H */

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@ -13,6 +13,7 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/errno.h> #include <linux/errno.h>
#include <linux/sh_pfc.h> #include <linux/sh_pfc.h>
#include <linux/io.h>
#ifdef CONFIG_GPIOLIB #ifdef CONFIG_GPIOLIB
@ -27,4 +28,35 @@ static inline int irq_to_gpio(unsigned int irq)
#endif /* CONFIG_GPIOLIB */ #endif /* CONFIG_GPIOLIB */
/*
* FIXME !!
*
* current gpio frame work doesn't have
* the method to control only pull up/down/free.
* this function should be replaced by correct gpio function
*/
static inline void __init gpio_direction_none(u32 addr)
{
__raw_writeb(0x00, addr);
}
static inline void __init gpio_request_pullup(u32 addr)
{
u8 data = __raw_readb(addr);
data &= 0x0F;
data |= 0xC0;
__raw_writeb(data, addr);
}
static inline void __init gpio_request_pulldown(u32 addr)
{
u8 data = __raw_readb(addr);
data &= 0x0F;
data |= 0xA0;
__raw_writeb(data, addr);
}
#endif /* __ASM_ARCH_GPIO_H */ #endif /* __ASM_ARCH_GPIO_H */

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@ -588,4 +588,20 @@ enum {
GPIO_FN_TRACEAUD_FROM_MEMC, GPIO_FN_TRACEAUD_FROM_MEMC,
}; };
/* DMA slave IDs */
enum {
SHDMA_SLAVE_INVALID,
SHDMA_SLAVE_SDHI0_RX,
SHDMA_SLAVE_SDHI0_TX,
SHDMA_SLAVE_SDHI1_RX,
SHDMA_SLAVE_SDHI1_TX,
SHDMA_SLAVE_SDHI2_RX,
SHDMA_SLAVE_SDHI2_TX,
SHDMA_SLAVE_FSIA_RX,
SHDMA_SLAVE_FSIA_TX,
SHDMA_SLAVE_FSIB_TX,
SHDMA_SLAVE_USBHS_TX,
SHDMA_SLAVE_USBHS_RX,
};
#endif /* __ASM_R8A7740_H__ */ #endif /* __ASM_R8A7740_H__ */

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@ -24,7 +24,10 @@
#include <linux/io.h> #include <linux/io.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/serial_sci.h> #include <linux/serial_sci.h>
#include <linux/sh_dma.h>
#include <linux/sh_timer.h> #include <linux/sh_timer.h>
#include <linux/dma-mapping.h>
#include <mach/dma-register.h>
#include <mach/r8a7740.h> #include <mach/r8a7740.h>
#include <mach/common.h> #include <mach/common.h>
#include <mach/irqs.h> #include <mach/irqs.h>
@ -276,6 +279,272 @@ static struct platform_device *r8a7740_early_devices[] __initdata = {
&cmt10_device, &cmt10_device,
}; };
/* DMA */
static const struct sh_dmae_slave_config r8a7740_dmae_slaves[] = {
{
.slave_id = SHDMA_SLAVE_SDHI0_TX,
.addr = 0xe6850030,
.chcr = CHCR_TX(XMIT_SZ_16BIT),
.mid_rid = 0xc1,
}, {
.slave_id = SHDMA_SLAVE_SDHI0_RX,
.addr = 0xe6850030,
.chcr = CHCR_RX(XMIT_SZ_16BIT),
.mid_rid = 0xc2,
}, {
.slave_id = SHDMA_SLAVE_SDHI1_TX,
.addr = 0xe6860030,
.chcr = CHCR_TX(XMIT_SZ_16BIT),
.mid_rid = 0xc9,
}, {
.slave_id = SHDMA_SLAVE_SDHI1_RX,
.addr = 0xe6860030,
.chcr = CHCR_RX(XMIT_SZ_16BIT),
.mid_rid = 0xca,
}, {
.slave_id = SHDMA_SLAVE_SDHI2_TX,
.addr = 0xe6870030,
.chcr = CHCR_TX(XMIT_SZ_16BIT),
.mid_rid = 0xcd,
}, {
.slave_id = SHDMA_SLAVE_SDHI2_RX,
.addr = 0xe6870030,
.chcr = CHCR_RX(XMIT_SZ_16BIT),
.mid_rid = 0xce,
}, {
.slave_id = SHDMA_SLAVE_FSIA_TX,
.addr = 0xfe1f0024,
.chcr = CHCR_TX(XMIT_SZ_32BIT),
.mid_rid = 0xb1,
}, {
.slave_id = SHDMA_SLAVE_FSIA_RX,
.addr = 0xfe1f0020,
.chcr = CHCR_RX(XMIT_SZ_32BIT),
.mid_rid = 0xb2,
}, {
.slave_id = SHDMA_SLAVE_FSIB_TX,
.addr = 0xfe1f0064,
.chcr = CHCR_TX(XMIT_SZ_32BIT),
.mid_rid = 0xb5,
},
};
#define DMA_CHANNEL(a, b, c) \
{ \
.offset = a, \
.dmars = b, \
.dmars_bit = c, \
.chclr_offset = (0x220 - 0x20) + a \
}
static const struct sh_dmae_channel r8a7740_dmae_channels[] = {
DMA_CHANNEL(0x00, 0, 0),
DMA_CHANNEL(0x10, 0, 8),
DMA_CHANNEL(0x20, 4, 0),
DMA_CHANNEL(0x30, 4, 8),
DMA_CHANNEL(0x50, 8, 0),
DMA_CHANNEL(0x60, 8, 8),
};
static struct sh_dmae_pdata dma_platform_data = {
.slave = r8a7740_dmae_slaves,
.slave_num = ARRAY_SIZE(r8a7740_dmae_slaves),
.channel = r8a7740_dmae_channels,
.channel_num = ARRAY_SIZE(r8a7740_dmae_channels),
.ts_low_shift = TS_LOW_SHIFT,
.ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
.ts_high_shift = TS_HI_SHIFT,
.ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
.ts_shift = dma_ts_shift,
.ts_shift_num = ARRAY_SIZE(dma_ts_shift),
.dmaor_init = DMAOR_DME,
.chclr_present = 1,
};
/* Resource order important! */
static struct resource r8a7740_dmae0_resources[] = {
{
/* Channel registers and DMAOR */
.start = 0xfe008020,
.end = 0xfe00828f,
.flags = IORESOURCE_MEM,
},
{
/* DMARSx */
.start = 0xfe009000,
.end = 0xfe00900b,
.flags = IORESOURCE_MEM,
},
{
.name = "error_irq",
.start = evt2irq(0x20c0),
.end = evt2irq(0x20c0),
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 0-5 */
.start = evt2irq(0x2000),
.end = evt2irq(0x20a0),
.flags = IORESOURCE_IRQ,
},
};
/* Resource order important! */
static struct resource r8a7740_dmae1_resources[] = {
{
/* Channel registers and DMAOR */
.start = 0xfe018020,
.end = 0xfe01828f,
.flags = IORESOURCE_MEM,
},
{
/* DMARSx */
.start = 0xfe019000,
.end = 0xfe01900b,
.flags = IORESOURCE_MEM,
},
{
.name = "error_irq",
.start = evt2irq(0x21c0),
.end = evt2irq(0x21c0),
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 0-5 */
.start = evt2irq(0x2100),
.end = evt2irq(0x21a0),
.flags = IORESOURCE_IRQ,
},
};
/* Resource order important! */
static struct resource r8a7740_dmae2_resources[] = {
{
/* Channel registers and DMAOR */
.start = 0xfe028020,
.end = 0xfe02828f,
.flags = IORESOURCE_MEM,
},
{
/* DMARSx */
.start = 0xfe029000,
.end = 0xfe02900b,
.flags = IORESOURCE_MEM,
},
{
.name = "error_irq",
.start = evt2irq(0x22c0),
.end = evt2irq(0x22c0),
.flags = IORESOURCE_IRQ,
},
{
/* IRQ for channels 0-5 */
.start = evt2irq(0x2200),
.end = evt2irq(0x22a0),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device dma0_device = {
.name = "sh-dma-engine",
.id = 0,
.resource = r8a7740_dmae0_resources,
.num_resources = ARRAY_SIZE(r8a7740_dmae0_resources),
.dev = {
.platform_data = &dma_platform_data,
},
};
static struct platform_device dma1_device = {
.name = "sh-dma-engine",
.id = 1,
.resource = r8a7740_dmae1_resources,
.num_resources = ARRAY_SIZE(r8a7740_dmae1_resources),
.dev = {
.platform_data = &dma_platform_data,
},
};
static struct platform_device dma2_device = {
.name = "sh-dma-engine",
.id = 2,
.resource = r8a7740_dmae2_resources,
.num_resources = ARRAY_SIZE(r8a7740_dmae2_resources),
.dev = {
.platform_data = &dma_platform_data,
},
};
/* USB-DMAC */
static const struct sh_dmae_channel r8a7740_usb_dma_channels[] = {
{
.offset = 0,
}, {
.offset = 0x20,
},
};
static const struct sh_dmae_slave_config r8a7740_usb_dma_slaves[] = {
{
.slave_id = SHDMA_SLAVE_USBHS_TX,
.chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
}, {
.slave_id = SHDMA_SLAVE_USBHS_RX,
.chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
},
};
static struct sh_dmae_pdata usb_dma_platform_data = {
.slave = r8a7740_usb_dma_slaves,
.slave_num = ARRAY_SIZE(r8a7740_usb_dma_slaves),
.channel = r8a7740_usb_dma_channels,
.channel_num = ARRAY_SIZE(r8a7740_usb_dma_channels),
.ts_low_shift = USBTS_LOW_SHIFT,
.ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT,
.ts_high_shift = USBTS_HI_SHIFT,
.ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT,
.ts_shift = dma_usbts_shift,
.ts_shift_num = ARRAY_SIZE(dma_usbts_shift),
.dmaor_init = DMAOR_DME,
.chcr_offset = 0x14,
.chcr_ie_bit = 1 << 5,
.dmaor_is_32bit = 1,
.needs_tend_set = 1,
.no_dmars = 1,
.slave_only = 1,
};
static struct resource r8a7740_usb_dma_resources[] = {
{
/* Channel registers and DMAOR */
.start = 0xe68a0020,
.end = 0xe68a0064 - 1,
.flags = IORESOURCE_MEM,
},
{
/* VCR/SWR/DMICR */
.start = 0xe68a0000,
.end = 0xe68a0014 - 1,
.flags = IORESOURCE_MEM,
},
{
/* IRQ for channels */
.start = evt2irq(0x0a00),
.end = evt2irq(0x0a00),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device usb_dma_device = {
.name = "sh-dma-engine",
.id = 3,
.resource = r8a7740_usb_dma_resources,
.num_resources = ARRAY_SIZE(r8a7740_usb_dma_resources),
.dev = {
.platform_data = &usb_dma_platform_data,
},
};
/* I2C */ /* I2C */
static struct resource i2c0_resources[] = { static struct resource i2c0_resources[] = {
[0] = { [0] = {
@ -322,6 +591,10 @@ static struct platform_device i2c1_device = {
static struct platform_device *r8a7740_late_devices[] __initdata = { static struct platform_device *r8a7740_late_devices[] __initdata = {
&i2c0_device, &i2c0_device,
&i2c1_device, &i2c1_device,
&dma0_device,
&dma1_device,
&dma2_device,
&usb_dma_device,
}; };
/* /*