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Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Browse Source 
Pull i2c fixes from Wolfram Sang:
 "Some driver updates, a MAINTAINERS fix, and additions to COMPILE_TEST
  (so we won't miss build problems again)"

* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  MAINTAINERS: remove duplicate entry for i2c-qcom-geni
  i2c: brcmstb: fix support for DSL and CM variants
  i2c: qup: allow COMPILE_TEST
  i2c: imx: allow COMPILE_TEST
  i2c: cadence: allow COMPILE_TEST
  i2c: qcom-cci: don't put a device tree node before i2c_add_adapter()
  i2c: qcom-cci: don't delete an unregistered adapter
  i2c: bcm2835: Avoid clock stretching timeouts
This commit is contained in:
Linus Torvalds 2022-02-20 11:23:48 -08:00
commit dacec3e7b9
5 changed files with 26 additions and 17 deletions
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8
MAINTAINERS
View File

@ -16008,14 +16008,6 @@ F: Documentation/devicetree/bindings/misc/qcom,fastrpc.txt
F: drivers/misc/fastrpc.c F: drivers/misc/fastrpc.c
F: include/uapi/misc/fastrpc.h F: include/uapi/misc/fastrpc.h
QUALCOMM GENERIC INTERFACE I2C DRIVER
M: Akash Asthana <akashast@codeaurora.org>
M: Mukesh Savaliya <msavaliy@codeaurora.org>
L: linux-i2c@vger.kernel.org
L: linux-arm-msm@vger.kernel.org
S: Supported
F: drivers/i2c/busses/i2c-qcom-geni.c
QUALCOMM HEXAGON ARCHITECTURE QUALCOMM HEXAGON ARCHITECTURE
M: Brian Cain <bcain@codeaurora.org> M: Brian Cain <bcain@codeaurora.org>
L: linux-hexagon@vger.kernel.org L: linux-hexagon@vger.kernel.org

6
drivers/i2c/busses/Kconfig
View File

@ -488,7 +488,7 @@ config I2C_BRCMSTB
config I2C_CADENCE config I2C_CADENCE
tristate "Cadence I2C Controller" tristate "Cadence I2C Controller"
depends on ARCH_ZYNQ || ARM64 || XTENSA depends on ARCH_ZYNQ || ARM64 || XTENSA || COMPILE_TEST
help help
Say yes here to select Cadence I2C Host Controller. This controller is Say yes here to select Cadence I2C Host Controller. This controller is
e.g. used by Xilinx Zynq. e.g. used by Xilinx Zynq.
@ -680,7 +680,7 @@ config I2C_IMG
config I2C_IMX config I2C_IMX
tristate "IMX I2C interface" tristate "IMX I2C interface"
depends on ARCH_MXC || ARCH_LAYERSCAPE || COLDFIRE depends on ARCH_MXC || ARCH_LAYERSCAPE || COLDFIRE || COMPILE_TEST
select I2C_SLAVE select I2C_SLAVE
help help
Say Y here if you want to use the IIC bus controller on Say Y here if you want to use the IIC bus controller on
@ -935,7 +935,7 @@ config I2C_QCOM_GENI
config I2C_QUP config I2C_QUP
tristate "Qualcomm QUP based I2C controller" tristate "Qualcomm QUP based I2C controller"
depends on ARCH_QCOM depends on ARCH_QCOM || COMPILE_TEST
help help
If you say yes to this option, support will be included for the If you say yes to this option, support will be included for the
built-in I2C interface on the Qualcomm SoCs. built-in I2C interface on the Qualcomm SoCs.

11
drivers/i2c/busses/i2c-bcm2835.c
View File

@ -23,6 +23,11 @@
#define BCM2835_I2C_FIFO 0x10 #define BCM2835_I2C_FIFO 0x10
#define BCM2835_I2C_DIV 0x14 #define BCM2835_I2C_DIV 0x14
#define BCM2835_I2C_DEL 0x18 #define BCM2835_I2C_DEL 0x18
/*
* 16-bit field for the number of SCL cycles to wait after rising SCL
* before deciding the slave is not responding. 0 disables the
* timeout detection.
*/
#define BCM2835_I2C_CLKT 0x1c #define BCM2835_I2C_CLKT 0x1c
#define BCM2835_I2C_C_READ BIT(0) #define BCM2835_I2C_C_READ BIT(0)
@ -474,6 +479,12 @@ static int bcm2835_i2c_probe(struct platform_device *pdev)
adap->dev.of_node = pdev->dev.of_node; adap->dev.of_node = pdev->dev.of_node;
adap->quirks = of_device_get_match_data(&pdev->dev); adap->quirks = of_device_get_match_data(&pdev->dev);
/*
* Disable the hardware clock stretching timeout. SMBUS
* specifies a limit for how long the device can stretch the
* clock, but core I2C doesn't.
*/
bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_CLKT, 0);
bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, 0); bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, 0);
ret = i2c_add_adapter(adap); ret = i2c_add_adapter(adap);

2
drivers/i2c/busses/i2c-brcmstb.c
View File

@ -673,7 +673,7 @@ static int brcmstb_i2c_probe(struct platform_device *pdev)
/* set the data in/out register size for compatible SoCs */ /* set the data in/out register size for compatible SoCs */
if (of_device_is_compatible(dev->device->of_node, if (of_device_is_compatible(dev->device->of_node,
"brcmstb,brcmper-i2c")) "brcm,brcmper-i2c"))
dev->data_regsz = sizeof(u8); dev->data_regsz = sizeof(u8);
else else
dev->data_regsz = sizeof(u32); dev->data_regsz = sizeof(u32);

16
drivers/i2c/busses/i2c-qcom-cci.c
View File

@ -558,7 +558,7 @@ static int cci_probe(struct platform_device *pdev)
cci->master[idx].adap.quirks = &cci->data->quirks; cci->master[idx].adap.quirks = &cci->data->quirks;
cci->master[idx].adap.algo = &cci_algo; cci->master[idx].adap.algo = &cci_algo;
cci->master[idx].adap.dev.parent = dev; cci->master[idx].adap.dev.parent = dev;
cci->master[idx].adap.dev.of_node = child; cci->master[idx].adap.dev.of_node = of_node_get(child);
cci->master[idx].master = idx; cci->master[idx].master = idx;
cci->master[idx].cci = cci; cci->master[idx].cci = cci;
@ -643,8 +643,10 @@ static int cci_probe(struct platform_device *pdev)
continue; continue;
ret = i2c_add_adapter(&cci->master[i].adap); ret = i2c_add_adapter(&cci->master[i].adap);
if (ret < 0) if (ret < 0) {
of_node_put(cci->master[i].adap.dev.of_node);
goto error_i2c; goto error_i2c;
}
} }
pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC); pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
@ -655,9 +657,11 @@ static int cci_probe(struct platform_device *pdev)
return 0; return 0;
error_i2c: error_i2c:
for (; i >= 0; i--) { for (--i ; i >= 0; i--) {
if (cci->master[i].cci) if (cci->master[i].cci) {
i2c_del_adapter(&cci->master[i].adap); i2c_del_adapter(&cci->master[i].adap);
of_node_put(cci->master[i].adap.dev.of_node);
}
} }
error: error:
disable_irq(cci->irq); disable_irq(cci->irq);
@ -673,8 +677,10 @@ static int cci_remove(struct platform_device *pdev)
int i; int i;
for (i = 0; i < cci->data->num_masters; i++) { for (i = 0; i < cci->data->num_masters; i++) {
if (cci->master[i].cci) if (cci->master[i].cci) {
i2c_del_adapter(&cci->master[i].adap); i2c_del_adapter(&cci->master[i].adap);
of_node_put(cci->master[i].adap.dev.of_node);
}
cci_halt(cci, i); cci_halt(cci, i);
} }