forked from Minki/linux
PCI: Make PCI_SCAN_ALL_PCIE_DEVS work for Root as well as Downstream Ports
PCIe Downstream Ports normally have only a Device 0 below them. To optimize enumeration, we don't scan for other devices *unless* the PCI_SCAN_ALL_PCIE_DEVS flag is set by set by quirks or the "pci=pcie_scan_all" kernel parameter. Previously PCI_SCAN_ALL_PCIE_DEVS only affected scanning below Switch Downstream Ports, not Root Ports. But the "Nemo" system, also known as the AmigaOne X1000, has a PA Semi Root Port whose link leads to an AMD/ATI SB600 South Bridge. The Root Port is a PCIe device, of course, but the SB600 contains only conventional PCI devices with no visible PCIe port. Simplify and restructure only_one_child() so that we scan for all possible devices below Root Ports as well as Switch Downstream Ports when PCI_SCAN_ALL_PCIE_DEVS is set. This is enough to make Nemo work with "pci=pcie_scan_all". We would also like to add a quirk to set PCI_SCAN_ALL_PCIE_DEVS automatically on Nemo so users wouldn't have to use the "pci=pcie_scan_all" parameter, but we don't have that yet. Link: https://lkml.kernel.org/r/CAErSpo55Q8Q=5p6_+uu7ahnw+53ibVDNRXxrzRV9QnUr_9EUfw@mail.gmail.com Link: https://bugzilla.kernel.org/show_bug.cgi?id=198057 Reported-and-Tested-by: Christian Zigotzky <chzigotzky@xenosoft.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -2215,22 +2215,27 @@ static unsigned next_fn(struct pci_bus *bus, struct pci_dev *dev, unsigned fn)
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static int only_one_child(struct pci_bus *bus)
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{
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struct pci_dev *parent = bus->self;
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if (!parent || !pci_is_pcie(parent))
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return 0;
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if (pci_pcie_type(parent) == PCI_EXP_TYPE_ROOT_PORT)
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return 1;
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struct pci_dev *bridge = bus->self;
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/*
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* PCIe downstream ports are bridges that normally lead to only a
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* device 0, but if PCI_SCAN_ALL_PCIE_DEVS is set, scan all
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* possible devices, not just device 0. See PCIe spec r3.0,
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* sec 7.3.1.
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* Systems with unusual topologies set PCI_SCAN_ALL_PCIE_DEVS so
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* we scan for all possible devices, not just Device 0.
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*/
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if (parent->has_secondary_link &&
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!pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
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if (pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
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return 0;
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/*
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* A PCIe Downstream Port normally leads to a Link with only Device
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* 0 on it (PCIe spec r3.1, sec 7.3.1). As an optimization, scan
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* only for Device 0 in that situation.
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*
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* Checking has_secondary_link is a hack to identify Downstream
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* Ports because sometimes Switches are configured such that the
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* PCIe Port Type labels are backwards.
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*/
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if (bridge && pci_is_pcie(bridge) && bridge->has_secondary_link)
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return 1;
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return 0;
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}
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