arm64: tegra: Device tree changes for v5.7-rc1

These changes add support for the XUSB pad controller, as well as the
 XUSB controller on Tegra194. Furthermore, USB device mode is supported
 across Tegra210 and Tegra186 boards. PCIe endpoint mode support is added
 for the Jetson AGX Xavier platform.
 
 Various minor fixes eliminate warnings on boot related to missing power
 supplies for some devices.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl5rt44THHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoTfVEACt1PCoVRfvnb+zPao7jLLCBoerHWJw
 L1Jlo6EVfUON75HxESta92TYMCUmpUo5g+qCW2n+j5MCdJE7Egt61be+X0ezWlKY
 cYGLaYDKF/z9pdp7UwXjPJkXxB1qVN2V2tdOlyz/XrARjjRVgwIfFb5QUTBvmlwN
 5vO3O87bRUdYkeOWyyuzsBzXFudGx6YY6pxUc4uzyX0UP0+y+aUyCe26PNZPGjUW
 bj1Lka6sJW0qFvCcb8dx1lS8+sNXXjnrIKfnTLIpp9B9GiaDtLZxicttZAAeyjad
 7h8+8FuVCn25s4zcWC9xpgztNuK6vR1NoIi7OJh92VKhf6Uj91oTP0K9qMD59s7G
 DP+8ZIldklh2ulr+zCYQ5JCYmIMQR/+WNucmrwy2IohT7vpllAsf39baqHKSuznX
 UHJe5iV3H+G8R7yg8eijbn9QciJzodIMxGTJPkDbFZs+HuYveeIj5VwZtL5a+B/6
 f/LZ+LZo+cp81KNdM4iyAE2a+GyRK51mFfaIdfY9YY/RNjjVCzkJ+s2webYycv9o
 8YEaOvVi5S3cu7cXJpltP2AfXTOeenW4gZAWA+dQJw1LBEGURzqs2N7dDPDgzXbe
 XxrDCUu6BDcJJC65Mxl7dsgiDzypPyj8yvpkg+eoLU+sgobgB/pQRxkHqquBQwlv
 tZ+7Djd5nWZujQ==
 =WzUt
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.7-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.7-rc1

These changes add support for the XUSB pad controller, as well as the
XUSB controller on Tegra194. Furthermore, USB device mode is supported
across Tegra210 and Tegra186 boards. PCIe endpoint mode support is added
for the Jetson AGX Xavier platform.

Various minor fixes eliminate warnings on boot related to missing power
supplies for some devices.

* tag 'tegra-for-5.7-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Add support for PCIe endpoint mode in P2972-0000 platform
  arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194
  arm64: tegra: Add ethernet alias on Jetson TX1
  arm64: tegra: Populate LP8557 backlight regulator
  arm64: tegra: Fix Tegra186 SOR supply
  arm64: tegra: Add EEPROM supplies
  arm64: tegra: Enable I2C controller for EEPROM
  arm64: tegra: smaug: Change clk_out_2 provider to PMC
  arm64: tegra: Add clock-cells property to Tegra PMC node
  arm64: tegra: Enable XUDC node on Jetson Nano
  arm64: tegra: Update OTG port entries for Jetson Nano
  arm64: tegra: Enable XUDC node on Jetson TX2
  arm64: tegra: Add XUDC node for Tegra186
  arm64: tegra: Enable XUDC on Jetson TX1
  arm64: tegra: Add XUDC node for Tegra210
  arm64: tegra: Update OTG port entries for Jetson TX2
  arm64: tegra: Update OTG port entries for Jetson TX1
  arm64: tegra: Enable XUSB host in P2972-0000 board
  arm64: tegra: Add XUSB and pad controller on Tegra194
  arm64: tegra: Fix Tegra194 PCIe compatible string

Link: https://lore.kernel.org/r/20200313165848.2915133-8-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-03-25 21:48:17 +01:00
commit c661d66ca1
14 changed files with 501 additions and 19 deletions

View File

@ -118,7 +118,7 @@ Tegra194:
--------
pcie@14180000 {
compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>;
reg = <0x00 0x14180000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x38000000 0x0 0x00040000 /* configuration space (256K) */

View File

@ -6,6 +6,7 @@
#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/tegra124-soctherm.h>
#include <dt-bindings/soc/tegra-pmc.h>
/ {
compatible = "nvidia,tegra132", "nvidia,tegra124";
@ -577,11 +578,12 @@
clock-names = "rtc";
};
pmc@7000e400 {
tegra_pmc: pmc@7000e400 {
compatible = "nvidia,tegra124-pmc";
reg = <0x0 0x7000e400 0x0 0x400>;
clocks = <&tegra_car TEGRA124_CLK_PCLK>, <&clk32k_in>;
clock-names = "pclk", "clk32k_in";
#clock-cells = <1>;
};
fuse@7000f800 {

View File

@ -131,7 +131,7 @@
status = "okay";
lanes {
usb2-0 {
micro_b: usb2-0 {
nvidia,function = "xusb";
status = "okay";
};
@ -174,8 +174,20 @@
usb2-0 {
status = "okay";
mode = "otg";
vbus-supply = <&vdd_usb0>;
usb-role-switch;
connector {
compatible = "usb-b-connector",
"gpio-usb-b-connector";
label = "micro-USB";
type = "micro";
vbus-gpio = <&gpio
TEGRA186_MAIN_GPIO(X, 7)
GPIO_ACTIVE_LOW>;
id-gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
};
usb2-1 {
@ -201,12 +213,20 @@
phy-names = "usb2-0", "usb2-1", "usb3-0";
};
usb@3550000 {
status = "okay";
phys = <&micro_b>;
phy-names = "usb2-0";
};
i2c@c250000 {
/* carrier board ID EEPROM */
eeprom@57 {
compatible = "atmel,24c02";
reg = <0x57>;
vcc-supply = <&vdd_1v8>;
address-bits = <8>;
page-size = <8>;
size = <256>;
@ -258,7 +278,7 @@
status = "okay";
avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
vdd-hdmi-dp-pll = <&vdd_1v8_ap>;
vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
nvidia,dpaux = <&dpaux>;
};

View File

@ -171,6 +171,7 @@
compatible = "atmel,24c02";
reg = <0x50>;
vcc-supply = <&vdd_1v8>;
address-bits = <8>;
page-size = <8>;
size = <256>;

View File

@ -572,6 +572,25 @@
nvidia,xusb-padctl = <&padctl>;
};
usb@3550000 {
compatible = "nvidia,tegra186-xudc";
reg = <0x0 0x03550000 0x0 0x8000>,
<0x0 0x03558000 0x0 0x1000>;
reg-names = "base", "fpci";
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_XUSB_CORE_DEV>,
<&bpmp TEGRA186_CLK_XUSB_SS>,
<&bpmp TEGRA186_CLK_XUSB_CORE_SS>,
<&bpmp TEGRA186_CLK_XUSB_FS>;
clock-names = "dev", "ss", "ss_src", "fs_src";
iommus = <&smmu TEGRA186_SID_XUSB_DEV>;
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBB>,
<&bpmp TEGRA186_POWER_DOMAIN_XUSBA>;
power-domain-names = "dev", "ss";
nvidia,xusb-padctl = <&padctl>;
status = "disabled";
};
fuse@3820000 {
compatible = "nvidia,tegra186-efuse";
reg = <0x0 0x03820000 0x0 0x10000>;

View File

@ -71,6 +71,29 @@
vmmc-supply = <&vdd_emmc_3v3>;
};
padctl@3520000 {
avdd-usb-supply = <&vdd_usb_3v3>;
vclamp-usb-supply = <&vdd_1v8ao>;
ports {
usb2-1 {
vbus-supply = <&vdd_5v0_sys>;
};
usb2-3 {
vbus-supply = <&vdd_5v_sata>;
};
usb3-0 {
vbus-supply = <&vdd_5v0_sys>;
};
usb3-3 {
vbus-supply = <&vdd_5v0_sys>;
};
};
};
rtc@c2a0000 {
status = "okay";
};
@ -234,7 +257,7 @@
regulator-max-microvolt = <3300000>;
};
ldo5 {
vdd_usb_3v3: ldo5 {
regulator-name = "VDD_USB_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
@ -317,5 +340,16 @@
gpio = <&gpio TEGRA194_MAIN_GPIO(A, 1) GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
vdd_5v_sata: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "VDD_5V_SATA";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
};

View File

@ -37,6 +37,69 @@
status = "okay";
};
padctl@3520000 {
status = "okay";
pads {
usb2 {
lanes {
usb2-1 {
status = "okay";
};
usb2-3 {
status = "okay";
};
};
};
usb3 {
lanes {
usb3-0 {
status = "okay";
};
usb3-3 {
status = "okay";
};
};
};
};
ports {
usb2-1 {
mode = "host";
status = "okay";
};
usb2-3 {
mode = "host";
status = "okay";
};
usb3-0 {
nvidia,usb2-companion = <1>;
status = "okay";
};
usb3-3 {
nvidia,usb2-companion = <3>;
maximum-speed = "super-speed";
status = "okay";
};
};
};
usb@3610000 {
status = "okay";
phys = <&{/cbb@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
<&{/cbb@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
<&{/cbb@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
<&{/cbb@0/padctl@3520000/pads/usb3/lanes/usb3-3}>;
phy-names = "usb2-1", "usb2-3", "usb3-0", "usb3-3";
};
pwm@c340000 {
status = "okay";
};
@ -136,6 +199,24 @@
"p2u-5", "p2u-6", "p2u-7";
};
pcie_ep@141a0000 {
status = "disabled";
vddio-pex-ctl-supply = <&vdd_1v8ao>;
reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;
nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
GPIO_ACTIVE_HIGH>;
phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
<&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
<&p2u_nvhs_6>, <&p2u_nvhs_7>;
phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
"p2u-5", "p2u-6", "p2u-7";
};
fan: fan {
compatible = "pwm-fan";
pwms = <&pwm4 0 45334>;

View File

@ -537,6 +537,145 @@
status = "disabled";
};
xusb_padctl: padctl@3520000 {
compatible = "nvidia,tegra194-xusb-padctl";
reg = <0x03520000 0x1000>,
<0x03540000 0x1000>;
reg-names = "padctl", "ao";
resets = <&bpmp TEGRA194_RESET_XUSB_PADCTL>;
reset-names = "padctl";
status = "disabled";
pads {
usb2 {
clocks = <&bpmp TEGRA194_CLK_USB2_TRK>;
clock-names = "trk";
lanes {
usb2-0 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
usb2-1 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
usb2-2 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
usb2-3 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
};
};
usb3 {
lanes {
usb3-0 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
usb3-1 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
usb3-2 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
usb3-3 {
nvidia,function = "xusb";
status = "disabled";
#phy-cells = <0>;
};
};
};
};
ports {
usb2-0 {
status = "disabled";
};
usb2-1 {
status = "disabled";
};
usb2-2 {
status = "disabled";
};
usb2-3 {
status = "disabled";
};
usb3-0 {
status = "disabled";
};
usb3-1 {
status = "disabled";
};
usb3-2 {
status = "disabled";
};
usb3-3 {
status = "disabled";
};
};
};
usb@3610000 {
compatible = "nvidia,tegra194-xusb";
reg = <0x03610000 0x40000>,
<0x03600000 0x10000>;
reg-names = "hcd", "fpci";
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_XUSB_CORE_HOST>,
<&bpmp TEGRA194_CLK_XUSB_FALCON>,
<&bpmp TEGRA194_CLK_XUSB_CORE_SS>,
<&bpmp TEGRA194_CLK_XUSB_SS>,
<&bpmp TEGRA194_CLK_CLK_M>,
<&bpmp TEGRA194_CLK_XUSB_FS>,
<&bpmp TEGRA194_CLK_UTMIPLL>,
<&bpmp TEGRA194_CLK_CLK_M>,
<&bpmp TEGRA194_CLK_PLLE>;
clock-names = "xusb_host", "xusb_falcon_src",
"xusb_ss", "xusb_ss_src", "xusb_hs_src",
"xusb_fs_src", "pll_u_480m", "clk_m",
"pll_e";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>,
<&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
power-domain-names = "xusb_host", "xusb_ss";
nvidia,xusb-padctl = <&xusb_padctl>;
status = "disabled";
};
fuse@3820000 {
compatible = "nvidia,tegra194-efuse";
reg = <0x03820000 0x10000>;
@ -1208,7 +1347,7 @@
};
pcie@14100000 {
compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>;
reg = <0x00 0x14100000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x30000000 0x0 0x00040000 /* configuration space (256K) */
@ -1253,7 +1392,7 @@
};
pcie@14120000 {
compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>;
reg = <0x00 0x14120000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x32000000 0x0 0x00040000 /* configuration space (256K) */
@ -1298,7 +1437,7 @@
};
pcie@14140000 {
compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>;
reg = <0x00 0x14140000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x34000000 0x0 0x00040000 /* configuration space (256K) */
@ -1343,7 +1482,7 @@
};
pcie@14160000 {
compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>;
reg = <0x00 0x14160000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x36000000 0x0 0x00040000 /* configuration space (256K) */
@ -1388,7 +1527,7 @@
};
pcie@14180000 {
compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>;
reg = <0x00 0x14180000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x38000000 0x0 0x00040000 /* configuration space (256K) */
@ -1433,7 +1572,7 @@
};
pcie@141a0000 {
compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
compatible = "nvidia,tegra194-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>;
reg = <0x00 0x141a0000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x3a000000 0x0 0x00040000 /* configuration space (256K) */
@ -1481,6 +1620,105 @@
0x82000000 0x0 0x40000000 0x1f 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
};
pcie_ep@14160000 {
compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>;
reg = <0x00 0x14160000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x36040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */
0x00 0x36080000 0x0 0x00040000 /* DBI reg space (256K) */
0x14 0x00000000 0x4 0x00000000>; /* Address Space (16G) */
reg-names = "appl", "atu_dma", "dbi", "addr_space";
status = "disabled";
num-lanes = <4>;
num-ib-windows = <2>;
num-ob-windows = <8>;
clocks = <&bpmp TEGRA194_CLK_PEX0_CORE_4>;
clock-names = "core";
resets = <&bpmp TEGRA194_RESET_PEX0_CORE_4_APB>,
<&bpmp TEGRA194_RESET_PEX0_CORE_4>;
reset-names = "apb", "core";
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
interrupt-names = "intr";
nvidia,bpmp = <&bpmp 4>;
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
};
pcie_ep@14180000 {
compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>;
reg = <0x00 0x14180000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x38040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */
0x00 0x38080000 0x0 0x00040000 /* DBI reg space (256K) */
0x18 0x00000000 0x4 0x00000000>; /* Address Space (16G) */
reg-names = "appl", "atu_dma", "dbi", "addr_space";
status = "disabled";
num-lanes = <8>;
num-ib-windows = <2>;
num-ob-windows = <8>;
clocks = <&bpmp TEGRA194_CLK_PEX0_CORE_0>;
clock-names = "core";
resets = <&bpmp TEGRA194_RESET_PEX0_CORE_0_APB>,
<&bpmp TEGRA194_RESET_PEX0_CORE_0>;
reset-names = "apb", "core";
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
interrupt-names = "intr";
nvidia,bpmp = <&bpmp 0>;
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
};
pcie_ep@141a0000 {
compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>;
reg = <0x00 0x141a0000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x3a040000 0x0 0x00040000 /* iATU_DMA reg space (256K) */
0x00 0x3a080000 0x0 0x00040000 /* DBI reg space (256K) */
0x1c 0x00000000 0x4 0x00000000>; /* Address Space (16G) */
reg-names = "appl", "atu_dma", "dbi", "addr_space";
status = "disabled";
num-lanes = <8>;
num-ib-windows = <2>;
num-ob-windows = <8>;
pinctrl-names = "default";
pinctrl-0 = <&clkreq_c5_bi_dir_state>;
clocks = <&bpmp TEGRA194_CLK_PEX1_CORE_5>;
clock-names = "core";
resets = <&bpmp TEGRA194_RESET_PEX1_CORE_5_APB>,
<&bpmp TEGRA194_RESET_PEX1_CORE_5>;
reset-names = "apb", "core";
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
interrupt-names = "intr";
nvidia,bpmp = <&bpmp 5>;
nvidia,aspm-cmrt-us = <60>;
nvidia,aspm-pwr-on-t-us = <20>;
nvidia,aspm-l0s-entrance-latency-us = <3>;
};
sysram@40000000 {
compatible = "nvidia,tegra194-sysram", "mmio-sram";
reg = <0x0 0x40000000 0x0 0x50000>;

View File

@ -265,11 +265,14 @@
};
i2c@7000c500 {
status = "okay";
/* module ID EEPROM */
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
vcc-supply = <&vdd_1v8>;
address-bits = <8>;
page-size = <8>;
size = <256>;

View File

@ -56,6 +56,7 @@
backlight: backlight@2c {
compatible = "ti,lp8557";
reg = <0x2c>;
power-supply = <&vdd_3v3_sys>;
dev-ctrl = /bits/ 8 <0x80>;
init-brt = /bits/ 8 <0xff>;
@ -85,6 +86,7 @@
compatible = "atmel,24c02";
reg = <0x57>;
vcc-supply = <&vdd_1v8>;
address-bits = <8>;
page-size = <8>;
size = <256>;

View File

@ -5,6 +5,10 @@
model = "NVIDIA Tegra210 P2597 I/O board";
compatible = "nvidia,p2597", "nvidia,tegra210";
aliases {
ethernet = "/usb@70090000/ethernet@1";
};
host1x@50000000 {
dpaux@54040000 {
status = "okay";
@ -1336,7 +1340,6 @@
<&{/padctl@7009f000/pads/pcie/lanes/pcie-5}>;
phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3", "usb3-0",
"usb3-1";
dvddio-pex-supply = <&vdd_pex_1v05>;
hvddio-pex-supply = <&vdd_1v8>;
avdd-usb-supply = <&vdd_3v3_sys>;
@ -1347,6 +1350,13 @@
hvdd-usb-ss-pll-e-supply = <&vdd_1v8>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
ethernet@1 {
reg = <1>;
};
};
padctl@7009f000 {
@ -1362,7 +1372,7 @@
status = "okay";
lanes {
usb2-0 {
micro_b: usb2-0 {
nvidia,function = "xusb";
status = "okay";
};
@ -1440,7 +1450,19 @@
ports {
usb2-0 {
status = "okay";
vbus-supply = <&vdd_usb_vbus_otg>;
mode = "otg";
usb-role-switch;
connector {
compatible = "usb-b-connector",
"gpio-usb-b-connector";
label = "micro-USB";
type = "micro";
vbus-gpio = <&gpio TEGRA_GPIO(Z, 0)
GPIO_ACTIVE_LOW>;
id-gpio = <&pmic 0 0>;
};
};
usb2-1 {
@ -1483,6 +1505,14 @@
vmmc-supply = <&vdd_3v3_sd>;
};
usb@700d0000 {
status = "okay";
phys = <&micro_b>;
phy-names = "usb2-0";
avddio-usb-supply = <&vdd_3v3_sys>;
hvdd-usb-supply = <&vdd_1v8>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
@ -1606,6 +1636,17 @@
vin-supply = <&vdd_5v0_sys>;
};
vdd_usb_vbus_otg: regulator@11 {
compatible = "regulator-fixed";
reg = <9>;
regulator-name = "USB_VBUS_EN0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_sys>;
};
vdd_hdmi: regulator@10 {
compatible = "regulator-fixed";
reg = <10>;

View File

@ -114,6 +114,7 @@
compatible = "atmel,24c02";
reg = <0x50>;
vcc-supply = <&vdd_1v8>;
address-bits = <8>;
page-size = <8>;
size = <256>;
@ -124,6 +125,7 @@
compatible = "atmel,24c02";
reg = <0x57>;
vcc-supply = <&vdd_1v8>;
address-bits = <8>;
page-size = <8>;
size = <256>;
@ -443,7 +445,7 @@
status = "okay";
lanes {
usb2-0 {
micro_b: usb2-0 {
nvidia,function = "xusb";
status = "okay";
};
@ -505,7 +507,17 @@
ports {
usb2-0 {
status = "okay";
mode = "otg";
mode = "peripheral";
usb-role-switch;
connector {
compatible = "usb-b-connector",
"gpio-usb-b-connector";
label = "micro-USB";
type = "micro";
vbus-gpio = <&gpio TEGRA_GPIO(CC, 4)
GPIO_ACTIVE_LOW>;
};
};
usb2-1 {
@ -536,6 +548,14 @@
vmmc-supply = <&vdd_3v3_sd>;
};
usb@700d0000 {
status = "okay";
phys = <&micro_b>;
phy-names = "usb2-0";
avddio-usb-supply = <&vdd_3v3_sys>;
hvdd-usb-supply = <&vdd_1v8>;
};
sdhci@700b0400 {
status = "okay";
bus-width = <4>;

View File

@ -1592,7 +1592,7 @@
reg = <0x1a>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(E, 6) IRQ_TYPE_LEVEL_LOW>;
clocks = <&tegra_car TEGRA210_CLK_CLK_OUT_2>;
clocks = <&tegra_pmc TEGRA_PMC_CLK_OUT_2>;
clock-names = "mclk";
nuvoton,jkdet-enable;

View File

@ -7,6 +7,7 @@
#include <dt-bindings/reset/tegra210-car.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/tegra124-soctherm.h>
#include <dt-bindings/soc/tegra-pmc.h>
/ {
compatible = "nvidia,tegra210";
@ -770,16 +771,17 @@
compatible = "nvidia,tegra210-rtc", "nvidia,tegra20-rtc";
reg = <0x0 0x7000e000 0x0 0x100>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&pmc>;
interrupt-parent = <&tegra_pmc>;
clocks = <&tegra_car TEGRA210_CLK_RTC>;
clock-names = "rtc";
};
pmc: pmc@7000e400 {
tegra_pmc: pmc@7000e400 {
compatible = "nvidia,tegra210-pmc";
reg = <0x0 0x7000e400 0x0 0x400>;
clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
clock-names = "pclk", "clk32k_in";
#clock-cells = <1>;
#interrupt-cells = <2>;
interrupt-controller;
@ -1207,6 +1209,25 @@
status = "disabled";
};
usb@700d0000 {
compatible = "nvidia,tegra210-xudc";
reg = <0x0 0x700d0000 0x0 0x8000>,
<0x0 0x700d8000 0x0 0x1000>,
<0x0 0x700d9000 0x0 0x1000>;
reg-names = "base", "fpci", "ipfs";
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>,
<&tegra_car TEGRA210_CLK_XUSB_SS>,
<&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_HS_SRC>;
clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src";
power-domains = <&pd_xusbdev>, <&pd_xusbss>;
power-domain-names = "dev", "ss";
nvidia,xusb-padctl = <&padctl>;
status = "disabled";
};
mipi: mipi@700e3000 {
compatible = "nvidia,tegra210-mipi";
reg = <0x0 0x700e3000 0x0 0x100>;