drm/amdgpu: add amdgpu_tmz data structure
This patch to add amdgpu_tmz structure which stores all tmz related fields. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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				| @ -103,6 +103,7 @@ | ||||
| #include "amdgpu_umc.h" | ||||
| #include "amdgpu_mmhub.h" | ||||
| #include "amdgpu_df.h" | ||||
| #include "amdgpu_tmz.h" | ||||
| 
 | ||||
| #define MAX_GPU_INSTANCE		16 | ||||
| 
 | ||||
| @ -936,6 +937,9 @@ struct amdgpu_device { | ||||
| 	/* df */ | ||||
| 	struct amdgpu_df                df; | ||||
| 
 | ||||
| 	/* tmz */ | ||||
| 	struct amdgpu_tmz		tmz; | ||||
| 
 | ||||
| 	struct amdgpu_ip_block          ip_blocks[AMDGPU_MAX_IP_NUM]; | ||||
| 	int				num_ip_blocks; | ||||
| 	struct mutex	mn_lock; | ||||
| @ -947,7 +951,7 @@ struct amdgpu_device { | ||||
| 	atomic64_t gart_pin_size; | ||||
| 
 | ||||
| 	/* soc15 register offset based on ip, instance and  segment */ | ||||
| 	uint32_t 		*reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE]; | ||||
| 	uint32_t		*reg_offset[MAX_HWIP][HWIP_MAX_INSTANCE]; | ||||
| 
 | ||||
| 	/* delayed work_func for deferring clockgating during resume */ | ||||
| 	struct delayed_work     delayed_init_work; | ||||
|  | ||||
							
								
								
									
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								drivers/gpu/drm/amd/amdgpu/amdgpu_tmz.h
									
									
									
									
									
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								drivers/gpu/drm/amd/amdgpu/amdgpu_tmz.h
									
									
									
									
									
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							| @ -0,0 +1,36 @@ | ||||
| /*
 | ||||
|  * Copyright 2019 Advanced Micro Devices, Inc. | ||||
|  * | ||||
|  * Permission is hereby granted, free of charge, to any person obtaining a | ||||
|  * copy of this software and associated documentation files (the "Software"), | ||||
|  * to deal in the Software without restriction, including without limitation | ||||
|  * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||||
|  * and/or sell copies of the Software, and to permit persons to whom the | ||||
|  * Software is furnished to do so, subject to the following conditions: | ||||
|  * | ||||
|  * The above copyright notice and this permission notice shall be included in | ||||
|  * all copies or substantial portions of the Software. | ||||
|  * | ||||
|  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||||
|  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||||
|  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL | ||||
|  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||||
|  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||||
|  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||||
|  * OTHER DEALINGS IN THE SOFTWARE. | ||||
|  * | ||||
|  */ | ||||
| 
 | ||||
| #ifndef __AMDGPU_TMZ_H__ | ||||
| #define __AMDGPU_TMZ_H__ | ||||
| 
 | ||||
| #include "amdgpu.h" | ||||
| 
 | ||||
| /*
 | ||||
|  * Trust memory zone stuff | ||||
|  */ | ||||
| struct amdgpu_tmz { | ||||
| 	bool	enabled; | ||||
| }; | ||||
| 
 | ||||
| #endif | ||||
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