forked from Minki/linux
clocksource/drivers/qcom: Convert init function to return error
The init functions do not return any error. They behave as the following: - panic, thus leading to a kernel crash while another timer may work and make the system boot up correctly or - print an error and let the caller unaware if the state of the system Change that by converting the init functions to return an error conforming to the CLOCKSOURCE_OF_RET prototype. Proper error handling (rollback, errno value) will be changed later case by case, thus this change just return back an error or success in the init function. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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@ -178,7 +178,7 @@ static struct delay_timer msm_delay_timer = {
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.read_current_timer = msm_read_current_timer,
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};
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static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq,
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static int __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq,
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bool percpu)
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{
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struct clocksource *cs = &msm_clocksource;
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@ -218,12 +218,14 @@ err:
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sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz);
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msm_delay_timer.freq = dgt_hz;
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register_current_timer_delay(&msm_delay_timer);
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return res;
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}
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static void __init msm_dt_timer_init(struct device_node *np)
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static int __init msm_dt_timer_init(struct device_node *np)
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{
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u32 freq;
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int irq;
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int irq, ret;
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struct resource res;
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u32 percpu_offset;
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void __iomem *base;
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@ -232,34 +234,35 @@ static void __init msm_dt_timer_init(struct device_node *np)
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base = of_iomap(np, 0);
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if (!base) {
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pr_err("Failed to map event base\n");
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return;
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return -ENXIO;
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}
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/* We use GPT0 for the clockevent */
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irq = irq_of_parse_and_map(np, 1);
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if (irq <= 0) {
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pr_err("Can't get irq\n");
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return;
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return -EINVAL;
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}
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/* We use CPU0's DGT for the clocksource */
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if (of_property_read_u32(np, "cpu-offset", &percpu_offset))
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percpu_offset = 0;
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if (of_address_to_resource(np, 0, &res)) {
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ret = of_address_to_resource(np, 0, &res);
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if (ret) {
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pr_err("Failed to parse DGT resource\n");
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return;
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return ret;
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}
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cpu0_base = ioremap(res.start + percpu_offset, resource_size(&res));
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if (!cpu0_base) {
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pr_err("Failed to map source base\n");
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return;
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return -EINVAL;
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}
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if (of_property_read_u32(np, "clock-frequency", &freq)) {
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pr_err("Unknown frequency\n");
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return;
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return -EINVAL;
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}
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event_base = base + 0x4;
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@ -268,7 +271,7 @@ static void __init msm_dt_timer_init(struct device_node *np)
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freq /= 4;
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writel_relaxed(DGT_CLK_CTL_DIV_4, source_base + DGT_CLK_CTL);
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msm_timer_init(freq, 32, irq, !!percpu_offset);
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return msm_timer_init(freq, 32, irq, !!percpu_offset);
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}
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CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
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CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
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CLOCKSOURCE_OF_DECLARE_RET(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
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CLOCKSOURCE_OF_DECLARE_RET(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
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