V4L/DVB (6903): mt312: CodingStyle fix
Fixes all occurences of assignment in if checkpatch marks them as ERROR. Signed-off-by: Matthias Schwarzott <zzam@gentoo.org> Reviewed-by: Andreas Oberritter <obi@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
This commit is contained in:
Matthias Schwarzott
Mauro Carvalho Chehab
parent
478f42292d
commit
994fc28b6c
@ -152,7 +152,8 @@ static int mt312_get_inversion(struct mt312_state *state,
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int ret;
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u8 vit_mode;
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if ((ret = mt312_readreg(state, VIT_MODE, &vit_mode)) < 0)
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ret = mt312_readreg(state, VIT_MODE, &vit_mode);
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if (ret < 0)
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return ret;
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if (vit_mode & 0x80) /* auto inversion was used */
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@ -170,15 +171,18 @@ static int mt312_get_symbol_rate(struct mt312_state *state, u32 *sr)
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u16 monitor;
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u8 buf[2];
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if ((ret = mt312_readreg(state, SYM_RATE_H, &sym_rate_h)) < 0)
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ret = mt312_readreg(state, SYM_RATE_H, &sym_rate_h);
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if (ret < 0)
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return ret;
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if (sym_rate_h & 0x80) {
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/* symbol rate search was used */
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if ((ret = mt312_writereg(state, MON_CTRL, 0x03)) < 0)
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ret = mt312_writereg(state, MON_CTRL, 0x03);
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if (ret < 0)
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return ret;
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if ((ret = mt312_read(state, MONITOR_H, buf, sizeof(buf))) < 0)
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ret = mt312_read(state, MONITOR_H, buf, sizeof(buf));
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if (ret < 0)
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return ret;
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monitor = (buf[0] << 8) | buf[1];
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@ -186,16 +190,18 @@ static int mt312_get_symbol_rate(struct mt312_state *state, u32 *sr)
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dprintk("sr(auto) = %u\n",
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mt312_div(monitor * 15625, 4));
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} else {
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if ((ret = mt312_writereg(state, MON_CTRL, 0x05)) < 0)
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ret = mt312_writereg(state, MON_CTRL, 0x05);
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if (ret < 0)
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return ret;
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if ((ret = mt312_read(state, MONITOR_H, buf, sizeof(buf))) < 0)
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ret = mt312_read(state, MONITOR_H, buf, sizeof(buf));
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if (ret < 0)
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return ret;
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dec_ratio = ((buf[0] >> 5) & 0x07) * 32;
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if ((ret = mt312_read(state, SYM_RAT_OP_H, buf,
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sizeof(buf))) < 0)
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ret = mt312_read(state, SYM_RAT_OP_H, buf, sizeof(buf));
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if (ret < 0)
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return ret;
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sym_rat_op = (buf[0] << 8) | buf[1];
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@ -219,7 +225,8 @@ static int mt312_get_code_rate(struct mt312_state *state, fe_code_rate_t *cr)
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int ret;
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u8 fec_status;
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if ((ret = mt312_readreg(state, FEC_STATUS, &fec_status)) < 0)
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ret = mt312_readreg(state, FEC_STATUS, &fec_status);
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if (ret < 0)
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return ret;
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*cr = fec_tab[(fec_status >> 4) & 0x07];
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@ -234,15 +241,17 @@ static int mt312_initfe(struct dvb_frontend *fe)
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u8 buf[2];
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/* wake up */
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if ((ret = mt312_writereg(state, CONFIG,
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(state->frequency == 60 ? 0x88 : 0x8c))) < 0)
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ret = mt312_writereg(state, CONFIG,
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(state->frequency == 60 ? 0x88 : 0x8c));
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if (ret < 0)
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return ret;
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/* wait at least 150 usec */
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udelay(150);
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/* full reset */
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if ((ret = mt312_reset(state, 1)) < 0)
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ret = mt312_reset(state, 1);
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if (ret < 0)
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return ret;
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/* Per datasheet, write correct values. 09/28/03 ACCJr.
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@ -251,8 +260,8 @@ static int mt312_initfe(struct dvb_frontend *fe)
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u8 buf_def[8] = { 0x14, 0x12, 0x03, 0x02,
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0x01, 0x00, 0x00, 0x00 };
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if ((ret = mt312_write(state, VIT_SETUP, buf_def,
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sizeof(buf_def))) < 0)
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ret = mt312_write(state, VIT_SETUP, buf_def, sizeof(buf_def));
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if (ret < 0)
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return ret;
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}
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@ -263,23 +272,28 @@ static int mt312_initfe(struct dvb_frontend *fe)
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/* DISEQC_RATIO */
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buf[1] = mt312_div(MT312_PLL_CLK, 15000 * 4);
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if ((ret = mt312_write(state, SYS_CLK, buf, sizeof(buf))) < 0)
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ret = mt312_write(state, SYS_CLK, buf, sizeof(buf));
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if (ret < 0)
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return ret;
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if ((ret = mt312_writereg(state, SNR_THS_HIGH, 0x32)) < 0)
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ret = mt312_writereg(state, SNR_THS_HIGH, 0x32);
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if (ret < 0)
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return ret;
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if ((ret = mt312_writereg(state, OP_CTRL, 0x53)) < 0)
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ret = mt312_writereg(state, OP_CTRL, 0x53);
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if (ret < 0)
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return ret;
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/* TS_SW_LIM */
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buf[0] = 0x8c;
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buf[1] = 0x98;
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if ((ret = mt312_write(state, TS_SW_LIM_L, buf, sizeof(buf))) < 0)
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ret = mt312_write(state, TS_SW_LIM_L, buf, sizeof(buf));
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if (ret < 0)
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return ret;
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if ((ret = mt312_writereg(state, CS_SW_LIM, 0x69)) < 0)
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ret = mt312_writereg(state, CS_SW_LIM, 0x69);
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if (ret < 0)
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return ret;
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return 0;
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@ -295,24 +309,26 @@ static int mt312_send_master_cmd(struct dvb_frontend *fe,
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if ((c->msg_len == 0) || (c->msg_len > sizeof(c->msg)))
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return -EINVAL;
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if ((ret = mt312_readreg(state, DISEQC_MODE, &diseqc_mode)) < 0)
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ret = mt312_readreg(state, DISEQC_MODE, &diseqc_mode);
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if (ret < 0)
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return ret;
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if ((ret =
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mt312_write(state, (0x80 | DISEQC_INSTR), c->msg, c->msg_len)) < 0)
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ret = mt312_write(state, (0x80 | DISEQC_INSTR), c->msg, c->msg_len);
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if (ret < 0)
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return ret;
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if ((ret =
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mt312_writereg(state, DISEQC_MODE,
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(diseqc_mode & 0x40) | ((c->msg_len - 1) << 3)
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| 0x04)) < 0)
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ret = mt312_writereg(state, DISEQC_MODE,
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(diseqc_mode & 0x40) | ((c->msg_len - 1) << 3)
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| 0x04);
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if (ret < 0)
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return ret;
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/* set DISEQC_MODE[2:0] to zero if a return message is expected */
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if (c->msg[0] & 0x02)
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if ((ret = mt312_writereg(state, DISEQC_MODE,
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(diseqc_mode & 0x40))) < 0)
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if (c->msg[0] & 0x02) {
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ret = mt312_writereg(state, DISEQC_MODE, (diseqc_mode & 0x40));
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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@ -328,12 +344,13 @@ static int mt312_send_burst(struct dvb_frontend *fe, const fe_sec_mini_cmd_t c)
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if (c > SEC_MINI_B)
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return -EINVAL;
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if ((ret = mt312_readreg(state, DISEQC_MODE, &diseqc_mode)) < 0)
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ret = mt312_readreg(state, DISEQC_MODE, &diseqc_mode);
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if (ret < 0)
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return ret;
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if ((ret =
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mt312_writereg(state, DISEQC_MODE,
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(diseqc_mode & 0x40) | mini_tab[c])) < 0)
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ret = mt312_writereg(state, DISEQC_MODE,
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(diseqc_mode & 0x40) | mini_tab[c]);
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if (ret < 0)
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return ret;
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return 0;
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@ -350,12 +367,13 @@ static int mt312_set_tone(struct dvb_frontend *fe, const fe_sec_tone_mode_t t)
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if (t > SEC_TONE_OFF)
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return -EINVAL;
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if ((ret = mt312_readreg(state, DISEQC_MODE, &diseqc_mode)) < 0)
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ret = mt312_readreg(state, DISEQC_MODE, &diseqc_mode);
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if (ret < 0)
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return ret;
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if ((ret =
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mt312_writereg(state, DISEQC_MODE,
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(diseqc_mode & 0x40) | tone_tab[t])) < 0)
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ret = mt312_writereg(state, DISEQC_MODE,
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(diseqc_mode & 0x40) | tone_tab[t]);
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if (ret < 0)
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return ret;
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return 0;
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@ -380,7 +398,8 @@ static int mt312_read_status(struct dvb_frontend *fe, fe_status_t *s)
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*s = 0;
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if ((ret = mt312_read(state, QPSK_STAT_H, status, sizeof(status))) < 0)
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ret = mt312_read(state, QPSK_STAT_H, status, sizeof(status));
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if (ret < 0)
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return ret;
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dprintk("QPSK_STAT_H: 0x%02x, QPSK_STAT_L: 0x%02x,"
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@ -406,7 +425,8 @@ static int mt312_read_ber(struct dvb_frontend *fe, u32 *ber)
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int ret;
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u8 buf[3];
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if ((ret = mt312_read(state, RS_BERCNT_H, buf, 3)) < 0)
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ret = mt312_read(state, RS_BERCNT_H, buf, 3);
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if (ret < 0)
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return ret;
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*ber = ((buf[0] << 16) | (buf[1] << 8) | buf[2]) * 64;
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@ -423,7 +443,8 @@ static int mt312_read_signal_strength(struct dvb_frontend *fe,
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u16 agc;
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s16 err_db;
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if ((ret = mt312_read(state, AGC_H, buf, sizeof(buf))) < 0)
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ret = mt312_read(state, AGC_H, buf, sizeof(buf));
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if (ret < 0)
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return ret;
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agc = (buf[0] << 6) | (buf[1] >> 2);
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@ -442,7 +463,8 @@ static int mt312_read_snr(struct dvb_frontend *fe, u16 *snr)
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int ret;
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u8 buf[2];
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if ((ret = mt312_read(state, M_SNR_H, &buf, sizeof(buf))) < 0)
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ret = mt312_read(state, M_SNR_H, &buf, sizeof(buf));
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if (ret < 0)
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return ret;
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*snr = 0xFFFF - ((((buf[0] & 0x7f) << 8) | buf[1]) << 1);
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@ -456,7 +478,8 @@ static int mt312_read_ucblocks(struct dvb_frontend *fe, u32 *ubc)
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int ret;
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u8 buf[2];
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if ((ret = mt312_read(state, RS_UBC_H, &buf, sizeof(buf))) < 0)
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ret = mt312_read(state, RS_UBC_H, &buf, sizeof(buf));
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if (ret < 0)
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return ret;
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*ubc = (buf[0] << 8) | buf[1];
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@ -512,14 +535,16 @@ static int mt312_set_frontend(struct dvb_frontend *fe,
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if ((config_val & 0x0c) == 0x08) {
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/* We are running 60MHz */
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state->frequency = 90;
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if ((ret = mt312_initfe(fe)) < 0)
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ret = mt312_initfe(fe);
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if (ret < 0)
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return ret;
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}
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} else {
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if ((config_val & 0x0c) == 0x0C) {
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/* We are running 90MHz */
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state->frequency = 60;
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if ((ret = mt312_initfe(fe)) < 0)
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ret = mt312_initfe(fe);
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if (ret < 0)
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return ret;
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}
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}
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@ -557,7 +582,8 @@ static int mt312_set_frontend(struct dvb_frontend *fe,
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/* GO */
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buf[4] = 0x01;
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if ((ret = mt312_write(state, SYM_RATE_H, buf, sizeof(buf))) < 0)
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ret = mt312_write(state, SYM_RATE_H, buf, sizeof(buf));
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if (ret < 0)
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return ret;
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mt312_reset(state, 0);
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@ -571,13 +597,16 @@ static int mt312_get_frontend(struct dvb_frontend *fe,
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struct mt312_state *state = fe->demodulator_priv;
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int ret;
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if ((ret = mt312_get_inversion(state, &p->inversion)) < 0)
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ret = mt312_get_inversion(state, &p->inversion);
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if (ret < 0)
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return ret;
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if ((ret = mt312_get_symbol_rate(state, &p->u.qpsk.symbol_rate)) < 0)
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ret = mt312_get_symbol_rate(state, &p->u.qpsk.symbol_rate);
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if (ret < 0)
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return ret;
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if ((ret = mt312_get_code_rate(state, &p->u.qpsk.fec_inner)) < 0)
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ret = mt312_get_code_rate(state, &p->u.qpsk.fec_inner);
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if (ret < 0)
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return ret;
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return 0;
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@ -601,14 +630,17 @@ static int mt312_sleep(struct dvb_frontend *fe)
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u8 config;
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/* reset all registers to defaults */
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if ((ret = mt312_reset(state, 1)) < 0)
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ret = mt312_reset(state, 1);
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if (ret < 0)
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return ret;
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if ((ret = mt312_readreg(state, CONFIG, &config)) < 0)
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ret = mt312_readreg(state, CONFIG, &config);
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if (ret < 0)
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return ret;
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/* enter standby */
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if ((ret = mt312_writereg(state, CONFIG, config & 0x7f)) < 0)
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ret = mt312_writereg(state, CONFIG, config & 0x7f);
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if (ret < 0)
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return ret;
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return 0;
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