forked from Minki/linux
drm/amdgpu: consistently use AMDGPU_CSA_VADDR
Instead of repeating this multiple times. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a3e9a15a25
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@ -7132,12 +7132,12 @@ static void gfx_v8_0_ring_emit_ce_meta(struct amdgpu_ring *ring)
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} ce_payload = {};
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if (ring->adev->virt.chained_ib_support) {
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ce_payload_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096 +
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offsetof(struct vi_gfx_meta_data_chained_ib, ce_payload);
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ce_payload_addr = AMDGPU_CSA_VADDR +
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offsetof(struct vi_gfx_meta_data_chained_ib, ce_payload);
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cnt_ce = (sizeof(ce_payload.chained) >> 2) + 4 - 2;
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} else {
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ce_payload_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096 +
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offsetof(struct vi_gfx_meta_data, ce_payload);
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ce_payload_addr = AMDGPU_CSA_VADDR +
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offsetof(struct vi_gfx_meta_data, ce_payload);
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cnt_ce = (sizeof(ce_payload.regular) >> 2) + 4 - 2;
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}
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@ -7160,7 +7160,7 @@ static void gfx_v8_0_ring_emit_de_meta(struct amdgpu_ring *ring)
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struct vi_de_ib_state_chained_ib chained;
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} de_payload = {};
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csa_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096;
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csa_addr = AMDGPU_CSA_VADDR;
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gds_addr = csa_addr + 4096;
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if (ring->adev->virt.chained_ib_support) {
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de_payload.chained.gds_backup_addrlo = lower_32_bits(gds_addr);
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@ -3865,7 +3865,7 @@ static void gfx_v9_0_ring_emit_ce_meta(struct amdgpu_ring *ring)
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int cnt;
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cnt = (sizeof(ce_payload) >> 2) + 4 - 2;
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csa_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096;
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csa_addr = AMDGPU_CSA_VADDR;
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amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));
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amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |
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@ -3883,7 +3883,7 @@ static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring *ring)
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uint64_t csa_addr, gds_addr;
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int cnt;
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csa_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096;
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csa_addr = AMDGPU_CSA_VADDR;
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gds_addr = csa_addr + 4096;
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de_payload.gds_backup_addrlo = lower_32_bits(gds_addr);
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de_payload.gds_backup_addrhi = upper_32_bits(gds_addr);
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