irqchip/xilinx: Add support for parent intc

The MIPS based xilfpga platform has the following IRQ structure

Peripherals --> xilinx_intcontroller -> mips_cpu_int controller

Add support for the driver to chain the irq handler

Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This commit is contained in:
Zubair Lutfullah Kakakhel 2016-11-14 12:13:49 +00:00 committed by Marc Zyngier
parent 2120a43527
commit 9689c99e49

View File

@ -12,10 +12,12 @@
#include <linux/irqdomain.h>
#include <linux/irq.h>
#include <linux/irqchip.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/of_address.h>
#include <linux/io.h>
#include <linux/jump_label.h>
#include <linux/bug.h>
#include <linux/of_irq.h>
/* No one else should require these constants, so define them locally here. */
#define ISR 0x00 /* Interrupt Status Register */
@ -133,11 +135,26 @@ static const struct irq_domain_ops xintc_irq_domain_ops = {
.map = xintc_map,
};
static void xil_intc_irq_handler(struct irq_desc *desc)
{
struct irq_chip *chip = irq_desc_get_chip(desc);
u32 pending;
chained_irq_enter(chip, desc);
do {
pending = xintc_get_irq();
if (pending == -1U)
break;
generic_handle_irq(pending);
} while (true);
chained_irq_exit(chip, desc);
}
static int __init xilinx_intc_of_init(struct device_node *intc,
struct device_node *parent)
{
u32 nr_irq;
int ret;
int ret, irq;
struct xintc_irq_chip *irqc;
if (xintc_irqc) {
@ -196,7 +213,20 @@ static int __init xilinx_intc_of_init(struct device_node *intc,
goto err_alloc;
}
irq_set_default_host(irqc->root_domain);
if (parent) {
irq = irq_of_parse_and_map(intc, 0);
if (irq) {
irq_set_chained_handler_and_data(irq,
xil_intc_irq_handler,
irqc);
} else {
pr_err("irq-xilinx: interrupts property not in DT\n");
ret = -EINVAL;
goto err_alloc;
}
} else {
irq_set_default_host(irqc->root_domain);
}
return 0;