forked from Minki/linux
[PATCH] CRIS update: SMP
Patches to support SMP. * Each CPU has its own current_pgd. * flush_tlb_range is implemented as flush_tlb_mm. * Atomic operations implemented with spinlocks. * Semaphores implemented with spinlocks. Signed-off-by: Mikael Starvik <starvik@axis.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
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21783c9746
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8d20a541b0
@ -14,6 +14,7 @@
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#include <asm/uaccess.h>
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#include <asm/pgtable.h>
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#include <asm/arch/svinto.h>
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#include <asm/mmu_context.h>
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/* debug of low-level TLB reload */
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#undef DEBUG
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@ -24,8 +25,6 @@
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#define D(x)
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#endif
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extern volatile pgd_t *current_pgd;
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extern const struct exception_table_entry
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*search_exception_tables(unsigned long addr);
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@ -46,7 +45,7 @@ handle_mmu_bus_fault(struct pt_regs *regs)
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int page_id;
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int acc, inv;
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#endif
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pgd_t* pgd = (pgd_t*)current_pgd;
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pgd_t* pgd = (pgd_t*)per_cpu(current_pgd, smp_processor_id());
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pmd_t *pmd;
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pte_t pte;
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int miss, we, writeac;
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@ -94,24 +93,3 @@ handle_mmu_bus_fault(struct pt_regs *regs)
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*R_TLB_LO = pte_val(pte);
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local_irq_restore(flags);
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}
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/* Called from arch/cris/mm/fault.c to find fixup code. */
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int
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find_fixup_code(struct pt_regs *regs)
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{
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const struct exception_table_entry *fixup;
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if ((fixup = search_exception_tables(regs->irp)) != 0) {
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/* Adjust the instruction pointer in the stackframe. */
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regs->irp = fixup->fixup;
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/*
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* Don't return by restoring the CPU state, so switch
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* frame-type.
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*/
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regs->frametype = CRIS_FRAME_NORMAL;
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return 1;
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}
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return 0;
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}
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@ -42,7 +42,7 @@ paging_init(void)
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* switch_mm)
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*/
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current_pgd = init_mm.pgd;
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per_cpu(current_pgd, smp_processor_id()) = init_mm.pgd;
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/* initialise the TLB (tlb.c) */
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@ -139,53 +139,6 @@ flush_tlb_page(struct vm_area_struct *vma,
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local_irq_restore(flags);
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}
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/* invalidate a page range */
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void
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flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start,
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unsigned long end)
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{
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struct mm_struct *mm = vma->vm_mm;
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int page_id = mm->context.page_id;
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int i;
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unsigned long flags;
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D(printk("tlb: flush range %p<->%p in context %d (%p)\n",
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start, end, page_id, mm));
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if(page_id == NO_CONTEXT)
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return;
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start &= PAGE_MASK; /* probably not necessary */
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end &= PAGE_MASK; /* dito */
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/* invalidate those TLB entries that match both the mm context
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* and the virtual address range
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*/
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local_save_flags(flags);
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local_irq_disable();
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for(i = 0; i < NUM_TLB_ENTRIES; i++) {
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unsigned long tlb_hi, vpn;
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*R_TLB_SELECT = IO_FIELD(R_TLB_SELECT, index, i);
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tlb_hi = *R_TLB_HI;
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vpn = tlb_hi & PAGE_MASK;
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if (IO_EXTRACT(R_TLB_HI, page_id, tlb_hi) == page_id &&
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vpn >= start && vpn < end) {
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*R_TLB_HI = ( IO_FIELD(R_TLB_HI, page_id, INVALID_PAGEID ) |
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IO_FIELD(R_TLB_HI, vpn, i & 0xf ) );
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*R_TLB_LO = ( IO_STATE(R_TLB_LO, global,no ) |
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IO_STATE(R_TLB_LO, valid, no ) |
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IO_STATE(R_TLB_LO, kernel,no ) |
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IO_STATE(R_TLB_LO, we, no ) |
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IO_FIELD(R_TLB_LO, pfn, 0 ) );
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}
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}
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local_irq_restore(flags);
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}
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/* dump the entire TLB for debug purposes */
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#if 0
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@ -237,7 +190,7 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
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* the pgd.
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*/
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current_pgd = next->pgd;
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per_cpu(current_pgd, smp_processor_id()) = next->pgd;
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/* switch context in the MMU */
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7
include/asm-cris/arch-v10/atomic.h
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7
include/asm-cris/arch-v10/atomic.h
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@ -0,0 +1,7 @@
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#ifndef __ASM_CRIS_ARCH_ATOMIC__
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#define __ASM_CRIS_ARCH_ATOMIC__
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#define cris_atomic_save(addr, flags) local_irq_save(flags);
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#define cris_atomic_restore(addr, flags) local_irq_restore(flags);
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#endif
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@ -4,21 +4,14 @@
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#define __ASM_CRIS_ATOMIC__
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#include <asm/system.h>
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#include <asm/arch/atomic.h>
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*/
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/*
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* Make sure gcc doesn't try to be clever and move things around
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* on us. We need to use _exactly_ the address the user gave us,
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* not some alias that contains the same information.
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*/
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#define __atomic_fool_gcc(x) (*(struct { int a[100]; } *)x)
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typedef struct { int counter; } atomic_t;
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typedef struct { volatile int counter; } atomic_t;
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#define ATOMIC_INIT(i) { (i) }
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@ -30,29 +23,26 @@ typedef struct { int counter; } atomic_t;
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extern __inline__ void atomic_add(int i, volatile atomic_t *v)
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{
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unsigned long flags;
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(v, flags);
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v->counter += i;
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local_irq_restore(flags);
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cris_atomic_restore(v, flags);
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}
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extern __inline__ void atomic_sub(int i, volatile atomic_t *v)
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{
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unsigned long flags;
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(v, flags);
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v->counter -= i;
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local_irq_restore(flags);
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cris_atomic_restore(v, flags);
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}
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extern __inline__ int atomic_add_return(int i, volatile atomic_t *v)
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{
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unsigned long flags;
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int retval;
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(v, flags);
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retval = (v->counter += i);
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local_irq_restore(flags);
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cris_atomic_restore(v, flags);
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return retval;
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}
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@ -62,10 +52,9 @@ extern __inline__ int atomic_sub_return(int i, volatile atomic_t *v)
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{
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unsigned long flags;
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int retval;
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(v, flags);
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retval = (v->counter -= i);
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local_irq_restore(flags);
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cris_atomic_restore(v, flags);
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return retval;
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}
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@ -73,39 +62,35 @@ extern __inline__ int atomic_sub_and_test(int i, volatile atomic_t *v)
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{
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int retval;
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unsigned long flags;
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(v, flags);
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retval = (v->counter -= i) == 0;
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local_irq_restore(flags);
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cris_atomic_restore(v, flags);
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return retval;
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}
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extern __inline__ void atomic_inc(volatile atomic_t *v)
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{
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unsigned long flags;
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(v, flags);
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(v->counter)++;
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local_irq_restore(flags);
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cris_atomic_restore(v, flags);
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}
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extern __inline__ void atomic_dec(volatile atomic_t *v)
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{
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unsigned long flags;
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(v, flags);
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(v->counter)--;
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local_irq_restore(flags);
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cris_atomic_restore(v, flags);
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}
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extern __inline__ int atomic_inc_return(volatile atomic_t *v)
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{
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unsigned long flags;
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int retval;
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(v, flags);
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retval = (v->counter)++;
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local_irq_restore(flags);
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cris_atomic_restore(v, flags);
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return retval;
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}
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@ -113,20 +98,18 @@ extern __inline__ int atomic_dec_return(volatile atomic_t *v)
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{
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unsigned long flags;
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int retval;
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(v, flags);
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retval = (v->counter)--;
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local_irq_restore(flags);
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cris_atomic_restore(v, flags);
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return retval;
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}
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extern __inline__ int atomic_dec_and_test(volatile atomic_t *v)
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{
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int retval;
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unsigned long flags;
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(v, flags);
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retval = --(v->counter) == 0;
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local_irq_restore(flags);
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cris_atomic_restore(v, flags);
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return retval;
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}
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@ -134,10 +117,9 @@ extern __inline__ int atomic_inc_and_test(volatile atomic_t *v)
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{
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int retval;
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unsigned long flags;
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(v, flags);
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retval = ++(v->counter) == 0;
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local_irq_restore(flags);
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cris_atomic_restore(v, flags);
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return retval;
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}
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* registers like cr3 on the i386
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*/
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extern volatile pgd_t *current_pgd; /* defined in arch/cris/mm/fault.c */
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extern volatile DEFINE_PER_CPU(pgd_t *,current_pgd); /* defined in arch/cris/mm/fault.c */
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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might_sleep();
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/* atomically decrement the semaphores count, and if its negative, we wait */
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(sem, flags);
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failed = --(sem->count.counter) < 0;
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local_irq_restore(flags);
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cris_atomic_restore(sem, flags);
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if(failed) {
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__down(sem);
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}
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@ -95,10 +94,9 @@ extern inline int down_interruptible(struct semaphore * sem)
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might_sleep();
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/* atomically decrement the semaphores count, and if its negative, we wait */
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(sem, flags);
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failed = --(sem->count.counter) < 0;
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local_irq_restore(flags);
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cris_atomic_restore(sem, flags);
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if(failed)
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failed = __down_interruptible(sem);
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return(failed);
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@ -109,13 +107,13 @@ extern inline int down_trylock(struct semaphore * sem)
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unsigned long flags;
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int failed;
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(sem, flags);
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failed = --(sem->count.counter) < 0;
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local_irq_restore(flags);
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cris_atomic_restore(sem, flags);
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if(failed)
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failed = __down_trylock(sem);
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return(failed);
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}
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/*
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@ -130,10 +128,9 @@ extern inline void up(struct semaphore * sem)
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int wakeup;
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/* atomically increment the semaphores count, and if it was negative, we wake people */
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local_save_flags(flags);
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local_irq_disable();
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cris_atomic_save(sem, flags);
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wakeup = ++(sem->count.counter) <= 0;
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local_irq_restore(flags);
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cris_atomic_restore(sem, flags);
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if(wakeup) {
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__up(sem);
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}
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@ -1,4 +1,11 @@
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#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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#include <linux/cpumask.h>
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extern cpumask_t phys_cpu_present_map;
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#define cpu_possible_map phys_cpu_present_map
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#define __smp_processor_id() (current_thread_info()->cpu)
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#endif
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1
include/asm-cris/spinlock.h
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1
include/asm-cris/spinlock.h
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@ -0,0 +1 @@
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#include <asm/arch/spinlock.h>
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@ -18,13 +18,26 @@
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*
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*/
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extern void __flush_tlb_all(void);
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extern void __flush_tlb_mm(struct mm_struct *mm);
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extern void __flush_tlb_page(struct vm_area_struct *vma,
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unsigned long addr);
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#ifdef CONFIG_SMP
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extern void flush_tlb_all(void);
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extern void flush_tlb_mm(struct mm_struct *mm);
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extern void flush_tlb_page(struct vm_area_struct *vma,
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unsigned long addr);
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extern void flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start,
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unsigned long end);
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#else
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#define flush_tlb_all __flush_tlb_all
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#define flush_tlb_mm __flush_tlb_mm
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#define flush_tlb_page __flush_tlb_page
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#endif
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static inline void flush_tlb_range(struct vm_area_struct * vma, unsigned long start, unsigned long end)
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{
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flush_tlb_mm(vma->vm_mm);
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}
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extern inline void flush_tlb_pgtables(struct mm_struct *mm,
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unsigned long start, unsigned long end)
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