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drm/nouveau/pm: cosmetic changes

Browse Source 
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2015-08-20 14:54:08 +10:00
parent 74137ffcd1
commit 8c1aeaa139
7 changed files with 135 additions and 144 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/nouveau/include/nvkm/engine/pm.h
View File

@ -5,7 +5,7 @@
struct nvkm_perfdom;
struct nvkm_perfctr;
struct nvkm_pm {
struct nvkm_engine base;
struct nvkm_engine engine;
struct nvkm_perfctx *context;
void *profile_data;

151
drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c
View File

@ -31,12 +31,12 @@
#include <nvif/unpack.h>
static u8
nvkm_pm_count_perfdom(struct nvkm_pm *ppm)
nvkm_pm_count_perfdom(struct nvkm_pm *pm)
{
struct nvkm_perfdom *dom;
u8 domain_nr = 0;
list_for_each_entry(dom, &ppm->domains, head)
list_for_each_entry(dom, &pm->domains, head)
domain_nr++;
return domain_nr;
}
@ -57,12 +57,12 @@ nvkm_perfdom_count_perfsig(struct nvkm_perfdom *dom)
}
static struct nvkm_perfdom *
nvkm_perfdom_find(struct nvkm_pm *ppm, int di)
nvkm_perfdom_find(struct nvkm_pm *pm, int di)
{
struct nvkm_perfdom *dom;
int tmp = 0;
list_for_each_entry(dom, &ppm->domains, head) {
list_for_each_entry(dom, &pm->domains, head) {
if (tmp++ == di)
return dom;
}
@ -70,13 +70,12 @@ nvkm_perfdom_find(struct nvkm_pm *ppm, int di)
}
struct nvkm_perfsig *
nvkm_perfsig_find(struct nvkm_pm *ppm, uint8_t di, uint8_t si,
struct nvkm_perfdom **pdom)
nvkm_perfsig_find(struct nvkm_pm *pm, u8 di, u8 si, struct nvkm_perfdom **pdom)
{
struct nvkm_perfdom *dom = *pdom;
if (dom == NULL) {
dom = nvkm_perfdom_find(ppm, di);
dom = nvkm_perfdom_find(pm, di);
if (dom == NULL)
return NULL;
*pdom = dom;
@ -100,7 +99,7 @@ nvkm_perfsig_count_perfsrc(struct nvkm_perfsig *sig)
}
static struct nvkm_perfsrc *
nvkm_perfsrc_find(struct nvkm_pm *ppm, struct nvkm_perfsig *sig, int si)
nvkm_perfsrc_find(struct nvkm_pm *pm, struct nvkm_perfsig *sig, int si)
{
struct nvkm_perfsrc *src;
bool found = false;
@ -115,7 +114,7 @@ nvkm_perfsrc_find(struct nvkm_pm *ppm, struct nvkm_perfsig *sig, int si)
}
if (found) {
list_for_each_entry(src, &ppm->sources, head) {
list_for_each_entry(src, &pm->sources, head) {
if (tmp++ == si)
return src;
}
@ -125,7 +124,7 @@ nvkm_perfsrc_find(struct nvkm_pm *ppm, struct nvkm_perfsig *sig, int si)
}
static int
nvkm_perfsrc_enable(struct nvkm_pm *ppm, struct nvkm_perfctr *ctr)
nvkm_perfsrc_enable(struct nvkm_pm *pm, struct nvkm_perfctr *ctr)
{
struct nvkm_perfdom *dom = NULL;
struct nvkm_perfsig *sig;
@ -135,12 +134,12 @@ nvkm_perfsrc_enable(struct nvkm_pm *ppm, struct nvkm_perfctr *ctr)
for (i = 0; i < 4; i++) {
for (j = 0; j < 8 && ctr->source[i][j]; j++) {
sig = nvkm_perfsig_find(ppm, ctr->domain,
sig = nvkm_perfsig_find(pm, ctr->domain,
ctr->signal[i], &dom);
if (!sig)
return -EINVAL;
src = nvkm_perfsrc_find(ppm, sig, ctr->source[i][j]);
src = nvkm_perfsrc_find(pm, sig, ctr->source[i][j]);
if (!src)
return -EINVAL;
@ -152,8 +151,8 @@ nvkm_perfsrc_enable(struct nvkm_pm *ppm, struct nvkm_perfctr *ctr)
value |= ((ctr->source[i][j] >> 32) << src->shift);
/* enable the source */
nv_mask(ppm, src->addr, mask, value);
nv_debug(ppm, "enabled source 0x%08x 0x%08x 0x%08x\n",
nv_mask(pm, src->addr, mask, value);
nv_debug(pm, "enabled source 0x%08x 0x%08x 0x%08x\n",
src->addr, mask, value);
}
}
@ -161,7 +160,7 @@ nvkm_perfsrc_enable(struct nvkm_pm *ppm, struct nvkm_perfctr *ctr)
}
static int
nvkm_perfsrc_disable(struct nvkm_pm *ppm, struct nvkm_perfctr *ctr)
nvkm_perfsrc_disable(struct nvkm_pm *pm, struct nvkm_perfctr *ctr)
{
struct nvkm_perfdom *dom = NULL;
struct nvkm_perfsig *sig;
@ -171,12 +170,12 @@ nvkm_perfsrc_disable(struct nvkm_pm *ppm, struct nvkm_perfctr *ctr)
for (i = 0; i < 4; i++) {
for (j = 0; j < 8 && ctr->source[i][j]; j++) {
sig = nvkm_perfsig_find(ppm, ctr->domain,
sig = nvkm_perfsig_find(pm, ctr->domain,
ctr->signal[i], &dom);
if (!sig)
return -EINVAL;
src = nvkm_perfsrc_find(ppm, sig, ctr->source[i][j]);
src = nvkm_perfsrc_find(pm, sig, ctr->source[i][j]);
if (!src)
return -EINVAL;
@ -187,8 +186,8 @@ nvkm_perfsrc_disable(struct nvkm_pm *ppm, struct nvkm_perfctr *ctr)
mask |= (src->mask << src->shift);
/* disable the source */
nv_mask(ppm, src->addr, mask, 0);
nv_debug(ppm, "disabled source 0x%08x 0x%08x\n",
nv_mask(pm, src->addr, mask, 0);
nv_debug(pm, "disabled source 0x%08x 0x%08x\n",
src->addr, mask);
}
}
@ -204,7 +203,7 @@ nvkm_perfdom_init(struct nvkm_object *object, void *data, u32 size)
union {
struct nvif_perfdom_init none;
} *args = data;
struct nvkm_pm *ppm = (void *)object->engine;
struct nvkm_pm *pm = (void *)object->engine;
struct nvkm_perfdom *dom = (void *)object;
int ret, i;
@ -216,15 +215,15 @@ nvkm_perfdom_init(struct nvkm_object *object, void *data, u32 size)
for (i = 0; i < 4; i++) {
if (dom->ctr[i]) {
dom->func->init(ppm, dom, dom->ctr[i]);
dom->func->init(pm, dom, dom->ctr[i]);
/* enable sources */
nvkm_perfsrc_enable(ppm, dom->ctr[i]);
nvkm_perfsrc_enable(pm, dom->ctr[i]);
}
}
/* start next batch of counters for sampling */
dom->func->next(ppm, dom);
dom->func->next(pm, dom);
return 0;
}
@ -234,7 +233,7 @@ nvkm_perfdom_sample(struct nvkm_object *object, void *data, u32 size)
union {
struct nvif_perfdom_sample none;
} *args = data;
struct nvkm_pm *ppm = (void *)object->engine;
struct nvkm_pm *pm = (void *)object->engine;
struct nvkm_perfdom *dom;
int ret;
@ -243,11 +242,11 @@ nvkm_perfdom_sample(struct nvkm_object *object, void *data, u32 size)
nv_ioctl(object, "perfdom sample\n");
} else
return ret;
ppm->sequence++;
pm->sequence++;
/* sample previous batch of counters */
list_for_each_entry(dom, &ppm->domains, head)
dom->func->next(ppm, dom);
list_for_each_entry(dom, &pm->domains, head)
dom->func->next(pm, dom);
return 0;
}
@ -258,7 +257,7 @@ nvkm_perfdom_read(struct nvkm_object *object, void *data, u32 size)
union {
struct nvif_perfdom_read_v0 v0;
} *args = data;
struct nvkm_pm *ppm = (void *)object->engine;
struct nvkm_pm *pm = (void *)object->engine;
struct nvkm_perfdom *dom = (void *)object;
int ret, i;
@ -270,7 +269,7 @@ nvkm_perfdom_read(struct nvkm_object *object, void *data, u32 size)
for (i = 0; i < 4; i++) {
if (dom->ctr[i])
dom->func->read(ppm, dom, dom->ctr[i]);
dom->func->read(pm, dom, dom->ctr[i]);
}
if (!dom->clk)
@ -302,14 +301,14 @@ nvkm_perfdom_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size)
static void
nvkm_perfdom_dtor(struct nvkm_object *object)
{
struct nvkm_pm *ppm = (void *)object->engine;
struct nvkm_pm *pm = (void *)object->engine;
struct nvkm_perfdom *dom = (void *)object;
int i;
for (i = 0; i < 4; i++) {
struct nvkm_perfctr *ctr = dom->ctr[i];
if (ctr) {
nvkm_perfsrc_disable(ppm, ctr);
nvkm_perfsrc_disable(pm, ctr);
if (ctr->head.next)
list_del(&ctr->head);
}
@ -319,9 +318,9 @@ nvkm_perfdom_dtor(struct nvkm_object *object)
}
static int
nvkm_perfctr_new(struct nvkm_perfdom *dom, int slot, uint8_t domain,
struct nvkm_perfsig *signal[4], uint64_t source[4][8],
uint16_t logic_op, struct nvkm_perfctr **pctr)
nvkm_perfctr_new(struct nvkm_perfdom *dom, int slot, u8 domain,
struct nvkm_perfsig *signal[4], u64 source[4][8],
u16 logic_op, struct nvkm_perfctr **pctr)
{
struct nvkm_perfctr *ctr;
int i, j;
@ -356,7 +355,7 @@ nvkm_perfdom_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
union {
struct nvif_perfdom_v0 v0;
} *args = data;
struct nvkm_pm *ppm = (void *)engine;
struct nvkm_pm *pm = (void *)engine;
struct nvkm_perfdom *sdom = NULL;
struct nvkm_perfctr *ctr[4] = {};
struct nvkm_perfdom *dom;
@ -375,7 +374,7 @@ nvkm_perfdom_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
u64 src[4][8] = {};
for (s = 0; s < ARRAY_SIZE(args->v0.ctr[c].signal); s++) {
sig[s] = nvkm_perfsig_find(ppm, args->v0.domain,
sig[s] = nvkm_perfsig_find(pm, args->v0.domain,
args->v0.ctr[c].signal[s],
&sdom);
if (args->v0.ctr[c].signal[s] && !sig[s])
@ -383,7 +382,7 @@ nvkm_perfdom_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
for (m = 0; m < 8; m++) {
src[s][m] = args->v0.ctr[c].source[s][m];
if (src[s][m] && !nvkm_perfsrc_find(ppm, sig[s],
if (src[s][m] && !nvkm_perfsrc_find(pm, sig[s],
src[s][m]))
return -EINVAL;
}
@ -429,7 +428,7 @@ nvkm_perfmon_mthd_query_domain(struct nvkm_object *object, void *data, u32 size)
union {
struct nvif_perfmon_query_domain_v0 v0;
} *args = data;
struct nvkm_pm *ppm = (void *)object->engine;
struct nvkm_pm *pm = (void *)object->engine;
struct nvkm_perfdom *dom;
u8 domain_nr;
int di, ret;
@ -442,12 +441,12 @@ nvkm_perfmon_mthd_query_domain(struct nvkm_object *object, void *data, u32 size)
} else
return ret;
domain_nr = nvkm_pm_count_perfdom(ppm);
domain_nr = nvkm_pm_count_perfdom(pm);
if (di >= (int)domain_nr)
return -EINVAL;
if (di >= 0) {
dom = nvkm_perfdom_find(ppm, di);
dom = nvkm_perfdom_find(pm, di);
if (dom == NULL)
return -EINVAL;
@ -476,7 +475,7 @@ nvkm_perfmon_mthd_query_signal(struct nvkm_object *object, void *data, u32 size)
struct nvif_perfmon_query_signal_v0 v0;
} *args = data;
struct nvkm_device *device = nv_device(object);
struct nvkm_pm *ppm = (void *)object->engine;
struct nvkm_pm *pm = (void *)object->engine;
struct nvkm_perfdom *dom;
struct nvkm_perfsig *sig;
const bool all = nvkm_boolopt(device->cfgopt, "NvPmShowAll", false);
@ -492,7 +491,7 @@ nvkm_perfmon_mthd_query_signal(struct nvkm_object *object, void *data, u32 size)
} else
return ret;
dom = nvkm_perfdom_find(ppm, args->v0.domain);
dom = nvkm_perfdom_find(pm, args->v0.domain);
if (dom == NULL || si >= (int)dom->signal_nr)
return -EINVAL;
@ -527,7 +526,7 @@ nvkm_perfmon_mthd_query_source(struct nvkm_object *object, void *data, u32 size)
union {
struct nvif_perfmon_query_source_v0 v0;
} *args = data;
struct nvkm_pm *ppm = (void *)object->engine;
struct nvkm_pm *pm = (void *)object->engine;
struct nvkm_perfdom *dom = NULL;
struct nvkm_perfsig *sig;
struct nvkm_perfsrc *src;
@ -544,7 +543,7 @@ nvkm_perfmon_mthd_query_source(struct nvkm_object *object, void *data, u32 size)
} else
return ret;
sig = nvkm_perfsig_find(ppm, args->v0.domain, args->v0.signal, &dom);
sig = nvkm_perfsig_find(pm, args->v0.domain, args->v0.signal, &dom);
if (!sig)
return -EINVAL;
@ -553,7 +552,7 @@ nvkm_perfmon_mthd_query_source(struct nvkm_object *object, void *data, u32 size)
return -EINVAL;
if (si >= 0) {
src = nvkm_perfsrc_find(ppm, sig, sig->source[si]);
src = nvkm_perfsrc_find(pm, sig, sig->source[si]);
if (!src)
return -EINVAL;
@ -631,14 +630,14 @@ nvkm_pm_sclass[] = {
static void
nvkm_perfctx_dtor(struct nvkm_object *object)
{
struct nvkm_pm *ppm = (void *)object->engine;
struct nvkm_pm *pm = (void *)object->engine;
struct nvkm_perfctx *ctx = (void *)object;
mutex_lock(&nv_subdev(ppm)->mutex);
mutex_lock(&nv_subdev(pm)->mutex);
nvkm_engctx_destroy(&ctx->base);
if (ppm->context == ctx)
ppm->context = NULL;
mutex_unlock(&nv_subdev(ppm)->mutex);
if (pm->context == ctx)
pm->context = NULL;
mutex_unlock(&nv_subdev(pm)->mutex);
}
static int
@ -646,7 +645,7 @@ nvkm_perfctx_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct nvkm_pm *ppm = (void *)engine;
struct nvkm_pm *pm = (void *)engine;
struct nvkm_perfctx *ctx;
int ret;
@ -662,12 +661,12 @@ nvkm_perfctx_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
if (ret)
return ret;
mutex_lock(&nv_subdev(ppm)->mutex);
if (ppm->context == NULL)
ppm->context = ctx;
if (ctx != ppm->context)
mutex_lock(&nv_subdev(pm)->mutex);
if (pm->context == NULL)
pm->context = ctx;
if (ctx != pm->context)
ret = -EBUSY;
mutex_unlock(&nv_subdev(ppm)->mutex);
mutex_unlock(&nv_subdev(pm)->mutex);
return ret;
}
@ -687,7 +686,7 @@ nvkm_pm_cclass = {
* PPM engine/subdev functions
******************************************************************************/
int
nvkm_perfsrc_new(struct nvkm_pm *ppm, struct nvkm_perfsig *sig,
nvkm_perfsrc_new(struct nvkm_pm *pm, struct nvkm_perfsig *sig,
const struct nvkm_specsrc *spec)
{
const struct nvkm_specsrc *ssrc;
@ -708,7 +707,7 @@ nvkm_perfsrc_new(struct nvkm_pm *ppm, struct nvkm_perfsig *sig,
u8 source_id = 0;
u32 len;
list_for_each_entry(src, &ppm->sources, head) {
list_for_each_entry(src, &pm->sources, head) {
if (src->addr == ssrc->addr &&
src->shift == smux->shift) {
found = true;
@ -730,12 +729,14 @@ nvkm_perfsrc_new(struct nvkm_pm *ppm, struct nvkm_perfsig *sig,
len = strlen(ssrc->name) +
strlen(smux->name) + 2;
src->name = kzalloc(len, GFP_KERNEL);
if (!src->name)
if (!src->name) {
kfree(src);
return -ENOMEM;
}
snprintf(src->name, len, "%s_%s", ssrc->name,
smux->name);
list_add_tail(&src->head, &ppm->sources);
list_add_tail(&src->head, &pm->sources);
}
sig->source[source_nr++] = source_id + 1;
@ -748,7 +749,7 @@ nvkm_perfsrc_new(struct nvkm_pm *ppm, struct nvkm_perfsig *sig,
}
int
nvkm_perfdom_new(struct nvkm_pm *ppm, const char *name, u32 mask,
nvkm_perfdom_new(struct nvkm_pm *pm, const char *name, u32 mask,
u32 base, u32 size_unit, u32 size_domain,
const struct nvkm_specdom *spec)
{
@ -778,7 +779,7 @@ nvkm_perfdom_new(struct nvkm_pm *ppm, const char *name, u32 mask,
"%s/%02x", name, (int)(sdom - spec));
}
list_add_tail(&dom->head, &ppm->domains);
list_add_tail(&dom->head, &pm->domains);
INIT_LIST_HEAD(&dom->list);
dom->func = sdom->func;
dom->addr = addr;
@ -789,7 +790,7 @@ nvkm_perfdom_new(struct nvkm_pm *ppm, const char *name, u32 mask,
struct nvkm_perfsig *sig =
&dom->signal[ssig->signal];
sig->name = ssig->name;
ret = nvkm_perfsrc_new(ppm, sig, ssig->source);
ret = nvkm_perfsrc_new(pm, sig, ssig->source);
if (ret)
return ret;
ssig++;
@ -807,52 +808,52 @@ nvkm_perfdom_new(struct nvkm_pm *ppm, const char *name, u32 mask,
int
_nvkm_pm_fini(struct nvkm_object *object, bool suspend)
{
struct nvkm_pm *ppm = (void *)object;
return nvkm_engine_fini(&ppm->base, suspend);
struct nvkm_pm *pm = (void *)object;
return nvkm_engine_fini(&pm->engine, suspend);
}
int
_nvkm_pm_init(struct nvkm_object *object)
{
struct nvkm_pm *ppm = (void *)object;
return nvkm_engine_init(&ppm->base);
struct nvkm_pm *pm = (void *)object;
return nvkm_engine_init(&pm->engine);
}
void
_nvkm_pm_dtor(struct nvkm_object *object)
{
struct nvkm_pm *ppm = (void *)object;
struct nvkm_pm *pm = (void *)object;
struct nvkm_perfdom *dom, *next_dom;
struct nvkm_perfsrc *src, *next_src;
list_for_each_entry_safe(dom, next_dom, &ppm->domains, head) {
list_for_each_entry_safe(dom, next_dom, &pm->domains, head) {
list_del(&dom->head);
kfree(dom);
}
list_for_each_entry_safe(src, next_src, &ppm->sources, head) {
list_for_each_entry_safe(src, next_src, &pm->sources, head) {
list_del(&src->head);
kfree(src->name);
kfree(src);
}
nvkm_engine_destroy(&ppm->base);
nvkm_engine_destroy(&pm->engine);
}
int
nvkm_pm_create_(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, int length, void **pobject)
{
struct nvkm_pm *ppm;
struct nvkm_pm *pm;
int ret;
ret = nvkm_engine_create_(parent, engine, oclass, true, "PPM",
"pm", length, pobject);
ppm = *pobject;
pm = *pobject;
if (ret)
return ret;
INIT_LIST_HEAD(&ppm->domains);
INIT_LIST_HEAD(&ppm->sources);
INIT_LIST_HEAD(&pm->domains);
INIT_LIST_HEAD(&pm->sources);
return 0;
}

67
drivers/gpu/drm/nouveau/nvkm/engine/pm/gf100.c
View File

@ -125,10 +125,9 @@ gf100_pm_part[] = {
};
static void
gf100_perfctr_init(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
gf100_perfctr_init(struct nvkm_pm *pm, struct nvkm_perfdom *dom,
struct nvkm_perfctr *ctr)
{
struct gf100_pm_priv *priv = (void *)ppm;
struct gf100_pm_cntr *cntr = (void *)ctr;
u32 log = ctr->logic_op;
u32 src = 0x00000000;
@ -137,34 +136,32 @@ gf100_perfctr_init(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
for (i = 0; i < 4; i++)
src |= ctr->signal[i] << (i * 8);
nv_wr32(priv, dom->addr + 0x09c, 0x00040002 | (dom->mode << 3));
nv_wr32(priv, dom->addr + 0x100, 0x00000000);
nv_wr32(priv, dom->addr + 0x040 + (cntr->base.slot * 0x08), src);
nv_wr32(priv, dom->addr + 0x044 + (cntr->base.slot * 0x08), log);
nv_wr32(pm, dom->addr + 0x09c, 0x00040002 | (dom->mode << 3));
nv_wr32(pm, dom->addr + 0x100, 0x00000000);
nv_wr32(pm, dom->addr + 0x040 + (cntr->base.slot * 0x08), src);
nv_wr32(pm, dom->addr + 0x044 + (cntr->base.slot * 0x08), log);
}
static void
gf100_perfctr_read(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
gf100_perfctr_read(struct nvkm_pm *pm, struct nvkm_perfdom *dom,
struct nvkm_perfctr *ctr)
{
struct gf100_pm_priv *priv = (void *)ppm;
struct gf100_pm_cntr *cntr = (void *)ctr;
switch (cntr->base.slot) {
case 0: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x08c); break;
case 1: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x088); break;
case 2: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x080); break;
case 3: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x090); break;
case 0: cntr->base.ctr = nv_rd32(pm, dom->addr + 0x08c); break;
case 1: cntr->base.ctr = nv_rd32(pm, dom->addr + 0x088); break;
case 2: cntr->base.ctr = nv_rd32(pm, dom->addr + 0x080); break;
case 3: cntr->base.ctr = nv_rd32(pm, dom->addr + 0x090); break;
}
dom->clk = nv_rd32(priv, dom->addr + 0x070);
dom->clk = nv_rd32(pm, dom->addr + 0x070);
}
static void
gf100_perfctr_next(struct nvkm_pm *ppm, struct nvkm_perfdom *dom)
gf100_perfctr_next(struct nvkm_pm *pm, struct nvkm_perfdom *dom)
{
struct gf100_pm_priv *priv = (void *)ppm;
nv_wr32(priv, dom->addr + 0x06c, dom->signal_nr - 0x40 + 0x27);
nv_wr32(priv, dom->addr + 0x0ec, 0x00000011);
nv_wr32(pm, dom->addr + 0x06c, dom->signal_nr - 0x40 + 0x27);
nv_wr32(pm, dom->addr + 0x0ec, 0x00000011);
}
const struct nvkm_funcdom
@ -177,10 +174,10 @@ gf100_perfctr_func = {
int
gf100_pm_fini(struct nvkm_object *object, bool suspend)
{
struct gf100_pm_priv *priv = (void *)object;
nv_mask(priv, 0x000200, 0x10000000, 0x00000000);
nv_mask(priv, 0x000200, 0x10000000, 0x10000000);
return nvkm_pm_fini(&priv->base, suspend);
struct nvkm_pm *pm = (void *)object;
nv_mask(pm, 0x000200, 0x10000000, 0x00000000);
nv_mask(pm, 0x000200, 0x10000000, 0x10000000);
return nvkm_pm_fini(pm, suspend);
}
int
@ -189,43 +186,43 @@ gf100_pm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_object **pobject)
{
struct gf100_pm_oclass *mclass = (void *)oclass;
struct gf100_pm_priv *priv;
struct nvkm_pm *pm;
u32 mask;
int ret;
ret = nvkm_pm_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv);
ret = nvkm_pm_create(parent, engine, oclass, &pm);
*pobject = nv_object(pm);
if (ret)
return ret;
/* HUB */
ret = nvkm_perfdom_new(&priv->base, "hub", 0, 0x1b0000, 0, 0x200,
ret = nvkm_perfdom_new(pm, "hub", 0, 0x1b0000, 0, 0x200,
mclass->doms_hub);
if (ret)
return ret;
/* GPC */
mask = (1 << nv_rd32(priv, 0x022430)) - 1;
mask &= ~nv_rd32(priv, 0x022504);
mask &= ~nv_rd32(priv, 0x022584);
mask = (1 << nv_rd32(pm, 0x022430)) - 1;
mask &= ~nv_rd32(pm, 0x022504);
mask &= ~nv_rd32(pm, 0x022584);
ret = nvkm_perfdom_new(&priv->base, "gpc", mask, 0x180000,
ret = nvkm_perfdom_new(pm, "gpc", mask, 0x180000,
0x1000, 0x200, mclass->doms_gpc);
if (ret)
return ret;
/* PART */
mask = (1 << nv_rd32(priv, 0x022438)) - 1;
mask &= ~nv_rd32(priv, 0x022548);
mask &= ~nv_rd32(priv, 0x0225c8);
mask = (1 << nv_rd32(pm, 0x022438)) - 1;
mask &= ~nv_rd32(pm, 0x022548);
mask &= ~nv_rd32(pm, 0x0225c8);
ret = nvkm_perfdom_new(&priv->base, "part", mask, 0x1a0000,
ret = nvkm_perfdom_new(pm, "part", mask, 0x1a0000,
0x1000, 0x200, mclass->doms_part);
if (ret)
return ret;
nv_engine(priv)->cclass = &nvkm_pm_cclass;
nv_engine(priv)->sclass = nvkm_pm_sclass;
nv_engine(pm)->cclass = &nvkm_pm_cclass;
nv_engine(pm)->sclass = nvkm_pm_sclass;
return 0;
}

4
drivers/gpu/drm/nouveau/nvkm/engine/pm/gf100.h
View File

@ -9,10 +9,6 @@ struct gf100_pm_oclass {
const struct nvkm_specdom *doms_part;
};
struct gf100_pm_priv {
struct nvkm_pm base;
};
int gf100_pm_ctor(struct nvkm_object *, struct nvkm_object *,
struct nvkm_oclass *, void *data, u32 size,
struct nvkm_object **pobject);

10
drivers/gpu/drm/nouveau/nvkm/engine/pm/gk110.c
View File

@ -28,16 +28,16 @@ gk110_pm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct gf100_pm_priv *priv;
struct nvkm_pm *pm;
int ret;
ret = nvkm_pm_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv);
ret = nvkm_pm_create(parent, engine, oclass, &pm);
*pobject = nv_object(pm);
if (ret)
return ret;
nv_engine(priv)->cclass = &nvkm_pm_cclass;
nv_engine(priv)->sclass = nvkm_pm_sclass;
nv_engine(pm)->cclass = &nvkm_pm_cclass;
nv_engine(pm)->sclass = nvkm_pm_sclass;
return 0;
}

43
drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.c
View File

@ -24,10 +24,9 @@
#include "nv40.h"
static void
nv40_perfctr_init(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
nv40_perfctr_init(struct nvkm_pm *pm, struct nvkm_perfdom *dom,
struct nvkm_perfctr *ctr)
{
struct nv40_pm_priv *priv = (void *)ppm;
struct nv40_pm_cntr *cntr = (void *)ctr;
u32 log = ctr->logic_op;
u32 src = 0x00000000;
@ -36,34 +35,32 @@ nv40_perfctr_init(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
for (i = 0; i < 4; i++)
src |= ctr->signal[i] << (i * 8);
nv_wr32(priv, 0x00a7c0 + dom->addr, 0x00000001 | (dom->mode << 4));
nv_wr32(priv, 0x00a400 + dom->addr + (cntr->base.slot * 0x40), src);
nv_wr32(priv, 0x00a420 + dom->addr + (cntr->base.slot * 0x40), log);
nv_wr32(pm, 0x00a7c0 + dom->addr, 0x00000001 | (dom->mode << 4));
nv_wr32(pm, 0x00a400 + dom->addr + (cntr->base.slot * 0x40), src);
nv_wr32(pm, 0x00a420 + dom->addr + (cntr->base.slot * 0x40), log);
}
static void
nv40_perfctr_read(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
nv40_perfctr_read(struct nvkm_pm *pm, struct nvkm_perfdom *dom,
struct nvkm_perfctr *ctr)
{
struct nv40_pm_priv *priv = (void *)ppm;
struct nv40_pm_cntr *cntr = (void *)ctr;
switch (cntr->base.slot) {
case 0: cntr->base.ctr = nv_rd32(priv, 0x00a700 + dom->addr); break;
case 1: cntr->base.ctr = nv_rd32(priv, 0x00a6c0 + dom->addr); break;
case 2: cntr->base.ctr = nv_rd32(priv, 0x00a680 + dom->addr); break;
case 3: cntr->base.ctr = nv_rd32(priv, 0x00a740 + dom->addr); break;
case 0: cntr->base.ctr = nv_rd32(pm, 0x00a700 + dom->addr); break;
case 1: cntr->base.ctr = nv_rd32(pm, 0x00a6c0 + dom->addr); break;
case 2: cntr->base.ctr = nv_rd32(pm, 0x00a680 + dom->addr); break;
case 3: cntr->base.ctr = nv_rd32(pm, 0x00a740 + dom->addr); break;
}
dom->clk = nv_rd32(priv, 0x00a600 + dom->addr);
dom->clk = nv_rd32(pm, 0x00a600 + dom->addr);
}
static void
nv40_perfctr_next(struct nvkm_pm *ppm, struct nvkm_perfdom *dom)
nv40_perfctr_next(struct nvkm_pm *pm, struct nvkm_perfdom *dom)
{
struct nv40_pm_priv *priv = (void *)ppm;
if (priv->sequence != ppm->sequence) {
nv_wr32(priv, 0x400084, 0x00000020);
priv->sequence = ppm->sequence;
if (pm->sequence != pm->sequence) {
nv_wr32(pm, 0x400084, 0x00000020);
pm->sequence = pm->sequence;
}
}
@ -100,20 +97,20 @@ nv40_pm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_object **pobject)
{
struct nv40_pm_oclass *mclass = (void *)oclass;
struct nv40_pm_priv *priv;
struct nv40_pm *pm;
int ret;
ret = nvkm_pm_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv);
ret = nvkm_pm_create(parent, engine, oclass, &pm);
*pobject = nv_object(pm);
if (ret)
return ret;
ret = nvkm_perfdom_new(&priv->base, "pc", 0, 0, 0, 4, mclass->doms);
ret = nvkm_perfdom_new(&pm->base, "pc", 0, 0, 0, 4, mclass->doms);
if (ret)
return ret;
nv_engine(priv)->cclass = &nvkm_pm_cclass;
nv_engine(priv)->sclass = nvkm_pm_sclass;
nv_engine(pm)->cclass = &nvkm_pm_cclass;
nv_engine(pm)->sclass = nvkm_pm_sclass;
return 0;
}

2
drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.h
View File

@ -7,7 +7,7 @@ struct nv40_pm_oclass {
const struct nvkm_specdom *doms;
};
struct nv40_pm_priv {
struct nv40_pm {
struct nvkm_pm base;
u32 sequence;
};