forked from Minki/linux
Merge branch irq/print_chip into irq/irqchip-next
* irq/print_chip: : . : Convert irqchip drivers that use the .name field as a topology : description to the .irq_print_chip callback, which allows the : name to be made dymanic. The irq_chip structures are then made : 'const' in order to prevent further abuse. : . irqchip/versatile-fpga: Switch to dynamic chip name output irqchip/ts4800: Switch to dynamic chip name output irqchip/mvebu-pic: Switch to dynamic chip name output irqchip/lpc32xx: Switch to dynamic chip name output irqchip/gic: Switch to dynamic chip name output genirq/debugfs: Use irq_print_chip() when provided by irqchip genirq: Allow irq_chip registration functions to take a const irq_chip irqdomain: Let irq_domain_set_{info,hwirq_and_chip} take a const irq_chip Signed-off-by: Marc Zyngier <maz@kernel.org>
This commit is contained in:
commit
86c12c7386
@ -11,7 +11,6 @@
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/versatile-fpga.h>
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#include <linux/irqdomain.h>
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#include <linux/module.h>
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#include <linux/of.h>
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@ -34,6 +34,7 @@
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#include <linux/irqdomain.h>
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#include <linux/interrupt.h>
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#include <linux/percpu.h>
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#include <linux/seq_file.h>
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#include <linux/slab.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/chained_irq.h>
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@ -66,7 +67,6 @@ union gic_base {
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};
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struct gic_chip_data {
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struct irq_chip chip;
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union gic_base dist_base;
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union gic_base cpu_base;
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void __iomem *raw_dist_base;
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@ -397,18 +397,15 @@ static void gic_handle_cascade_irq(struct irq_desc *desc)
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chained_irq_exit(chip, desc);
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}
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static const struct irq_chip gic_chip = {
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.irq_mask = gic_mask_irq,
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.irq_unmask = gic_unmask_irq,
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.irq_eoi = gic_eoi_irq,
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.irq_set_type = gic_set_type,
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.irq_retrigger = gic_retrigger,
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.irq_get_irqchip_state = gic_irq_get_irqchip_state,
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.irq_set_irqchip_state = gic_irq_set_irqchip_state,
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.flags = IRQCHIP_SET_TYPE_MASKED |
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IRQCHIP_SKIP_SET_WAKE |
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IRQCHIP_MASK_ON_SUSPEND,
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};
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static void gic_irq_print_chip(struct irq_data *d, struct seq_file *p)
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{
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struct gic_chip_data *gic = irq_data_get_irq_chip_data(d);
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if (gic->domain->dev)
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seq_printf(p, gic->domain->dev->of_node->name);
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else
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seq_printf(p, "GIC-%d", (int)(gic - &gic_data[0]));
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}
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void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
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{
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@ -799,8 +796,12 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
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bool force)
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{
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void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + gic_irq(d);
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struct gic_chip_data *gic = irq_data_get_irq_chip_data(d);
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unsigned int cpu;
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if (unlikely(gic != &gic_data[0]))
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return -EINVAL;
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if (!force)
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cpu = cpumask_any_and(mask_val, cpu_online_mask);
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else
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@ -880,6 +881,39 @@ static __init void gic_smp_init(void)
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#define gic_ipi_send_mask NULL
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#endif
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static const struct irq_chip gic_chip = {
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.irq_mask = gic_mask_irq,
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.irq_unmask = gic_unmask_irq,
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.irq_eoi = gic_eoi_irq,
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.irq_set_type = gic_set_type,
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.irq_retrigger = gic_retrigger,
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.irq_set_affinity = gic_set_affinity,
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.ipi_send_mask = gic_ipi_send_mask,
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.irq_get_irqchip_state = gic_irq_get_irqchip_state,
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.irq_set_irqchip_state = gic_irq_set_irqchip_state,
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.irq_print_chip = gic_irq_print_chip,
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.flags = IRQCHIP_SET_TYPE_MASKED |
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IRQCHIP_SKIP_SET_WAKE |
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IRQCHIP_MASK_ON_SUSPEND,
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};
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static const struct irq_chip gic_chip_mode1 = {
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.name = "GICv2",
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.irq_mask = gic_eoimode1_mask_irq,
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.irq_unmask = gic_unmask_irq,
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.irq_eoi = gic_eoimode1_eoi_irq,
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.irq_set_type = gic_set_type,
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.irq_retrigger = gic_retrigger,
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.irq_set_affinity = gic_set_affinity,
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.ipi_send_mask = gic_ipi_send_mask,
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.irq_get_irqchip_state = gic_irq_get_irqchip_state,
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.irq_set_irqchip_state = gic_irq_set_irqchip_state,
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.irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity,
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.flags = IRQCHIP_SET_TYPE_MASKED |
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IRQCHIP_SKIP_SET_WAKE |
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IRQCHIP_MASK_ON_SUSPEND,
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};
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#ifdef CONFIG_BL_SWITCHER
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/*
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* gic_send_sgi - send a SGI directly to given CPU interface number
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@ -1024,15 +1058,19 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
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{
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struct gic_chip_data *gic = d->host_data;
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struct irq_data *irqd = irq_desc_get_irq_data(irq_to_desc(irq));
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const struct irq_chip *chip;
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chip = (static_branch_likely(&supports_deactivate_key) &&
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gic == &gic_data[0]) ? &gic_chip_mode1 : &gic_chip;
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switch (hw) {
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case 0 ... 31:
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irq_set_percpu_devid(irq);
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irq_domain_set_info(d, irq, hw, &gic->chip, d->host_data,
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irq_domain_set_info(d, irq, hw, chip, d->host_data,
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handle_percpu_devid_irq, NULL, NULL);
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break;
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default:
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irq_domain_set_info(d, irq, hw, &gic->chip, d->host_data,
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irq_domain_set_info(d, irq, hw, chip, d->host_data,
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handle_fasteoi_irq, NULL, NULL);
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irq_set_probe(irq);
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irqd_set_single_target(irqd);
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@ -1127,25 +1165,6 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
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.unmap = gic_irq_domain_unmap,
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};
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static void gic_init_chip(struct gic_chip_data *gic, const char *name,
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bool use_eoimode1)
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{
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/* Initialize irq_chip */
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gic->chip = gic_chip;
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gic->chip.name = name;
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if (use_eoimode1) {
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gic->chip.irq_mask = gic_eoimode1_mask_irq;
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gic->chip.irq_eoi = gic_eoimode1_eoi_irq;
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gic->chip.irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity;
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}
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if (gic == &gic_data[0]) {
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gic->chip.irq_set_affinity = gic_set_affinity;
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gic->chip.ipi_send_mask = gic_ipi_send_mask;
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}
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}
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static int gic_init_bases(struct gic_chip_data *gic,
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struct fwnode_handle *handle)
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{
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@ -1245,7 +1264,6 @@ error:
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static int __init __gic_init_bases(struct gic_chip_data *gic,
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struct fwnode_handle *handle)
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{
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char *name;
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int i, ret;
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if (WARN_ON(!gic || gic->domain))
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@ -1265,18 +1283,8 @@ static int __init __gic_init_bases(struct gic_chip_data *gic,
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pr_info("GIC: Using split EOI/Deactivate mode\n");
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}
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if (static_branch_likely(&supports_deactivate_key) && gic == &gic_data[0]) {
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name = kasprintf(GFP_KERNEL, "GICv2");
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gic_init_chip(gic, name, true);
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} else {
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name = kasprintf(GFP_KERNEL, "GIC-%d", (int)(gic-&gic_data[0]));
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gic_init_chip(gic, name, false);
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}
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ret = gic_init_bases(gic, handle);
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if (ret)
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kfree(name);
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else if (gic == &gic_data[0])
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if (gic == &gic_data[0])
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gic_smp_init();
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return ret;
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@ -1459,8 +1467,6 @@ int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq)
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if (!*gic)
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return -ENOMEM;
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gic_init_chip(*gic, dev->of_node->name, false);
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ret = gic_of_setup(*gic, dev->of_node);
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if (ret)
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return ret;
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@ -11,6 +11,7 @@
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/seq_file.h>
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#include <linux/slab.h>
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#include <asm/exception.h>
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@ -25,8 +26,8 @@
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struct lpc32xx_irq_chip {
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void __iomem *base;
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phys_addr_t addr;
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struct irq_domain *domain;
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struct irq_chip chip;
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};
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static struct lpc32xx_irq_chip *lpc32xx_mic_irqc;
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@ -118,6 +119,24 @@ static int lpc32xx_irq_set_type(struct irq_data *d, unsigned int type)
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return 0;
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}
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static void lpc32xx_irq_print_chip(struct irq_data *d, struct seq_file *p)
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{
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struct lpc32xx_irq_chip *ic = irq_data_get_irq_chip_data(d);
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if (ic == lpc32xx_mic_irqc)
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seq_printf(p, "%08x.mic", ic->addr);
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else
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seq_printf(p, "%08x.sic", ic->addr);
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}
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static const struct irq_chip lpc32xx_chip = {
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.irq_ack = lpc32xx_irq_ack,
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.irq_mask = lpc32xx_irq_mask,
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.irq_unmask = lpc32xx_irq_unmask,
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.irq_set_type = lpc32xx_irq_set_type,
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.irq_print_chip = lpc32xx_irq_print_chip,
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};
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static void __exception_irq_entry lpc32xx_handle_irq(struct pt_regs *regs)
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{
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struct lpc32xx_irq_chip *ic = lpc32xx_mic_irqc;
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@ -153,7 +172,7 @@ static int lpc32xx_irq_domain_map(struct irq_domain *id, unsigned int virq,
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struct lpc32xx_irq_chip *ic = id->host_data;
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irq_set_chip_data(virq, ic);
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irq_set_chip_and_handler(virq, &ic->chip, handle_level_irq);
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irq_set_chip_and_handler(virq, &lpc32xx_chip, handle_level_irq);
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irq_set_status_flags(virq, IRQ_LEVEL);
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irq_set_noprobe(virq);
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@ -183,6 +202,7 @@ static int __init lpc32xx_of_ic_init(struct device_node *node,
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if (!irqc)
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return -ENOMEM;
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irqc->addr = addr;
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irqc->base = of_iomap(node, 0);
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if (!irqc->base) {
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pr_err("%pOF: unable to map registers\n", node);
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@ -190,21 +210,11 @@ static int __init lpc32xx_of_ic_init(struct device_node *node,
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return -EINVAL;
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}
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irqc->chip.irq_ack = lpc32xx_irq_ack;
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irqc->chip.irq_mask = lpc32xx_irq_mask;
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irqc->chip.irq_unmask = lpc32xx_irq_unmask;
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irqc->chip.irq_set_type = lpc32xx_irq_set_type;
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if (is_mic)
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irqc->chip.name = kasprintf(GFP_KERNEL, "%08x.mic", addr);
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else
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irqc->chip.name = kasprintf(GFP_KERNEL, "%08x.sic", addr);
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irqc->domain = irq_domain_add_linear(node, NR_LPC32XX_IC_IRQS,
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&lpc32xx_irq_domain_ops, irqc);
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if (!irqc->domain) {
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pr_err("unable to add irq domain\n");
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iounmap(irqc->base);
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kfree(irqc->chip.name);
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kfree(irqc);
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return -ENODEV;
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}
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|
@ -18,6 +18,7 @@
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#include <linux/module.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/seq_file.h>
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#define PIC_CAUSE 0x0
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#define PIC_MASK 0x4
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@ -29,7 +30,7 @@ struct mvebu_pic {
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void __iomem *base;
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u32 parent_irq;
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struct irq_domain *domain;
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struct irq_chip irq_chip;
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struct platform_device *pdev;
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};
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static void mvebu_pic_reset(struct mvebu_pic *pic)
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@ -66,6 +67,20 @@ static void mvebu_pic_unmask_irq(struct irq_data *d)
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writel(reg, pic->base + PIC_MASK);
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}
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static void mvebu_pic_print_chip(struct irq_data *d, struct seq_file *p)
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{
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struct mvebu_pic *pic = irq_data_get_irq_chip_data(d);
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|
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seq_printf(p, dev_name(&pic->pdev->dev));
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}
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static const struct irq_chip mvebu_pic_chip = {
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.irq_mask = mvebu_pic_mask_irq,
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.irq_unmask = mvebu_pic_unmask_irq,
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.irq_eoi = mvebu_pic_eoi_irq,
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.irq_print_chip = mvebu_pic_print_chip,
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};
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static int mvebu_pic_irq_map(struct irq_domain *domain, unsigned int virq,
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irq_hw_number_t hwirq)
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{
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@ -73,8 +88,7 @@ static int mvebu_pic_irq_map(struct irq_domain *domain, unsigned int virq,
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irq_set_percpu_devid(virq);
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irq_set_chip_data(virq, pic);
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irq_set_chip_and_handler(virq, &pic->irq_chip,
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handle_percpu_devid_irq);
|
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irq_set_chip_and_handler(virq, &mvebu_pic_chip, handle_percpu_devid_irq);
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irq_set_status_flags(virq, IRQ_LEVEL);
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irq_set_probe(virq);
|
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|
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@ -120,22 +134,16 @@ static int mvebu_pic_probe(struct platform_device *pdev)
|
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{
|
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struct device_node *node = pdev->dev.of_node;
|
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struct mvebu_pic *pic;
|
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struct irq_chip *irq_chip;
|
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|
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pic = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_pic), GFP_KERNEL);
|
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if (!pic)
|
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return -ENOMEM;
|
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|
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pic->pdev = pdev;
|
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pic->base = devm_platform_ioremap_resource(pdev, 0);
|
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if (IS_ERR(pic->base))
|
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return PTR_ERR(pic->base);
|
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|
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irq_chip = &pic->irq_chip;
|
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irq_chip->name = dev_name(&pdev->dev);
|
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irq_chip->irq_mask = mvebu_pic_mask_irq;
|
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irq_chip->irq_unmask = mvebu_pic_unmask_irq;
|
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irq_chip->irq_eoi = mvebu_pic_eoi_irq;
|
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|
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pic->parent_irq = irq_of_parse_and_map(node, 0);
|
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if (pic->parent_irq <= 0) {
|
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dev_err(&pdev->dev, "Failed to parse parent interrupt\n");
|
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|
@ -19,14 +19,15 @@
|
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#include <linux/of_address.h>
|
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#include <linux/of_irq.h>
|
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#include <linux/platform_device.h>
|
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#include <linux/seq_file.h>
|
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|
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#define IRQ_MASK 0x4
|
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#define IRQ_STATUS 0x8
|
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|
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struct ts4800_irq_data {
|
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void __iomem *base;
|
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struct platform_device *pdev;
|
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struct irq_domain *domain;
|
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struct irq_chip irq_chip;
|
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};
|
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|
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static void ts4800_irq_mask(struct irq_data *d)
|
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@ -47,12 +48,25 @@ static void ts4800_irq_unmask(struct irq_data *d)
|
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writew(reg & ~mask, data->base + IRQ_MASK);
|
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}
|
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|
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static void ts4800_irq_print_chip(struct irq_data *d, struct seq_file *p)
|
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{
|
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struct ts4800_irq_data *data = irq_data_get_irq_chip_data(d);
|
||||
|
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seq_printf(p, "%s", dev_name(&data->pdev->dev));
|
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}
|
||||
|
||||
static const struct irq_chip ts4800_chip = {
|
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.irq_mask = ts4800_irq_mask,
|
||||
.irq_unmask = ts4800_irq_unmask,
|
||||
.irq_print_chip = ts4800_irq_print_chip,
|
||||
};
|
||||
|
||||
static int ts4800_irqdomain_map(struct irq_domain *d, unsigned int irq,
|
||||
irq_hw_number_t hwirq)
|
||||
{
|
||||
struct ts4800_irq_data *data = d->host_data;
|
||||
|
||||
irq_set_chip_and_handler(irq, &data->irq_chip, handle_simple_irq);
|
||||
irq_set_chip_and_handler(irq, &ts4800_chip, handle_simple_irq);
|
||||
irq_set_chip_data(irq, data);
|
||||
irq_set_noprobe(irq);
|
||||
|
||||
@ -92,13 +106,13 @@ static int ts4800_ic_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *node = pdev->dev.of_node;
|
||||
struct ts4800_irq_data *data;
|
||||
struct irq_chip *irq_chip;
|
||||
int parent_irq;
|
||||
|
||||
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
|
||||
if (!data)
|
||||
return -ENOMEM;
|
||||
|
||||
data->pdev = pdev;
|
||||
data->base = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(data->base))
|
||||
return PTR_ERR(data->base);
|
||||
@ -111,11 +125,6 @@ static int ts4800_ic_probe(struct platform_device *pdev)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
irq_chip = &data->irq_chip;
|
||||
irq_chip->name = dev_name(&pdev->dev);
|
||||
irq_chip->irq_mask = ts4800_irq_mask;
|
||||
irq_chip->irq_unmask = ts4800_irq_unmask;
|
||||
|
||||
data->domain = irq_domain_add_linear(node, 8, &ts4800_ic_ops, data);
|
||||
if (!data->domain) {
|
||||
dev_err(&pdev->dev, "cannot add IRQ domain\n");
|
||||
|
@ -7,12 +7,12 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/irqchip.h>
|
||||
#include <linux/irqchip/chained_irq.h>
|
||||
#include <linux/irqchip/versatile-fpga.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/seq_file.h>
|
||||
|
||||
#include <asm/exception.h>
|
||||
#include <asm/mach/irq.h>
|
||||
@ -34,14 +34,12 @@
|
||||
/**
|
||||
* struct fpga_irq_data - irq data container for the FPGA IRQ controller
|
||||
* @base: memory offset in virtual memory
|
||||
* @chip: chip container for this instance
|
||||
* @domain: IRQ domain for this instance
|
||||
* @valid: mask for valid IRQs on this controller
|
||||
* @used_irqs: number of active IRQs on this controller
|
||||
*/
|
||||
struct fpga_irq_data {
|
||||
void __iomem *base;
|
||||
struct irq_chip chip;
|
||||
u32 valid;
|
||||
struct irq_domain *domain;
|
||||
u8 used_irqs;
|
||||
@ -67,6 +65,20 @@ static void fpga_irq_unmask(struct irq_data *d)
|
||||
writel(mask, f->base + IRQ_ENABLE_SET);
|
||||
}
|
||||
|
||||
static void fpga_irq_print_chip(struct irq_data *d, struct seq_file *p)
|
||||
{
|
||||
struct fpga_irq_data *f = irq_data_get_irq_chip_data(d);
|
||||
|
||||
seq_printf(p, irq_domain_get_of_node(f->domain)->name);
|
||||
}
|
||||
|
||||
static const struct irq_chip fpga_chip = {
|
||||
.irq_ack = fpga_irq_mask,
|
||||
.irq_mask = fpga_irq_mask,
|
||||
.irq_unmask = fpga_irq_unmask,
|
||||
.irq_print_chip = fpga_irq_print_chip,
|
||||
};
|
||||
|
||||
static void fpga_irq_handle(struct irq_desc *desc)
|
||||
{
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
@ -116,7 +128,7 @@ static int handle_one_fpga(struct fpga_irq_data *f, struct pt_regs *regs)
|
||||
* Keep iterating over all registered FPGA IRQ controllers until there are
|
||||
* no pending interrupts.
|
||||
*/
|
||||
asmlinkage void __exception_irq_entry fpga_handle_irq(struct pt_regs *regs)
|
||||
static asmlinkage void __exception_irq_entry fpga_handle_irq(struct pt_regs *regs)
|
||||
{
|
||||
int i, handled;
|
||||
|
||||
@ -135,8 +147,7 @@ static int fpga_irqdomain_map(struct irq_domain *d, unsigned int irq,
|
||||
if (!(f->valid & BIT(hwirq)))
|
||||
return -EPERM;
|
||||
irq_set_chip_data(irq, f);
|
||||
irq_set_chip_and_handler(irq, &f->chip,
|
||||
handle_level_irq);
|
||||
irq_set_chip_and_handler(irq, &fpga_chip, handle_level_irq);
|
||||
irq_set_probe(irq);
|
||||
return 0;
|
||||
}
|
||||
@ -146,8 +157,8 @@ static const struct irq_domain_ops fpga_irqdomain_ops = {
|
||||
.xlate = irq_domain_xlate_onetwocell,
|
||||
};
|
||||
|
||||
void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,
|
||||
int parent_irq, u32 valid, struct device_node *node)
|
||||
static void __init fpga_irq_init(void __iomem *base, int parent_irq,
|
||||
u32 valid, struct device_node *node)
|
||||
{
|
||||
struct fpga_irq_data *f;
|
||||
int i;
|
||||
@ -158,10 +169,6 @@ void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,
|
||||
}
|
||||
f = &fpga_irq_devices[fpga_irq_id];
|
||||
f->base = base;
|
||||
f->chip.name = name;
|
||||
f->chip.irq_ack = fpga_irq_mask;
|
||||
f->chip.irq_mask = fpga_irq_mask;
|
||||
f->chip.irq_unmask = fpga_irq_unmask;
|
||||
f->valid = valid;
|
||||
|
||||
if (parent_irq != -1) {
|
||||
@ -169,20 +176,19 @@ void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,
|
||||
f);
|
||||
}
|
||||
|
||||
/* This will also allocate irq descriptors */
|
||||
f->domain = irq_domain_add_simple(node, fls(valid), irq_start,
|
||||
f->domain = irq_domain_add_linear(node, fls(valid),
|
||||
&fpga_irqdomain_ops, f);
|
||||
|
||||
/* This will allocate all valid descriptors in the linear case */
|
||||
for (i = 0; i < fls(valid); i++)
|
||||
if (valid & BIT(i)) {
|
||||
if (!irq_start)
|
||||
irq_create_mapping(f->domain, i);
|
||||
/* Is this still required? */
|
||||
irq_create_mapping(f->domain, i);
|
||||
f->used_irqs++;
|
||||
}
|
||||
|
||||
pr_info("FPGA IRQ chip %d \"%s\" @ %p, %u irqs",
|
||||
fpga_irq_id, name, base, f->used_irqs);
|
||||
fpga_irq_id, node->name, base, f->used_irqs);
|
||||
if (parent_irq != -1)
|
||||
pr_cont(", parent IRQ: %d\n", parent_irq);
|
||||
else
|
||||
@ -192,8 +198,8 @@ void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
int __init fpga_irq_of_init(struct device_node *node,
|
||||
struct device_node *parent)
|
||||
static int __init fpga_irq_of_init(struct device_node *node,
|
||||
struct device_node *parent)
|
||||
{
|
||||
void __iomem *base;
|
||||
u32 clear_mask;
|
||||
@ -222,7 +228,7 @@ int __init fpga_irq_of_init(struct device_node *node,
|
||||
parent_irq = -1;
|
||||
}
|
||||
|
||||
fpga_irq_init(base, node->name, 0, parent_irq, valid_mask, node);
|
||||
fpga_irq_init(base, parent_irq, valid_mask, node);
|
||||
|
||||
/*
|
||||
* On Versatile AB/PB, some secondary interrupts have a direct
|
||||
|
@ -710,10 +710,11 @@ extern struct irq_chip no_irq_chip;
|
||||
extern struct irq_chip dummy_irq_chip;
|
||||
|
||||
extern void
|
||||
irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
|
||||
irq_set_chip_and_handler_name(unsigned int irq, const struct irq_chip *chip,
|
||||
irq_flow_handler_t handle, const char *name);
|
||||
|
||||
static inline void irq_set_chip_and_handler(unsigned int irq, struct irq_chip *chip,
|
||||
static inline void irq_set_chip_and_handler(unsigned int irq,
|
||||
const struct irq_chip *chip,
|
||||
irq_flow_handler_t handle)
|
||||
{
|
||||
irq_set_chip_and_handler_name(irq, chip, handle, NULL);
|
||||
@ -803,7 +804,7 @@ static inline void irq_set_percpu_devid_flags(unsigned int irq)
|
||||
}
|
||||
|
||||
/* Set/get chip/data for an IRQ: */
|
||||
extern int irq_set_chip(unsigned int irq, struct irq_chip *chip);
|
||||
extern int irq_set_chip(unsigned int irq, const struct irq_chip *chip);
|
||||
extern int irq_set_handler_data(unsigned int irq, void *data);
|
||||
extern int irq_set_chip_data(unsigned int irq, void *data);
|
||||
extern int irq_set_irq_type(unsigned int irq, unsigned int type);
|
||||
|
@ -1,14 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef PLAT_FPGA_IRQ_H
|
||||
#define PLAT_FPGA_IRQ_H
|
||||
|
||||
struct device_node;
|
||||
struct pt_regs;
|
||||
|
||||
void fpga_handle_irq(struct pt_regs *regs);
|
||||
void fpga_irq_init(void __iomem *, const char *, int, int, u32,
|
||||
struct device_node *node);
|
||||
int fpga_irq_of_init(struct device_node *node,
|
||||
struct device_node *parent);
|
||||
|
||||
#endif
|
@ -479,7 +479,8 @@ int irq_destroy_ipi(unsigned int irq, const struct cpumask *dest);
|
||||
extern struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain,
|
||||
unsigned int virq);
|
||||
extern void irq_domain_set_info(struct irq_domain *domain, unsigned int virq,
|
||||
irq_hw_number_t hwirq, struct irq_chip *chip,
|
||||
irq_hw_number_t hwirq,
|
||||
const struct irq_chip *chip,
|
||||
void *chip_data, irq_flow_handler_t handler,
|
||||
void *handler_data, const char *handler_name);
|
||||
extern void irq_domain_reset_irq_data(struct irq_data *irq_data);
|
||||
@ -522,7 +523,7 @@ extern int irq_domain_alloc_irqs_hierarchy(struct irq_domain *domain,
|
||||
extern int irq_domain_set_hwirq_and_chip(struct irq_domain *domain,
|
||||
unsigned int virq,
|
||||
irq_hw_number_t hwirq,
|
||||
struct irq_chip *chip,
|
||||
const struct irq_chip *chip,
|
||||
void *chip_data);
|
||||
extern void irq_domain_free_irqs_common(struct irq_domain *domain,
|
||||
unsigned int virq,
|
||||
|
@ -38,7 +38,7 @@ struct irqaction chained_action = {
|
||||
* @irq: irq number
|
||||
* @chip: pointer to irq chip description structure
|
||||
*/
|
||||
int irq_set_chip(unsigned int irq, struct irq_chip *chip)
|
||||
int irq_set_chip(unsigned int irq, const struct irq_chip *chip)
|
||||
{
|
||||
unsigned long flags;
|
||||
struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
|
||||
@ -46,10 +46,7 @@ int irq_set_chip(unsigned int irq, struct irq_chip *chip)
|
||||
if (!desc)
|
||||
return -EINVAL;
|
||||
|
||||
if (!chip)
|
||||
chip = &no_irq_chip;
|
||||
|
||||
desc->irq_data.chip = chip;
|
||||
desc->irq_data.chip = (struct irq_chip *)(chip ?: &no_irq_chip);
|
||||
irq_put_desc_unlock(desc, flags);
|
||||
/*
|
||||
* For !CONFIG_SPARSE_IRQ make the irq show up in
|
||||
@ -1073,7 +1070,7 @@ irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
|
||||
EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
|
||||
|
||||
void
|
||||
irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
|
||||
irq_set_chip_and_handler_name(unsigned int irq, const struct irq_chip *chip,
|
||||
irq_flow_handler_t handle, const char *name)
|
||||
{
|
||||
irq_set_chip(irq, chip);
|
||||
|
@ -69,8 +69,12 @@ irq_debug_show_chip(struct seq_file *m, struct irq_data *data, int ind)
|
||||
seq_printf(m, "chip: None\n");
|
||||
return;
|
||||
}
|
||||
seq_printf(m, "%*schip: %s\n", ind, "", chip->name);
|
||||
seq_printf(m, "%*sflags: 0x%lx\n", ind + 1, "", chip->flags);
|
||||
seq_printf(m, "%*schip: ", ind, "");
|
||||
if (chip->irq_print_chip)
|
||||
chip->irq_print_chip(data, m);
|
||||
else
|
||||
seq_printf(m, "%s", chip->name);
|
||||
seq_printf(m, "\n%*sflags: 0x%lx\n", ind + 1, "", chip->flags);
|
||||
irq_debug_show_bits(m, ind, chip->flags, irqchip_flags,
|
||||
ARRAY_SIZE(irqchip_flags));
|
||||
}
|
||||
|
@ -1319,7 +1319,8 @@ EXPORT_SYMBOL_GPL(irq_domain_get_irq_data);
|
||||
* @chip_data: The associated chip data
|
||||
*/
|
||||
int irq_domain_set_hwirq_and_chip(struct irq_domain *domain, unsigned int virq,
|
||||
irq_hw_number_t hwirq, struct irq_chip *chip,
|
||||
irq_hw_number_t hwirq,
|
||||
const struct irq_chip *chip,
|
||||
void *chip_data)
|
||||
{
|
||||
struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq);
|
||||
@ -1328,7 +1329,7 @@ int irq_domain_set_hwirq_and_chip(struct irq_domain *domain, unsigned int virq,
|
||||
return -ENOENT;
|
||||
|
||||
irq_data->hwirq = hwirq;
|
||||
irq_data->chip = chip ? chip : &no_irq_chip;
|
||||
irq_data->chip = (struct irq_chip *)(chip ? chip : &no_irq_chip);
|
||||
irq_data->chip_data = chip_data;
|
||||
|
||||
return 0;
|
||||
@ -1347,7 +1348,7 @@ EXPORT_SYMBOL_GPL(irq_domain_set_hwirq_and_chip);
|
||||
* @handler_name: The interrupt handler name
|
||||
*/
|
||||
void irq_domain_set_info(struct irq_domain *domain, unsigned int virq,
|
||||
irq_hw_number_t hwirq, struct irq_chip *chip,
|
||||
irq_hw_number_t hwirq, const struct irq_chip *chip,
|
||||
void *chip_data, irq_flow_handler_t handler,
|
||||
void *handler_data, const char *handler_name)
|
||||
{
|
||||
@ -1853,7 +1854,7 @@ EXPORT_SYMBOL_GPL(irq_domain_get_irq_data);
|
||||
* @handler_name: The interrupt handler name
|
||||
*/
|
||||
void irq_domain_set_info(struct irq_domain *domain, unsigned int virq,
|
||||
irq_hw_number_t hwirq, struct irq_chip *chip,
|
||||
irq_hw_number_t hwirq, const struct irq_chip *chip,
|
||||
void *chip_data, irq_flow_handler_t handler,
|
||||
void *handler_data, const char *handler_name)
|
||||
{
|
||||
|
Loading…
Reference in New Issue
Block a user