drm/amd/display: FEC check in timing validation
[Why] disable/enable leads FEC mismatch between hw/sw FEC state. [How] check FEC status to fastboot on/off. Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Chiawen Huang <chiawen.huang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1496,6 +1496,10 @@ bool dc_validate_boot_timing(const struct dc *dc,
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if (!link->link_enc->funcs->is_dig_enabled(link->link_enc))
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return false;
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/* Check for FEC status*/
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if (link->link_enc->funcs->fec_is_active(link->link_enc))
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return false;
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enc_inst = link->link_enc->funcs->get_dig_frontend(link->link_enc);
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if (enc_inst == ENGINE_ID_UNKNOWN)
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