forked from Minki/linux
arm64: setup: name mair
register
In __cpu_setup we conditionally manipulate the MAIR_EL1 value in x5 before later reusing x5 as a scratch register for unrelated temporary variables. To make this a bit clearer, let's move the MAIR_EL1 value into a named register `mair`. To simplify the register allocation, this is placed in the highest available caller-saved scratch register, x17. As it is no longer clobbered by other usage, we can write the value to MAIR_EL1 at the end of the function as we do for TCR_EL1 rather than part-way though feature discovery. There should be no functional change as as a result of this patch. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Marc Zyngier <maz@kernel.org> Cc: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20210326180137.43119-2-mark.rutland@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -421,7 +421,8 @@ SYM_FUNC_START(__cpu_setup)
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/*
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* Memory region attributes
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*/
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mov_q x5, MAIR_EL1_SET
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mair .req x17
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mov_q mair, MAIR_EL1_SET
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#ifdef CONFIG_ARM64_MTE
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mte_tcr .req x20
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@ -438,7 +439,7 @@ SYM_FUNC_START(__cpu_setup)
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/* Normal Tagged memory type at the corresponding MAIR index */
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mov x10, #MAIR_ATTR_NORMAL_TAGGED
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bfi x5, x10, #(8 * MT_NORMAL_TAGGED), #8
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bfi mair, x10, #(8 * MT_NORMAL_TAGGED), #8
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/* initialize GCR_EL1: all non-zero tags excluded by default */
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mov x10, #(SYS_GCR_EL1_RRND | SYS_GCR_EL1_EXCL_MASK)
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@ -452,7 +453,6 @@ SYM_FUNC_START(__cpu_setup)
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mov_q mte_tcr, TCR_KASAN_HW_FLAGS
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1:
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#endif
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msr mair_el1, x5
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/*
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* Set/prepare TCR and TTBR. TCR_EL1.T1SZ gets further
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* adjusted if the kernel is compiled with 52bit VA support.
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@ -492,10 +492,13 @@ SYM_FUNC_START(__cpu_setup)
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orr x10, x10, #TCR_HA // hardware Access flag update
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1:
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#endif /* CONFIG_ARM64_HW_AFDBM */
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msr mair_el1, mair
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msr tcr_el1, x10
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/*
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* Prepare SCTLR
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*/
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mov_q x0, INIT_SCTLR_EL1_MMU_ON
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ret // return to head.S
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.unreq mair
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SYM_FUNC_END(__cpu_setup)
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