drm/amdgpu: Check for valid number of registers to read
Do not try to allocate any amount of memory requested by the user. Instead limit it to 128 registers. Actually the longest series of consecutive allowed registers are 48, mmGB_TILE_MODE0-31 and mmGB_MACROTILE_MODE0-15 (0x2644-0x2673). Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111273 Signed-off-by: Trek <trek00@inbox.ru> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -677,6 +677,9 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
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if (sh_num == AMDGPU_INFO_MMR_SH_INDEX_MASK)
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sh_num = 0xffffffff;
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if (info->read_mmr_reg.count > 128)
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return -EINVAL;
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regs = kmalloc_array(info->read_mmr_reg.count, sizeof(*regs), GFP_KERNEL);
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if (!regs)
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return -ENOMEM;
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