forked from Minki/linux
MIPS: Alchemy: remove old clock support
With the clock framework in place, remove unused functions and bits, and drop the CLK_IGNORE_UNUSED flag, which is now unneeded. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7473/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss
Ralf Baechle
parent
b6507596df
commit
72e1e2a30f
@ -5,7 +5,7 @@
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# Makefile for the Alchemy Au1xx0 CPUs, generic files.
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#
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obj-y += prom.o time.o clock.o clocks.o platform.o power.o \
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obj-y += prom.o time.o clock.o platform.o power.o \
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setup.o sleeper.o dma.o dbdma.o vss.o irq.o usb.o
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# optional gpiolib support
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@ -151,7 +151,7 @@ static struct clk __init *alchemy_clk_setup_cpu(const char *parent_name,
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id.name = ALCHEMY_CPU_CLK;
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id.parent_names = &parent_name;
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id.num_parents = 1;
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id.flags = CLK_IS_BASIC | CLK_IGNORE_UNUSED;
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id.flags = CLK_IS_BASIC;
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id.ops = &alchemy_clkops_cpu;
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h->init = &id;
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@ -236,7 +236,7 @@ static struct clk __init *alchemy_clk_setup_aux(const char *parent_name,
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id.name = name;
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id.parent_names = &parent_name;
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id.num_parents = 1;
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id.flags = CLK_GET_RATE_NOCACHE | CLK_IGNORE_UNUSED;
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id.flags = CLK_GET_RATE_NOCACHE;
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id.ops = &alchemy_clkops_aux;
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a->reg = reg;
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@ -743,8 +743,7 @@ static int __init alchemy_clk_init_fgens(int ctype)
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default:
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return -ENODEV;
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}
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id.flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE |
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CLK_IGNORE_UNUSED;
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id.flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE;
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a = kzalloc((sizeof(*a)) * 6, GFP_KERNEL);
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if (!a)
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@ -942,8 +941,7 @@ static int __init alchemy_clk_setup_imux(int ctype)
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id.ops = &alchemy_clkops_csrc;
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id.parent_names = (const char **)alchemy_clk_csrc_parents;
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id.num_parents = 7;
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id.flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE |
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CLK_IGNORE_UNUSED;
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id.flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE;
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dt = alchemy_csrc_dt1;
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switch (ctype) {
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@ -1,86 +0,0 @@
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/*
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* BRIEF MODULE DESCRIPTION
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* Simple Au1xx0 clocks routines.
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*
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* Copyright 2001, 2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include <asm/time.h>
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#include <asm/mach-au1x00/au1000.h>
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/*
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* I haven't found anyone that doesn't use a 12 MHz source clock,
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* but just in case.....
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*/
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#define AU1000_SRC_CLK 12000000
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static unsigned int au1x00_clock; /* Hz */
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/*
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* Set the au1000_clock
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*/
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void set_au1x00_speed(unsigned int new_freq)
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{
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au1x00_clock = new_freq;
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}
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unsigned int get_au1x00_speed(void)
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{
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return au1x00_clock;
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}
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EXPORT_SYMBOL(get_au1x00_speed);
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/*
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* We read the real processor speed from the PLL. This is important
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* because it is more accurate than computing it from the 32 KHz
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* counter, if it exists. If we don't have an accurate processor
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* speed, all of the peripherals that derive their clocks based on
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* this advertised speed will introduce error and sometimes not work
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* properly. This function is further convoluted to still allow configurations
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* to do that in case they have really, really old silicon with a
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* write-only PLL register. -- Dan
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*/
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unsigned long au1xxx_calc_clock(void)
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{
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unsigned long cpu_speed;
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/*
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* On early Au1000, sys_cpupll was write-only. Since these
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* silicon versions of Au1000 are not sold by AMD, we don't bend
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* over backwards trying to determine the frequency.
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*/
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if (au1xxx_cpu_has_pll_wo())
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cpu_speed = 396000000;
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else
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cpu_speed = (alchemy_rdsys(AU1000_SYS_CPUPLL) & 0x3f) * AU1000_SRC_CLK;
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/* On Alchemy CPU:counter ratio is 1:1 */
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mips_hpt_frequency = cpu_speed;
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set_au1x00_speed(cpu_speed);
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return cpu_speed;
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}
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@ -27,12 +27,9 @@
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/jiffies.h>
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#include <linux/module.h>
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#include <asm/dma-coherence.h>
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#include <asm/mipsregs.h>
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#include <asm/time.h>
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#include <au1000.h>
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@ -41,18 +38,6 @@ extern void set_cpuspec(void);
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void __init plat_mem_setup(void)
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{
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unsigned long est_freq;
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/* determine core clock */
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est_freq = au1xxx_calc_clock();
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est_freq += 5000; /* round */
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est_freq -= est_freq % 10000;
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printk(KERN_INFO "(PRId %08x) @ %lu.%02lu MHz\n", read_c0_prid(),
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est_freq / 1000000, ((est_freq % 1000000) * 100) / 1000000);
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/* this is faster than wasting cycles trying to approximate it */
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preset_lpj = (est_freq >> 1) / HZ;
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if (au1xxx_cpu_needs_config_od())
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/* Various early Au1xx0 errata corrected by this */
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set_c0_config(1 << 19); /* Set Config[OD] */
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@ -470,72 +470,8 @@
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/* Clock Controller */
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#define AU1000_SYS_FREQCTRL0 0x20
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# define SYS_FC_FRDIV2_BIT 22
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# define SYS_FC_FRDIV2_MASK (0xff << SYS_FC_FRDIV2_BIT)
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# define SYS_FC_FE2 (1 << 21)
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# define SYS_FC_FS2 (1 << 20)
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# define SYS_FC_FRDIV1_BIT 12
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# define SYS_FC_FRDIV1_MASK (0xff << SYS_FC_FRDIV1_BIT)
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# define SYS_FC_FE1 (1 << 11)
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# define SYS_FC_FS1 (1 << 10)
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# define SYS_FC_FRDIV0_BIT 2
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# define SYS_FC_FRDIV0_MASK (0xff << SYS_FC_FRDIV0_BIT)
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# define SYS_FC_FE0 (1 << 1)
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# define SYS_FC_FS0 (1 << 0)
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#define AU1000_SYS_FREQCTRL1 0x24
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# define SYS_FC_FRDIV5_BIT 22
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# define SYS_FC_FRDIV5_MASK (0xff << SYS_FC_FRDIV5_BIT)
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# define SYS_FC_FE5 (1 << 21)
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# define SYS_FC_FS5 (1 << 20)
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# define SYS_FC_FRDIV4_BIT 12
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# define SYS_FC_FRDIV4_MASK (0xff << SYS_FC_FRDIV4_BIT)
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# define SYS_FC_FE4 (1 << 11)
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# define SYS_FC_FS4 (1 << 10)
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# define SYS_FC_FRDIV3_BIT 2
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# define SYS_FC_FRDIV3_MASK (0xff << SYS_FC_FRDIV3_BIT)
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# define SYS_FC_FE3 (1 << 1)
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# define SYS_FC_FS3 (1 << 0)
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#define AU1000_SYS_CLKSRC 0x28
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# define SYS_CS_ME1_BIT 27
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# define SYS_CS_ME1_MASK (0x7 << SYS_CS_ME1_BIT)
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# define SYS_CS_DE1 (1 << 26)
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# define SYS_CS_CE1 (1 << 25)
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# define SYS_CS_ME0_BIT 22
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# define SYS_CS_ME0_MASK (0x7 << SYS_CS_ME0_BIT)
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# define SYS_CS_DE0 (1 << 21)
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# define SYS_CS_CE0 (1 << 20)
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# define SYS_CS_MI2_BIT 17
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# define SYS_CS_MI2_MASK (0x7 << SYS_CS_MI2_BIT)
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# define SYS_CS_DI2 (1 << 16)
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# define SYS_CS_CI2 (1 << 15)
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# define SYS_CS_ML_BIT 7
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# define SYS_CS_ML_MASK (0x7 << SYS_CS_ML_BIT)
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# define SYS_CS_DL (1 << 6)
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# define SYS_CS_CL (1 << 5)
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# define SYS_CS_MUH_BIT 12
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# define SYS_CS_MUH_MASK (0x7 << SYS_CS_MUH_BIT)
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# define SYS_CS_DUH (1 << 11)
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# define SYS_CS_CUH (1 << 10)
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# define SYS_CS_MUD_BIT 7
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# define SYS_CS_MUD_MASK (0x7 << SYS_CS_MUD_BIT)
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# define SYS_CS_DUD (1 << 6)
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# define SYS_CS_CUD (1 << 5)
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# define SYS_CS_MIR_BIT 2
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# define SYS_CS_MIR_MASK (0x7 << SYS_CS_MIR_BIT)
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# define SYS_CS_DIR (1 << 1)
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# define SYS_CS_CIR (1 << 0)
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# define SYS_CS_MUX_AUX 0x1
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# define SYS_CS_MUX_FQ0 0x2
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# define SYS_CS_MUX_FQ1 0x3
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# define SYS_CS_MUX_FQ2 0x4
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# define SYS_CS_MUX_FQ3 0x5
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# define SYS_CS_MUX_FQ4 0x6
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# define SYS_CS_MUX_FQ5 0x7
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#define AU1000_SYS_CPUPLL 0x60
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#define AU1000_SYS_AUXPLL 0x64
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#define AU1300_SYS_AUXPLL2 0x68
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@ -841,11 +777,6 @@ static inline int alchemy_get_macs(int type)
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return 0;
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}
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/* arch/mips/au1000/common/clocks.c */
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extern void set_au1x00_speed(unsigned int new_freq);
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extern unsigned int get_au1x00_speed(void);
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extern unsigned long au1xxx_calc_clock(void);
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/* PM: arch/mips/alchemy/common/sleeper.S, power.c, irq.c */
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void alchemy_sleep_au1000(void);
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void alchemy_sleep_au1550(void);
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