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dt-bindings: clock: Add SC7280 GPUCC clock binding

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Add device tree bindings for graphics clock subsystem clock
controller for Qualcomm Technology Inc's SC7280 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1626189143-12957-5-git-send-email-tdas@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Taniya Das 2021-07-13 20:42:20 +05:30 committed by Stephen Boyd
parent 1a00c962f9
commit 6f1a1ced9e
2 changed files with 39 additions and 2 deletions
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6
Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
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@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,gpucc.yaml#
@ -11,11 +11,12 @@ maintainers:
description: |
Qualcomm graphics clock control module which supports the clocks, resets and
power domains on SDM845/SC7180/SM8150/SM8250.
power domains on Qualcomm SoCs.
See also:
dt-bindings/clock/qcom,gpucc-sdm845.h
dt-bindings/clock/qcom,gpucc-sc7180.h
dt-bindings/clock/qcom,gpucc-sc7280.h
dt-bindings/clock/qcom,gpucc-sm8150.h
dt-bindings/clock/qcom,gpucc-sm8250.h
@ -24,6 +25,7 @@ properties:
enum:
- qcom,sdm845-gpucc
- qcom,sc7180-gpucc
- qcom,sc7280-gpucc
- qcom,sm8150-gpucc
- qcom,sm8250-gpucc

35
include/dt-bindings/clock/qcom,gpucc-sc7280.h Normal file
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@ -0,0 +1,35 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
*/
#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SC7280_H
#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SC7280_H
/* GPU_CC clocks */
#define GPU_CC_PLL0 0
#define GPU_CC_PLL1 1
#define GPU_CC_AHB_CLK 2
#define GPU_CC_CB_CLK 3
#define GPU_CC_CRC_AHB_CLK 4
#define GPU_CC_CX_GMU_CLK 5
#define GPU_CC_CX_SNOC_DVM_CLK 6
#define GPU_CC_CXO_AON_CLK 7
#define GPU_CC_CXO_CLK 8
#define GPU_CC_GMU_CLK_SRC 9
#define GPU_CC_GX_GMU_CLK 10
#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 11
#define GPU_CC_HUB_AHB_DIV_CLK_SRC 12
#define GPU_CC_HUB_AON_CLK 13
#define GPU_CC_HUB_CLK_SRC 14
#define GPU_CC_HUB_CX_INT_CLK 15
#define GPU_CC_HUB_CX_INT_DIV_CLK_SRC 16
#define GPU_CC_MND1X_0_GFX3D_CLK 17
#define GPU_CC_MND1X_1_GFX3D_CLK 18
#define GPU_CC_SLEEP_CLK 19
/* GPU_CC power domains */
#define GPU_CC_CX_GDSC 0
#define GPU_CC_GX_GDSC 1
#endif