forked from Minki/linux
mfd/rtc: sec/s5m: rename SEC* symbols to S5M
Prepare for adding support for S2MPS14 RTC device to the rtc-s5m driver: 1. Rename SEC* symbols to S5M. 2. Add S5M prefix to some of defines which are different between S5M876X and S2MPS14. This is only a rename-like patch, new code is not added. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Lee Jones <lee.jones@linaro.org> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Sangbeom Kim <sbkim73@samsung.com> Cc: Samuel Ortiz <sameo@linux.intel.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
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a992bf836f
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602cb5bbae
@ -30,10 +30,10 @@
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/*
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* Maximum number of retries for checking changes in UDR field
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* of SEC_RTC_UDR_CON register (to limit possible endless loop).
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* of S5M_RTC_UDR_CON register (to limit possible endless loop).
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*
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* After writing to RTC registers (setting time or alarm) read the UDR field
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* in SEC_RTC_UDR_CON register. UDR is auto-cleared when data have
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* in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
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* been transferred.
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*/
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#define UDR_READ_RETRY_CNT 5
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@ -54,7 +54,7 @@ static const struct regmap_config s5m_rtc_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = SEC_RTC_REG_MAX,
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.max_register = S5M_RTC_REG_MAX,
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};
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static const struct regmap_config s2mps14_rtc_regmap_config = {
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@ -119,8 +119,8 @@ static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
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unsigned int data;
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do {
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ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data);
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} while (--retry && (data & RTC_UDR_MASK) && !ret);
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ret = regmap_read(info->regmap, S5M_RTC_UDR_CON, &data);
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} while (--retry && (data & S5M_RTC_UDR_MASK) && !ret);
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if (!retry)
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dev_err(info->dev, "waiting for UDR update, reached max number of retries\n");
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@ -133,16 +133,16 @@ static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
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int ret;
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unsigned int data;
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ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data);
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ret = regmap_read(info->regmap, S5M_RTC_UDR_CON, &data);
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if (ret < 0) {
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dev_err(info->dev, "failed to read update reg(%d)\n", ret);
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return ret;
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}
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data |= RTC_TIME_EN_MASK;
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data |= RTC_UDR_MASK;
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data |= S5M_RTC_TIME_EN_MASK;
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data |= S5M_RTC_UDR_MASK;
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ret = regmap_write(info->regmap, SEC_RTC_UDR_CON, data);
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ret = regmap_write(info->regmap, S5M_RTC_UDR_CON, data);
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if (ret < 0) {
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dev_err(info->dev, "failed to write update reg(%d)\n", ret);
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return ret;
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@ -158,17 +158,17 @@ static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
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int ret;
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unsigned int data;
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ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &data);
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ret = regmap_read(info->regmap, S5M_RTC_UDR_CON, &data);
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if (ret < 0) {
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dev_err(info->dev, "%s: fail to read update reg(%d)\n",
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__func__, ret);
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return ret;
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}
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data &= ~RTC_TIME_EN_MASK;
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data |= RTC_UDR_MASK;
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data &= ~S5M_RTC_TIME_EN_MASK;
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data |= S5M_RTC_UDR_MASK;
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ret = regmap_write(info->regmap, SEC_RTC_UDR_CON, data);
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ret = regmap_write(info->regmap, S5M_RTC_UDR_CON, data);
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if (ret < 0) {
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dev_err(info->dev, "%s: fail to write update reg(%d)\n",
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__func__, ret);
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@ -218,7 +218,7 @@ static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
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u8 data[8];
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int ret;
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ret = regmap_bulk_read(info->regmap, SEC_RTC_SEC, data, 8);
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ret = regmap_bulk_read(info->regmap, S5M_RTC_SEC, data, 8);
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if (ret < 0)
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return ret;
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@ -266,7 +266,7 @@ static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
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1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
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tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
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ret = regmap_raw_write(info->regmap, SEC_RTC_SEC, data, 8);
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ret = regmap_raw_write(info->regmap, S5M_RTC_SEC, data, 8);
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if (ret < 0)
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return ret;
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@ -282,20 +282,20 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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unsigned int val;
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int ret, i;
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ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8);
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ret = regmap_bulk_read(info->regmap, S5M_ALARM0_SEC, data, 8);
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if (ret < 0)
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return ret;
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switch (info->device_type) {
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case S5M8763X:
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s5m8763_data_to_tm(data, &alrm->time);
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ret = regmap_read(info->regmap, SEC_ALARM0_CONF, &val);
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ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val);
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if (ret < 0)
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return ret;
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alrm->enabled = !!val;
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ret = regmap_read(info->regmap, SEC_RTC_STATUS, &val);
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ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val);
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if (ret < 0)
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return ret;
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@ -318,7 +318,7 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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}
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alrm->pending = 0;
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ret = regmap_read(info->regmap, SEC_RTC_STATUS, &val);
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ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val);
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if (ret < 0)
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return ret;
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break;
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@ -327,7 +327,7 @@ static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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return -EINVAL;
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}
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if (val & ALARM0_STATUS)
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if (val & S5M_ALARM0_STATUS)
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alrm->pending = 1;
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else
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alrm->pending = 0;
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@ -341,7 +341,7 @@ static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
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int ret, i;
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struct rtc_time tm;
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ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8);
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ret = regmap_bulk_read(info->regmap, S5M_ALARM0_SEC, data, 8);
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if (ret < 0)
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return ret;
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@ -352,14 +352,14 @@ static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
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switch (info->device_type) {
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case S5M8763X:
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ret = regmap_write(info->regmap, SEC_ALARM0_CONF, 0);
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ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0);
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break;
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case S5M8767X:
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for (i = 0; i < 7; i++)
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data[i] &= ~ALARM_ENABLE_MASK;
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ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8);
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ret = regmap_raw_write(info->regmap, S5M_ALARM0_SEC, data, 8);
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if (ret < 0)
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return ret;
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@ -381,7 +381,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
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u8 alarm0_conf;
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struct rtc_time tm;
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ret = regmap_bulk_read(info->regmap, SEC_ALARM0_SEC, data, 8);
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ret = regmap_bulk_read(info->regmap, S5M_ALARM0_SEC, data, 8);
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if (ret < 0)
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return ret;
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@ -393,7 +393,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
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switch (info->device_type) {
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case S5M8763X:
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alarm0_conf = 0x77;
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ret = regmap_write(info->regmap, SEC_ALARM0_CONF, alarm0_conf);
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ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf);
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break;
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case S5M8767X:
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@ -408,7 +408,7 @@ static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
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if (data[RTC_YEAR1] & 0x7f)
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data[RTC_YEAR1] |= ALARM_ENABLE_MASK;
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ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8);
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ret = regmap_raw_write(info->regmap, S5M_ALARM0_SEC, data, 8);
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if (ret < 0)
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return ret;
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ret = s5m8767_rtc_set_alarm_reg(info);
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@ -450,7 +450,7 @@ static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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if (ret < 0)
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return ret;
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ret = regmap_raw_write(info->regmap, SEC_ALARM0_SEC, data, 8);
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ret = regmap_raw_write(info->regmap, S5M_ALARM0_SEC, data, 8);
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if (ret < 0)
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return ret;
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@ -495,7 +495,7 @@ static const struct rtc_class_ops s5m_rtc_ops = {
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static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable)
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{
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int ret;
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ret = regmap_update_bits(info->regmap, SEC_WTSR_SMPL_CNTL,
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ret = regmap_update_bits(info->regmap, S5M_WTSR_SMPL_CNTL,
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WTSR_ENABLE_MASK,
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enable ? WTSR_ENABLE_MASK : 0);
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if (ret < 0)
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@ -506,7 +506,7 @@ static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable)
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static void s5m_rtc_enable_smpl(struct s5m_rtc_info *info, bool enable)
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{
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int ret;
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ret = regmap_update_bits(info->regmap, SEC_WTSR_SMPL_CNTL,
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ret = regmap_update_bits(info->regmap, S5M_WTSR_SMPL_CNTL,
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SMPL_ENABLE_MASK,
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enable ? SMPL_ENABLE_MASK : 0);
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if (ret < 0)
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@ -521,7 +521,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
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int ret;
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struct rtc_time tm;
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ret = regmap_read(info->regmap, SEC_RTC_UDR_CON, &tp_read);
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ret = regmap_read(info->regmap, S5M_RTC_UDR_CON, &tp_read);
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if (ret < 0) {
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dev_err(info->dev, "%s: fail to read control reg(%d)\n",
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__func__, ret);
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@ -533,7 +533,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
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data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
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info->rtc_24hr_mode = 1;
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ret = regmap_raw_write(info->regmap, SEC_ALARM0_CONF, data, 2);
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ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2);
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if (ret < 0) {
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dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
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__func__, ret);
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@ -555,7 +555,7 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
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ret = s5m_rtc_set_time(info->dev, &tm);
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}
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ret = regmap_update_bits(info->regmap, SEC_RTC_UDR_CON,
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ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON,
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RTC_TCON_MASK, tp_read | RTC_TCON_MASK);
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if (ret < 0)
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dev_err(info->dev, "%s: fail to update TCON reg(%d)\n",
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@ -676,7 +676,7 @@ static void s5m_rtc_shutdown(struct platform_device *pdev)
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if (info->wtsr_smpl) {
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for (i = 0; i < 3; i++) {
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s5m_rtc_enable_wtsr(info, false);
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regmap_read(info->regmap, SEC_WTSR_SMPL_CNTL, &val);
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regmap_read(info->regmap, S5M_WTSR_SMPL_CNTL, &val);
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pr_debug("%s: WTSR_SMPL reg(0x%02x)\n", __func__, val);
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if (val & WTSR_ENABLE_MASK)
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pr_emerg("%s: fail to disable WTSR\n",
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@ -18,38 +18,38 @@
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#ifndef __LINUX_MFD_SEC_RTC_H
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#define __LINUX_MFD_SEC_RTC_H
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enum sec_rtc_reg {
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SEC_RTC_SEC,
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SEC_RTC_MIN,
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SEC_RTC_HOUR,
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SEC_RTC_WEEKDAY,
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SEC_RTC_DATE,
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SEC_RTC_MONTH,
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SEC_RTC_YEAR1,
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SEC_RTC_YEAR2,
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SEC_ALARM0_SEC,
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SEC_ALARM0_MIN,
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SEC_ALARM0_HOUR,
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SEC_ALARM0_WEEKDAY,
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SEC_ALARM0_DATE,
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SEC_ALARM0_MONTH,
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SEC_ALARM0_YEAR1,
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SEC_ALARM0_YEAR2,
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SEC_ALARM1_SEC,
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SEC_ALARM1_MIN,
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SEC_ALARM1_HOUR,
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SEC_ALARM1_WEEKDAY,
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SEC_ALARM1_DATE,
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SEC_ALARM1_MONTH,
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SEC_ALARM1_YEAR1,
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SEC_ALARM1_YEAR2,
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SEC_ALARM0_CONF,
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SEC_ALARM1_CONF,
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SEC_RTC_STATUS,
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SEC_WTSR_SMPL_CNTL,
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SEC_RTC_UDR_CON,
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enum s5m_rtc_reg {
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S5M_RTC_SEC,
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S5M_RTC_MIN,
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S5M_RTC_HOUR,
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S5M_RTC_WEEKDAY,
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S5M_RTC_DATE,
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S5M_RTC_MONTH,
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S5M_RTC_YEAR1,
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S5M_RTC_YEAR2,
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S5M_ALARM0_SEC,
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S5M_ALARM0_MIN,
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S5M_ALARM0_HOUR,
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S5M_ALARM0_WEEKDAY,
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S5M_ALARM0_DATE,
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S5M_ALARM0_MONTH,
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S5M_ALARM0_YEAR1,
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S5M_ALARM0_YEAR2,
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S5M_ALARM1_SEC,
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S5M_ALARM1_MIN,
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S5M_ALARM1_HOUR,
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S5M_ALARM1_WEEKDAY,
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S5M_ALARM1_DATE,
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S5M_ALARM1_MONTH,
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S5M_ALARM1_YEAR1,
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S5M_ALARM1_YEAR2,
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S5M_ALARM0_CONF,
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S5M_ALARM1_CONF,
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S5M_RTC_STATUS,
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S5M_WTSR_SMPL_CNTL,
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S5M_RTC_UDR_CON,
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SEC_RTC_REG_MAX,
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S5M_RTC_REG_MAX,
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};
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enum s2mps_rtc_reg {
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@ -88,9 +88,9 @@ enum s2mps_rtc_reg {
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#define HOUR_12 (1 << 7)
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#define HOUR_AMPM (1 << 6)
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#define HOUR_PM (1 << 5)
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#define ALARM0_STATUS (1 << 1)
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#define ALARM1_STATUS (1 << 2)
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#define UPDATE_AD (1 << 0)
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#define S5M_ALARM0_STATUS (1 << 1)
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#define S5M_ALARM1_STATUS (1 << 2)
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#define S5M_UPDATE_AD (1 << 0)
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#define S2MPS_ALARM0_STATUS (1 << 2)
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#define S2MPS_ALARM1_STATUS (1 << 1)
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@ -101,16 +101,16 @@ enum s2mps_rtc_reg {
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#define MODEL24_SHIFT 1
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#define MODEL24_MASK (1 << MODEL24_SHIFT)
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/* RTC Update Register1 */
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#define RTC_UDR_SHIFT 0
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#define RTC_UDR_MASK (1 << RTC_UDR_SHIFT)
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#define S5M_RTC_UDR_SHIFT 0
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#define S5M_RTC_UDR_MASK (1 << S5M_RTC_UDR_SHIFT)
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#define S2MPS_RTC_WUDR_SHIFT 4
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#define S2MPS_RTC_WUDR_MASK (1 << S2MPS_RTC_WUDR_SHIFT)
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#define S2MPS_RTC_RUDR_SHIFT 0
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#define S2MPS_RTC_RUDR_MASK (1 << S2MPS_RTC_RUDR_SHIFT)
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#define RTC_TCON_SHIFT 1
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#define RTC_TCON_MASK (1 << RTC_TCON_SHIFT)
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#define RTC_TIME_EN_SHIFT 3
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#define RTC_TIME_EN_MASK (1 << RTC_TIME_EN_SHIFT)
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#define S5M_RTC_TIME_EN_SHIFT 3
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#define S5M_RTC_TIME_EN_MASK (1 << S5M_RTC_TIME_EN_SHIFT)
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/* RTC Hour register */
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#define HOUR_PM_SHIFT 6
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