forked from Minki/linux
ath10k: remove early irq handling
It's not really necessary to have a dedicated irq handler just for the sake of catching early fw crashes anymore. It is now safe to use one handler even during early stages of device boot up. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
This commit is contained in:
Michal Kazior
Kalle Valo
parent
ec5ba4d3b6
commit
5c771e7454
@ -266,46 +266,6 @@ static void ath10k_pci_enable_legacy_irq(struct ath10k *ar)
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PCIE_INTR_ENABLE_ADDRESS);
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}
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static irqreturn_t ath10k_pci_early_irq_handler(int irq, void *arg)
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{
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struct ath10k *ar = arg;
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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if (ar_pci->num_msi_intrs == 0) {
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if (!ath10k_pci_irq_pending(ar))
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return IRQ_NONE;
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ath10k_pci_disable_and_clear_legacy_irq(ar);
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}
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tasklet_schedule(&ar_pci->early_irq_tasklet);
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return IRQ_HANDLED;
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}
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static int ath10k_pci_request_early_irq(struct ath10k *ar)
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{
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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int ret;
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/* Regardless whether MSI-X/MSI/legacy irqs have been set up the first
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* interrupt from irq vector is triggered in all cases for FW
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* indication/errors */
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ret = request_irq(ar_pci->pdev->irq, ath10k_pci_early_irq_handler,
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IRQF_SHARED, "ath10k_pci (early)", ar);
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if (ret) {
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ath10k_warn("failed to request early irq: %d\n", ret);
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return ret;
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}
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return 0;
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}
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static void ath10k_pci_free_early_irq(struct ath10k *ar)
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{
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free_irq(ath10k_pci_priv(ar)->pdev->irq, ar);
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}
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static inline const char *ath10k_pci_get_irq_method(struct ath10k *ar)
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{
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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@ -948,7 +908,6 @@ static void ath10k_pci_kill_tasklet(struct ath10k *ar)
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tasklet_kill(&ar_pci->intr_tq);
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tasklet_kill(&ar_pci->msi_fw_err);
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tasklet_kill(&ar_pci->early_irq_tasklet);
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for (i = 0; i < CE_COUNT; i++)
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tasklet_kill(&ar_pci->pipe_info[i].intr);
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@ -1158,20 +1117,10 @@ static void ath10k_pci_irq_enable(struct ath10k *ar)
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static int ath10k_pci_hif_start(struct ath10k *ar)
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{
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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int ret, ret_early;
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int ret;
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ath10k_dbg(ATH10K_DBG_BOOT, "boot hif start\n");
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ath10k_pci_free_early_irq(ar);
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ath10k_pci_kill_tasklet(ar);
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ret = ath10k_pci_request_irq(ar);
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if (ret) {
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ath10k_warn("failed to post RX buffers for all pipes: %d\n",
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ret);
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goto err_early_irq;
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}
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ath10k_pci_irq_enable(ar);
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/* Post buffers once to start things off. */
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@ -1187,15 +1136,7 @@ static int ath10k_pci_hif_start(struct ath10k *ar)
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err_stop:
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ath10k_pci_irq_disable(ar);
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ath10k_pci_free_irq(ar);
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ath10k_pci_kill_tasklet(ar);
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err_early_irq:
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/* Though there should be no interrupts (device was reset)
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* power_down() expects the early IRQ to be installed as per the
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* driver lifecycle. */
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ret_early = ath10k_pci_request_early_irq(ar);
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if (ret_early)
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ath10k_warn("failed to re-enable early irq: %d\n", ret_early);
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return ret;
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}
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@ -1302,7 +1243,6 @@ static void ath10k_pci_ce_deinit(struct ath10k *ar)
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static void ath10k_pci_hif_stop(struct ath10k *ar)
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{
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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int ret;
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ath10k_dbg(ATH10K_DBG_BOOT, "boot hif stop\n");
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@ -1310,17 +1250,7 @@ static void ath10k_pci_hif_stop(struct ath10k *ar)
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return;
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ath10k_pci_irq_disable(ar);
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ath10k_pci_free_irq(ar);
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ath10k_pci_kill_tasklet(ar);
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ret = ath10k_pci_request_early_irq(ar);
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if (ret)
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ath10k_warn("failed to re-enable early irq: %d\n", ret);
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/* At this point, asynchronous threads are stopped, the target should
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* not DMA nor interrupt. We process the leftovers and then free
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* everything else up. */
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ath10k_pci_buffer_cleanup(ar);
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/* Make the sure the device won't access any structures on the host by
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@ -1806,28 +1736,19 @@ static int ath10k_pci_ce_init(struct ath10k *ar)
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return 0;
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}
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static void ath10k_pci_fw_interrupt_handler(struct ath10k *ar)
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static bool ath10k_pci_has_fw_crashed(struct ath10k *ar)
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{
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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u32 fw_indicator;
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return ath10k_pci_read32(ar, FW_INDICATOR_ADDRESS) &
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FW_IND_EVENT_PENDING;
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}
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fw_indicator = ath10k_pci_read32(ar, FW_INDICATOR_ADDRESS);
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static void ath10k_pci_fw_crashed_clear(struct ath10k *ar)
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{
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u32 val;
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if (fw_indicator & FW_IND_EVENT_PENDING) {
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/* ACK: clear Target-side pending event */
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ath10k_pci_write32(ar, FW_INDICATOR_ADDRESS,
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fw_indicator & ~FW_IND_EVENT_PENDING);
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if (ar_pci->started) {
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ath10k_pci_fw_crashed_dump(ar);
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} else {
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/*
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* Probable Target failure before we're prepared
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* to handle it. Generally unexpected.
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*/
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ath10k_warn("early firmware event indicated\n");
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}
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}
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val = ath10k_pci_read32(ar, FW_INDICATOR_ADDRESS);
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val &= ~FW_IND_EVENT_PENDING;
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ath10k_pci_write32(ar, FW_INDICATOR_ADDRESS, val);
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}
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/* this function effectively clears target memory controller assert line */
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@ -1960,34 +1881,26 @@ static int __ath10k_pci_hif_power_up(struct ath10k *ar, bool cold_reset)
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goto err;
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}
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ret = ath10k_pci_request_early_irq(ar);
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if (ret) {
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ath10k_err("failed to request early irq: %d\n", ret);
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goto err_ce;
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}
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ret = ath10k_pci_wait_for_target_init(ar);
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if (ret) {
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ath10k_err("failed to wait for target to init: %d\n", ret);
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goto err_free_early_irq;
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goto err_ce;
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}
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ret = ath10k_pci_init_config(ar);
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if (ret) {
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ath10k_err("failed to setup init config: %d\n", ret);
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goto err_free_early_irq;
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goto err_ce;
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}
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ret = ath10k_pci_wake_target_cpu(ar);
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if (ret) {
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ath10k_err("could not wake up target CPU: %d\n", ret);
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goto err_free_early_irq;
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goto err_ce;
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}
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return 0;
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err_free_early_irq:
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ath10k_pci_free_early_irq(ar);
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err_ce:
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ath10k_pci_ce_deinit(ar);
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ath10k_pci_warm_reset(ar);
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@ -2056,8 +1969,6 @@ static void ath10k_pci_hif_power_down(struct ath10k *ar)
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{
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ath10k_dbg(ATH10K_DBG_BOOT, "boot hif power down\n");
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ath10k_pci_free_early_irq(ar);
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ath10k_pci_kill_tasklet(ar);
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ath10k_pci_warm_reset(ar);
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}
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@ -2140,7 +2051,13 @@ static void ath10k_msi_err_tasklet(unsigned long data)
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{
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struct ath10k *ar = (struct ath10k *)data;
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ath10k_pci_fw_interrupt_handler(ar);
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if (!ath10k_pci_has_fw_crashed(ar)) {
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ath10k_warn("received unsolicited fw crash interrupt\n");
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return;
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}
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ath10k_pci_fw_crashed_clear(ar);
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ath10k_pci_fw_crashed_dump(ar);
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}
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/*
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@ -2201,27 +2118,17 @@ static irqreturn_t ath10k_pci_interrupt_handler(int irq, void *arg)
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return IRQ_HANDLED;
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}
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static void ath10k_pci_early_irq_tasklet(unsigned long data)
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{
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struct ath10k *ar = (struct ath10k *)data;
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u32 fw_ind;
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fw_ind = ath10k_pci_read32(ar, FW_INDICATOR_ADDRESS);
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if (fw_ind & FW_IND_EVENT_PENDING) {
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ath10k_pci_write32(ar, FW_INDICATOR_ADDRESS,
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fw_ind & ~FW_IND_EVENT_PENDING);
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ath10k_pci_fw_crashed_dump(ar);
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}
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ath10k_pci_enable_legacy_irq(ar);
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}
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static void ath10k_pci_tasklet(unsigned long data)
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{
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struct ath10k *ar = (struct ath10k *)data;
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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ath10k_pci_fw_interrupt_handler(ar); /* FIXME: Handle FW error */
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if (ath10k_pci_has_fw_crashed(ar)) {
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ath10k_pci_fw_crashed_clear(ar);
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ath10k_pci_fw_crashed_dump(ar);
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return;
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}
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ath10k_ce_per_engine_service_any(ar);
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/* Re-enable legacy irq that was disabled in the irq handler */
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@ -2332,8 +2239,6 @@ static void ath10k_pci_init_irq_tasklets(struct ath10k *ar)
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tasklet_init(&ar_pci->intr_tq, ath10k_pci_tasklet, (unsigned long)ar);
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tasklet_init(&ar_pci->msi_fw_err, ath10k_msi_err_tasklet,
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(unsigned long)ar);
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tasklet_init(&ar_pci->early_irq_tasklet, ath10k_pci_early_irq_tasklet,
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(unsigned long)ar);
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for (i = 0; i < CE_COUNT; i++) {
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ar_pci->pipe_info[i].ar_pci = ar_pci;
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@ -2459,8 +2364,7 @@ static int ath10k_pci_wait_for_target_init(struct ath10k *ar)
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if (val & FW_IND_EVENT_PENDING) {
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ath10k_warn("device has crashed during init\n");
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ath10k_pci_write32(ar, FW_INDICATOR_ADDRESS,
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val & ~FW_IND_EVENT_PENDING);
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ath10k_pci_fw_crashed_clear(ar);
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ath10k_pci_fw_crashed_dump(ar);
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return -ECOMM;
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}
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@ -2643,6 +2547,13 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
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goto err_free_ce;
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}
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/* Workaround: There's no known way to mask all possible interrupts via
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* device CSR. The only way to make sure device doesn't assert
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* interrupts is to reset it. Interrupts are then disabled on host
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* after handlers are registered.
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*/
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ath10k_pci_warm_reset(ar);
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ret = ath10k_pci_init_irq(ar);
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if (ret) {
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ath10k_err("failed to init irqs: %d\n", ret);
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@ -2653,14 +2564,26 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
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ath10k_pci_get_irq_method(ar), ar_pci->num_msi_intrs,
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ath10k_pci_irq_mode, ath10k_pci_reset_mode);
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ret = ath10k_core_register(ar, chip_id);
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ret = ath10k_pci_request_irq(ar);
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if (ret) {
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ath10k_err("failed to register driver core: %d\n", ret);
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ath10k_warn("failed to request irqs: %d\n", ret);
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goto err_deinit_irq;
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}
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/* This shouldn't race as the device has been reset above. */
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ath10k_pci_irq_disable(ar);
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ret = ath10k_core_register(ar, chip_id);
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if (ret) {
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ath10k_err("failed to register driver core: %d\n", ret);
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goto err_free_irq;
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}
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return 0;
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err_free_irq:
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ath10k_pci_free_irq(ar);
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err_deinit_irq:
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ath10k_pci_deinit_irq(ar);
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@ -2695,6 +2618,7 @@ static void ath10k_pci_remove(struct pci_dev *pdev)
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return;
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ath10k_core_unregister(ar);
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ath10k_pci_free_irq(ar);
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ath10k_pci_deinit_irq(ar);
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ath10k_pci_ce_deinit(ar);
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ath10k_pci_free_ce(ar);
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@ -166,7 +166,6 @@ struct ath10k_pci {
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struct tasklet_struct intr_tq;
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struct tasklet_struct msi_fw_err;
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struct tasklet_struct early_irq_tasklet;
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int started;
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