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drm/amd/display: Fix black screen issue on memory clock switch en

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[WHY]
With some monitors when multi plane overlay is enabled the memory
clock switching mechanism has to change and, due to an error in the
initialization sequence, it may cause a black screen.

[HOW]
Change the firmware assisted memory clock switch initialization and
tear-down sequence utilizing the prepare_bandwidth and
optimize_bandwidth contexts.

Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Felipe Clark <feclark@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Felipe Clark 2022-01-06 15:30:33 -05:00 committed by Alex Deucher
parent 6421c49567
commit 58c69b53ae
3 changed files with 9 additions and 1 deletions
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5
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
View File

@ -355,6 +355,11 @@ void dcn30_prepare_bandwidth(struct dc *dc,
dcn20_prepare_bandwidth(dc, context);
}
void dcn30_optimize_bandwidth(struct dc *dc, struct dc_state *context)
{
dcn20_optimize_bandwidth(dc, context);
}
void dcn30_disable_writeback(
struct dc *dc,
unsigned int dwb_pipe_inst)

3
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h
View File

@ -50,6 +50,9 @@ void dcn30_disable_writeback(
void dcn30_prepare_bandwidth(struct dc *dc,
struct dc_state *context);
void dcn30_optimize_bandwidth(struct dc *dc,
struct dc_state *context);
bool dcn30_mmhubbub_warmup(
struct dc *dc,
unsigned int num_dwb,

2
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
View File

@ -60,7 +60,7 @@ static const struct hw_sequencer_funcs dcn30_funcs = {
.interdependent_update_lock = dcn10_lock_all_pipes,
.cursor_lock = dcn10_cursor_lock,
.prepare_bandwidth = dcn20_prepare_bandwidth,
.optimize_bandwidth = dcn20_optimize_bandwidth,
.optimize_bandwidth = dcn30_optimize_bandwidth,
.update_bandwidth = dcn20_update_bandwidth,
.set_drr = dcn10_set_drr,
.get_position = dcn10_get_position,