arm64: dts: msm8916: Add thermal zones, tsens and qfprom nodes
Add thermal zones, tsens and qfprom nodes Acked-by: Eduardo Valentin <edubezval@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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@ -160,6 +160,49 @@
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interrupts = <GIC_PPI 7 GIC_CPU_MASK_SIMPLE(4)>;
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};
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thermal-zones {
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cpu-thermal0 {
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polling-delay-passive = <250>;
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polling-delay = <1000>;
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thermal-sensors = <&tsens 4>;
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trips {
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cpu_alert0: trip0 {
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temperature = <75000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu_crit0: trip1 {
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temperature = <110000>;
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hysteresis = <2000>;
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type = "critical";
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};
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};
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};
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cpu-thermal1 {
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polling-delay-passive = <250>;
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polling-delay = <1000>;
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thermal-sensors = <&tsens 3>;
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trips {
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cpu_alert1: trip0 {
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temperature = <75000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu_crit1: trip1 {
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temperature = <110000>;
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hysteresis = <2000>;
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type = "critical";
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};
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};
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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@ -620,6 +663,27 @@
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clocks = <&gcc GCC_PRNG_AHB_CLK>;
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clock-names = "core";
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};
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qfprom: qfprom@5c000 {
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compatible = "qcom,qfprom";
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reg = <0x5c000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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tsens_caldata: caldata@d0 {
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reg = <0xd0 0x8>;
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};
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tsens_calsel: calsel@ec {
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reg = <0xec 0x4>;
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};
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};
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tsens: thermal-sensor@4a8000 {
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compatible = "qcom,msm8916-tsens";
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reg = <0x4a8000 0x2000>;
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nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
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nvmem-cell-names = "calib", "calib_sel";
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#thermal-sensor-cells = <1>;
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};
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};
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smd {
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