arm64: dts: qcom: Fix broken interrupt trigger settings
When a device uses the GIC as its interrupt controller and generates SPIs, only the values 1 (edge rising) and 4 (level high) are legal. Anything else is just plain wrong (can't be programmed into the HW), and leads to aborted driver probes (USB doesn't work with 4.8-rc1 on a Dragonboard 410C). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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@ -494,7 +494,7 @@
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compatible = "qcom,ci-hdrc";
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reg = <0x78d9000 0x400>;
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dr_mode = "peripheral";
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interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
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usb-phy = <&usb_otg>;
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status = "disabled";
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};
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@ -502,7 +502,7 @@
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usb_host: ehci@78d9000 {
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compatible = "qcom,ehci-host";
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reg = <0x78d9000 0x400>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
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usb-phy = <&usb_otg>;
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status = "disabled";
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};
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@ -510,8 +510,8 @@
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usb_otg: phy@78d9000 {
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compatible = "qcom,usb-otg-snps";
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reg = <0x78d9000 0x400>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_BOTH>,
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<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
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qcom,vdd-levels = <500000 1000000 1320000>;
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qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
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@ -605,7 +605,7 @@
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<0x200a000 0x002100>;
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reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
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interrupt-names = "periph_irq";
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interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
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qcom,ee = <0>;
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qcom,channel = <0>;
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#address-cells = <2>;
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@ -339,7 +339,7 @@
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<0x400a000 0x002100>;
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reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
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interrupt-names = "periph_irq";
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interrupts = <GIC_SPI 326 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>;
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qcom,ee = <0>;
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qcom,channel = <0>;
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#address-cells = <2>;
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