ARMv7 Vexpress DT fixes/updates for v4.10
1. Addition of CPU dmips/capacity information to TC2 platform 2. Cleanup/fix unit address warnings and removal of skeleton.dtsi from MPS2 device tree -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJYEyZ2AAoJEABBurwxfuKYydkP/A9aHiZlOxwJ18OW0lX163Bw nWAj/3v50eXt59KUd4TWOO9zoY/TFf+MeftcQal2n+ZEF+qjstnjhDRmM4LW10h4 OTRGSbcEd6W6+lJx3HYVcR6V7SjTrIGI+mHILH0JBFdq8wy/84nroLccyOQd9QYM zmUqOE1J4irCfLt3vubQHv3Dc5gTl1uZSEtbyrBMNXgRJLEX8jijAZRPSDk1mNhw 6eaB+ggOgHzHEjGiqyXJ0zaS26QLPxVD1XxxRFbJyWxzrI6mV2WTM+0IZ6AdmgU2 eynsHjer631Nhg2D49s/3qKuUJgZoOjmQ5LmXbk4qwQTMTsLE+jgRMsyylnUCg7a yshqb9WuUVaVRF/Xa0Bg5oU7YFwgxSsUOnHvkmg11sgZ7Zc/LGjFxVLXlHDXQcv2 03Joqxh5V+v+R2B5xKr7BV1mgv0fvXFghgrxQNsPvdZLNf/SnnXLFE9Boea8SnoA bbQ8mmS8r/3JLMwvhiS3VRbw1HdNHFYYPd4hmp/fA+Ilc6tURkfGBC1Wmhor7/6h wquTOO33MOjNYZhAJvlqcCy6dReFP1JAiFWdpBaaxp+ZQUKxJnSkzmBkTDtFZT2u T2OZHt5EBKYvP3hLUdckgkPX7hbwQOm34fe+JfgRl53hH1i4cnsjiPm9jwtOkkoq +TdB5E0juUpymsdZ8MJt =fUUJ -----END PGP SIGNATURE----- Merge tag 'vexpress-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt ARMv7 Vexpress DT fixes/updates for v4.10 1. Addition of CPU dmips/capacity information to TC2 platform 2. Cleanup/fix unit address warnings and removal of skeleton.dtsi from MPS2 device tree * tag 'vexpress-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: ARM: dts: vexpress: add TC2 cpu capacity-dmips-mhz information ARM: dts: mps2: remove skeleton.dtsi include and fix unit address warnings Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
4eb8883d0b
@ -59,7 +59,7 @@
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stdout-path = "serial0:9600n8";
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};
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memory {
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memory@21000000 {
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device_type = "memory";
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reg = <0x21000000 0x1000000>;
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};
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@ -59,7 +59,7 @@
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stdout-path = "serial0:9600n8";
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};
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memory {
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memory@60000000 {
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device_type = "memory";
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reg = <0x60000000 0x1000000>;
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};
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@ -42,10 +42,12 @@
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "skeleton.dtsi"
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#include "armv7-m.dtsi"
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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oscclk0: clk-osc0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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@ -39,6 +39,7 @@
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reg = <0>;
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cci-control-port = <&cci_control1>;
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cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
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capacity-dmips-mhz = <1024>;
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};
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cpu1: cpu@1 {
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@ -47,6 +48,7 @@
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reg = <1>;
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cci-control-port = <&cci_control1>;
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cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
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capacity-dmips-mhz = <1024>;
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};
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cpu2: cpu@2 {
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@ -55,6 +57,7 @@
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reg = <0x100>;
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cci-control-port = <&cci_control2>;
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cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
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capacity-dmips-mhz = <516>;
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};
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cpu3: cpu@3 {
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@ -63,6 +66,7 @@
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reg = <0x101>;
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cci-control-port = <&cci_control2>;
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cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
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capacity-dmips-mhz = <516>;
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};
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cpu4: cpu@4 {
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@ -71,6 +75,7 @@
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reg = <0x102>;
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cci-control-port = <&cci_control2>;
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cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
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capacity-dmips-mhz = <516>;
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};
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idle-states {
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