SoCFPGA DTS update for v4.10, part 1
- Add a Macnica sodia board - Add support for the Arria10 System resource device - Add support for the Arria10 LEDs - Add QSPI to the socrates board - Update L2 cache settings, enabling arm,shared-override -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJYDhW4AAoJEBmUBAuBoyj0tfUQAJ7y81c9ndfYLafBYsrLqjLp vLon/1tcmRTQLurn8DKV50qUrf1fWCLD5QZHXnFMjDFMMf9H474AeoA8Q+gSXonP ZAWbloIPjieqydC4fCex2rvSTG5pS5js/sUX8tVagEYX8j8FXU8YW4yFwy6hfNfm gIVcSdhUEIerCpYdKVD/MZhlEC9sCz3X+Ld6UvgrEoSN7itYN0t6Pj+U1Y+3jp/3 loF3H9lyb7Th7wonRKb558nE8mPs3TisCjHSEl6rk6dQz9y7Yub3DYelg4zxFkbO /xfn+dYKAcgkFdwWtkq/3Q8gEvd7Zv1IvDebEtSM5GZzUe3N65KhZm36kVRkHXRO zo1/YZCqM10jKwzWmtsEZBFy0fIWiTlVWLHlMl2FggdPVVlp/dB781gXZXqBPYGD vZ1B+hAt8BiBePKt1KC6J1mK9oD4X6Ymi7g+LnZQCsJa793syP+ol+2ZUfI7vqq2 1GdVYMpURefOCB2k73IBfuA0Y/pPuHxzOHmd+jecQq/RRvyOQlxxSobpcfUt1/wc +uiXPVbuHgWrQMjImF5nXj4yETu1ZKTgqKn0WOCSLS6h+6fqVsPROvP1jorNr5TL UGoUB30ehzr1GPBWsIOWvmEFjbI1K0xiD2dmKKBG9U/M1u2ynATN8eiwLdxs+3qa 3jMqzjk2JDyAHDjLH6Mf =yf+4 -----END PGP SIGNATURE----- Merge tag 'socfpga_dts_for_v4.10_part_1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt SoCFPGA DTS update for v4.10, part 1 - Add a Macnica sodia board - Add support for the Arria10 System resource device - Add support for the Arria10 LEDs - Add QSPI to the socrates board - Update L2 cache settings, enabling arm,shared-override * tag 'socfpga_dts_for_v4.10_part_1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: socfpga: socrates: enable qspi ARM: dts: socfpga: add qspi node ARM: dts: socfpga: Add LED framework to A10-SR GPIO ARM: dts: socfpga: Enable GPIO parent for Arria10 SR chip ARM: dts: socfpga: Add Devkit A10-SR fields for Arria10 ARM: dts: socfpga: Add SPI Master1 for Arria10 SR chip ARM: dts: socfpga: enable arm,shared-override in the pl310 ARM: dts: socfpga: Add Macnica sodia board ARM: dts: socfpga: Add new MCVEVK manufacturer compat Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
c3424e1c41
@ -696,6 +696,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
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socfpga_cyclone5_de0_sockit.dtb \
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socfpga_cyclone5_sockit.dtb \
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socfpga_cyclone5_socrates.dtb \
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socfpga_cyclone5_sodia.dtb \
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socfpga_cyclone5_vining_fpga.dtb \
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socfpga_vt.dtb
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dtb-$(CONFIG_ARCH_SPEAR13XX) += \
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@ -686,6 +686,7 @@
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arm,data-latency = <2 1 1>;
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prefetch-data = <1>;
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prefetch-instr = <1>;
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arm,shared-override;
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};
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mmc: dwmmc0@ff704000 {
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@ -705,6 +706,20 @@
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reg = <0xffff0000 0x10000>;
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};
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qspi: spi@ff705000 {
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compatible = "cdns,qspi-nor";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xff705000 0x1000>,
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<0xffa00000 0x1000>;
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interrupts = <0 151 4>;
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cdns,fifo-depth = <128>;
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cdns,fifo-width = <4>;
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cdns,trigger-address = <0x00000000>;
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clocks = <&qspi_clk>;
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status = "disabled";
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};
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rst: rstmgr@ffd05000 {
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#reset-cells = <1>;
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compatible = "altr,rst-mgr";
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@ -562,6 +562,21 @@
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status = "disabled";
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};
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spi1: spi@ffda5000 {
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compatible = "snps,dw-apb-ssi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xffda5000 0x100>;
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interrupts = <0 102 4>;
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num-chipselect = <4>;
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bus-num = <0>;
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/*32bit_access;*/
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tx-dma-channel = <&pdma 16>;
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rx-dma-channel = <&pdma 17>;
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clocks = <&spi_m_clk>;
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status = "disabled";
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};
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sdr: sdr@ffc25000 {
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compatible = "syscon";
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reg = <0xffcfb100 0x80>;
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@ -573,6 +588,9 @@
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interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
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cache-unified;
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cache-level = <2>;
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prefetch-data = <1>;
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prefetch-instr = <1>;
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arm,shared-override;
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};
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mmc: dwmmc0@ff808000 {
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@ -36,6 +36,30 @@
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reg = <0x0 0x40000000>; /* 1GB */
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};
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a10leds {
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compatible = "gpio-leds";
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a10sr_led0 {
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label = "a10sr-led0";
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gpios = <&a10sr_gpio 0 1>;
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};
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a10sr_led1 {
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label = "a10sr-led1";
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gpios = <&a10sr_gpio 1 1>;
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};
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a10sr_led2 {
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label = "a10sr-led2";
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gpios = <&a10sr_gpio 2 1>;
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};
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a10sr_led3 {
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label = "a10sr-led3";
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gpios = <&a10sr_gpio 3 1>;
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};
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};
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soc {
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clkmgr@ffd04000 {
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clocks {
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@ -75,6 +99,31 @@
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&spi1 {
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status = "okay";
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resource-manager@0 {
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compatible = "altr,a10sr";
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reg = <0>;
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spi-max-frequency = <100000>;
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/* low-level active IRQ at GPIO1_5 */
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interrupt-parent = <&portb>;
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interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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a10sr_gpio: gpio-controller {
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compatible = "altr,a10sr-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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};
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&i2c1 {
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speed-mode = <0>;
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status = "okay";
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@ -18,7 +18,7 @@
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#include "socfpga_cyclone5.dtsi"
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/ {
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model = "DENX MCV";
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model = "Aries/DENX MCV";
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compatible = "altr,socfpga-cyclone5", "altr,socfpga";
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memory {
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@ -18,7 +18,7 @@
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#include "socfpga_cyclone5_mcv.dtsi"
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/ {
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model = "DENX MCV EVK";
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model = "Aries/DENX MCV EVK";
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compatible = "altr,socfpga-cyclone5", "altr,socfpga";
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aliases {
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@ -80,3 +80,22 @@
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&mmc {
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status = "okay";
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};
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&qspi {
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status = "okay";
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flash: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "n25q256a";
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reg = <0>;
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spi-max-frequency = <100000000>;
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m25p,fast-read;
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cdns,read-delay = <4>;
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cdns,tshsl-ns = <50>;
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cdns,tsd2d-ns = <50>;
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cdns,tchsh-ns = <4>;
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cdns,tslch-ns = <4>;
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status = "okay";
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};
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};
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123
arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
Normal file
123
arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
Normal file
@ -0,0 +1,123 @@
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/*
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* Copyright (C) 2016 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "socfpga_cyclone5.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Altera SOCFPGA Cyclone V SoC Macnica Sodia board";
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compatible = "altr,socfpga-cyclone5", "altr,socfpga";
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chosen {
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bootargs = "earlyprintk";
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stdout-path = "serial0:115200n8";
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};
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memory {
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name = "memory";
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device_type = "memory";
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reg = <0x0 0x40000000>;
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};
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aliases {
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ethernet0 = &gmac1;
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};
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regulator_3_3v: 3-3-v-regulator {
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compatible = "regulator-fixed";
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regulator-name = "3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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leds: gpio-leds {
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compatible = "gpio-leds";
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hps_led0 {
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label = "hps:green:led0";
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gpios = <&portb 12 GPIO_ACTIVE_LOW>;
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};
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hps_led1 {
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label = "hps:green:led1";
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gpios = <&portb 13 GPIO_ACTIVE_LOW>;
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};
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hps_led2 {
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label = "hps:green:led2";
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gpios = <&portb 14 GPIO_ACTIVE_LOW>;
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};
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hps_led3 {
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label = "hps:green:led3";
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gpios = <&portb 15 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&gmac1 {
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status = "okay";
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phy-mode = "rgmii";
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phy = <&phy0>;
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mdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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rxd0-skew-ps = <0>;
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rxd1-skew-ps = <0>;
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rxd2-skew-ps = <0>;
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rxd3-skew-ps = <0>;
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rxdv-skew-ps = <0>;
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rxc-skew-ps = <3000>;
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txen-skew-ps = <0>;
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txc-skew-ps = <3000>;
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};
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};
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};
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&gpio1 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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eeprom@51 {
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compatible = "atmel,24c32";
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reg = <0x51>;
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pagesize = <32>;
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};
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rtc@68 {
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compatible = "dallas,ds1339";
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reg = <0x68>;
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};
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};
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&mmc0 {
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cd-gpios = <&portb 18 0>;
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vmmc-supply = <®ulator_3_3v>;
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vqmmc-supply = <®ulator_3_3v>;
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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