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Blackfin: push gpio (port) defines into common headers

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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2010-10-25 21:11:10 -04:00
parent 9887f41533
commit 4de2bf8786
24 changed files with 282 additions and 601 deletions
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25
arch/blackfin/include/mach-common/ports-a.h Normal file
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@ -0,0 +1,25 @@
/*
* Port A Masks
*/
#ifndef __BFIN_PERIPHERAL_PORT_A__
#define __BFIN_PERIPHERAL_PORT_A__
#define PA0 (1 << 0)
#define PA1 (1 << 1)
#define PA2 (1 << 2)
#define PA3 (1 << 3)
#define PA4 (1 << 4)
#define PA5 (1 << 5)
#define PA6 (1 << 6)
#define PA7 (1 << 7)
#define PA8 (1 << 8)
#define PA9 (1 << 9)
#define PA10 (1 << 10)
#define PA11 (1 << 11)
#define PA12 (1 << 12)
#define PA13 (1 << 13)
#define PA14 (1 << 14)
#define PA15 (1 << 15)
#endif

25
arch/blackfin/include/mach-common/ports-b.h Normal file
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@ -0,0 +1,25 @@
/*
* Port B Masks
*/
#ifndef __BFIN_PERIPHERAL_PORT_B__
#define __BFIN_PERIPHERAL_PORT_B__
#define PB0 (1 << 0)
#define PB1 (1 << 1)
#define PB2 (1 << 2)
#define PB3 (1 << 3)
#define PB4 (1 << 4)
#define PB5 (1 << 5)
#define PB6 (1 << 6)
#define PB7 (1 << 7)
#define PB8 (1 << 8)
#define PB9 (1 << 9)
#define PB10 (1 << 10)
#define PB11 (1 << 11)
#define PB12 (1 << 12)
#define PB13 (1 << 13)
#define PB14 (1 << 14)
#define PB15 (1 << 15)
#endif

25
arch/blackfin/include/mach-common/ports-c.h Normal file
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@ -0,0 +1,25 @@
/*
* Port C Masks
*/
#ifndef __BFIN_PERIPHERAL_PORT_C__
#define __BFIN_PERIPHERAL_PORT_C__
#define PC0 (1 << 0)
#define PC1 (1 << 1)
#define PC2 (1 << 2)
#define PC3 (1 << 3)
#define PC4 (1 << 4)
#define PC5 (1 << 5)
#define PC6 (1 << 6)
#define PC7 (1 << 7)
#define PC8 (1 << 8)
#define PC9 (1 << 9)
#define PC10 (1 << 10)
#define PC11 (1 << 11)
#define PC12 (1 << 12)
#define PC13 (1 << 13)
#define PC14 (1 << 14)
#define PC15 (1 << 15)
#endif

25
arch/blackfin/include/mach-common/ports-d.h Normal file
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@ -0,0 +1,25 @@
/*
* Port D Masks
*/
#ifndef __BFIN_PERIPHERAL_PORT_D__
#define __BFIN_PERIPHERAL_PORT_D__
#define PD0 (1 << 0)
#define PD1 (1 << 1)
#define PD2 (1 << 2)
#define PD3 (1 << 3)
#define PD4 (1 << 4)
#define PD5 (1 << 5)
#define PD6 (1 << 6)
#define PD7 (1 << 7)
#define PD8 (1 << 8)
#define PD9 (1 << 9)
#define PD10 (1 << 10)
#define PD11 (1 << 11)
#define PD12 (1 << 12)
#define PD13 (1 << 13)
#define PD14 (1 << 14)
#define PD15 (1 << 15)
#endif

25
arch/blackfin/include/mach-common/ports-e.h Normal file
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@ -0,0 +1,25 @@
/*
* Port E Masks
*/
#ifndef __BFIN_PERIPHERAL_PORT_E__
#define __BFIN_PERIPHERAL_PORT_E__
#define PE0 (1 << 0)
#define PE1 (1 << 1)
#define PE2 (1 << 2)
#define PE3 (1 << 3)
#define PE4 (1 << 4)
#define PE5 (1 << 5)
#define PE6 (1 << 6)
#define PE7 (1 << 7)
#define PE8 (1 << 8)
#define PE9 (1 << 9)
#define PE10 (1 << 10)
#define PE11 (1 << 11)
#define PE12 (1 << 12)
#define PE13 (1 << 13)
#define PE14 (1 << 14)
#define PE15 (1 << 15)
#endif

25
arch/blackfin/include/mach-common/ports-f.h Normal file
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@ -0,0 +1,25 @@
/*
* Port F Masks
*/
#ifndef __BFIN_PERIPHERAL_PORT_F__
#define __BFIN_PERIPHERAL_PORT_F__
#define PF0 (1 << 0)
#define PF1 (1 << 1)
#define PF2 (1 << 2)
#define PF3 (1 << 3)
#define PF4 (1 << 4)
#define PF5 (1 << 5)
#define PF6 (1 << 6)
#define PF7 (1 << 7)
#define PF8 (1 << 8)
#define PF9 (1 << 9)
#define PF10 (1 << 10)
#define PF11 (1 << 11)
#define PF12 (1 << 12)
#define PF13 (1 << 13)
#define PF14 (1 << 14)
#define PF15 (1 << 15)
#endif

25
arch/blackfin/include/mach-common/ports-g.h Normal file
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@ -0,0 +1,25 @@
/*
* Port G Masks
*/
#ifndef __BFIN_PERIPHERAL_PORT_G__
#define __BFIN_PERIPHERAL_PORT_G__
#define PG0 (1 << 0)
#define PG1 (1 << 1)
#define PG2 (1 << 2)
#define PG3 (1 << 3)
#define PG4 (1 << 4)
#define PG5 (1 << 5)
#define PG6 (1 << 6)
#define PG7 (1 << 7)
#define PG8 (1 << 8)
#define PG9 (1 << 9)
#define PG10 (1 << 10)
#define PG11 (1 << 11)
#define PG12 (1 << 12)
#define PG13 (1 << 13)
#define PG14 (1 << 14)
#define PG15 (1 << 15)
#endif

25
arch/blackfin/include/mach-common/ports-h.h Normal file
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@ -0,0 +1,25 @@
/*
* Port H Masks
*/
#ifndef __BFIN_PERIPHERAL_PORT_H__
#define __BFIN_PERIPHERAL_PORT_H__
#define PH0 (1 << 0)
#define PH1 (1 << 1)
#define PH2 (1 << 2)
#define PH3 (1 << 3)
#define PH4 (1 << 4)
#define PH5 (1 << 5)
#define PH6 (1 << 6)
#define PH7 (1 << 7)
#define PH8 (1 << 8)
#define PH9 (1 << 9)
#define PH10 (1 << 10)
#define PH11 (1 << 11)
#define PH12 (1 << 12)
#define PH13 (1 << 13)
#define PH14 (1 << 14)
#define PH15 (1 << 15)
#endif

25
arch/blackfin/include/mach-common/ports-i.h Normal file
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@ -0,0 +1,25 @@
/*
* Port I Masks
*/
#ifndef __BFIN_PERIPHERAL_PORT_I__
#define __BFIN_PERIPHERAL_PORT_I__
#define PI0 (1 << 0)
#define PI1 (1 << 1)
#define PI2 (1 << 2)
#define PI3 (1 << 3)
#define PI4 (1 << 4)
#define PI5 (1 << 5)
#define PI6 (1 << 6)
#define PI7 (1 << 7)
#define PI8 (1 << 8)
#define PI9 (1 << 9)
#define PI10 (1 << 10)
#define PI11 (1 << 11)
#define PI12 (1 << 12)
#define PI13 (1 << 13)
#define PI14 (1 << 14)
#define PI15 (1 << 15)
#endif

25
arch/blackfin/include/mach-common/ports-j.h Normal file
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@ -0,0 +1,25 @@
/*
* Port J Masks
*/
#ifndef __BFIN_PERIPHERAL_PORT_J__
#define __BFIN_PERIPHERAL_PORT_J__
#define PJ0 (1 << 0)
#define PJ1 (1 << 1)
#define PJ2 (1 << 2)
#define PJ3 (1 << 3)
#define PJ4 (1 << 4)
#define PJ5 (1 << 5)
#define PJ6 (1 << 6)
#define PJ7 (1 << 7)
#define PJ8 (1 << 8)
#define PJ9 (1 << 9)
#define PJ10 (1 << 10)
#define PJ11 (1 << 11)
#define PJ12 (1 << 12)
#define PJ13 (1 << 13)
#define PJ14 (1 << 14)
#define PJ15 (1 << 15)
#endif

49
arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
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@ -770,55 +770,6 @@
#define EMU_RUN 0x0200 /* Emulation Behavior Select */
#define ERR_TYP 0xC000 /* Error Type */
/* ****************** GPIO PORTS F, G, H MASKS ***********************/
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) Masks */
/* Port F Masks */
#define PF0 0x0001
#define PF1 0x0002
#define PF2 0x0004
#define PF3 0x0008
#define PF4 0x0010
#define PF5 0x0020
#define PF6 0x0040
#define PF7 0x0080
#define PF8 0x0100
#define PF9 0x0200
#define PF10 0x0400
#define PF11 0x0800
#define PF12 0x1000
#define PF13 0x2000
#define PF14 0x4000
#define PF15 0x8000
/* Port G Masks */
#define PG0 0x0001
#define PG1 0x0002
#define PG2 0x0004
#define PG3 0x0008
#define PG4 0x0010
#define PG5 0x0020
#define PG6 0x0040
#define PG7 0x0080
#define PG8 0x0100
#define PG9 0x0200
#define PG10 0x0400
#define PG11 0x0800
#define PG12 0x1000
#define PG13 0x2000
#define PG14 0x4000
#define PG15 0x8000
/* Port H Masks */
#define PH0 0x0001
#define PH1 0x0002
#define PH2 0x0004
#define PH3 0x0008
#define PH4 0x0010
#define PH5 0x0020
#define PH6 0x0040
#define PH7 0x0080
/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS *************************/
/* EBIU_AMGCTL Masks */
#define AMCKEN 0x0001 /* Enable CLKOUT */

4
arch/blackfin/mach-bf518/include/mach/gpio.h
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@ -55,4 +55,8 @@
#define PORT_G GPIO_PG0
#define PORT_H GPIO_PH0
#include <mach-common/ports-f.h>
#include <mach-common/ports-g.h>
#include <mach-common/ports-h.h>
#endif /* _MACH_GPIO_H_ */

57
arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
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@ -771,63 +771,6 @@
#define EMU_RUN 0x0200 /* Emulation Behavior Select */
#define ERR_TYP 0xC000 /* Error Type */
/* ****************** GPIO PORTS F, G, H MASKS ***********************/
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) Masks */
/* Port F Masks */
#define PF0 0x0001
#define PF1 0x0002
#define PF2 0x0004
#define PF3 0x0008
#define PF4 0x0010
#define PF5 0x0020
#define PF6 0x0040
#define PF7 0x0080
#define PF8 0x0100
#define PF9 0x0200
#define PF10 0x0400
#define PF11 0x0800
#define PF12 0x1000
#define PF13 0x2000
#define PF14 0x4000
#define PF15 0x8000
/* Port G Masks */
#define PG0 0x0001
#define PG1 0x0002
#define PG2 0x0004
#define PG3 0x0008
#define PG4 0x0010
#define PG5 0x0020
#define PG6 0x0040
#define PG7 0x0080
#define PG8 0x0100
#define PG9 0x0200
#define PG10 0x0400
#define PG11 0x0800
#define PG12 0x1000
#define PG13 0x2000
#define PG14 0x4000
#define PG15 0x8000
/* Port H Masks */
#define PH0 0x0001
#define PH1 0x0002
#define PH2 0x0004
#define PH3 0x0008
#define PH4 0x0010
#define PH5 0x0020
#define PH6 0x0040
#define PH7 0x0080
#define PH8 0x0100
#define PH9 0x0200
#define PH10 0x0400
#define PH11 0x0800
#define PH12 0x1000
#define PH13 0x2000
#define PH14 0x4000
#define PH15 0x8000
/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS *************************/
/* EBIU_AMGCTL Masks */
#define AMCKEN 0x0001 /* Enable CLKOUT */

4
arch/blackfin/mach-bf527/include/mach/gpio.h
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@ -62,4 +62,8 @@
#define PORT_G GPIO_PG0
#define PORT_H GPIO_PH0
#include <mach-common/ports-f.h>
#include <mach-common/ports-g.h>
#include <mach-common/ports-h.h>
#endif /* _MACH_GPIO_H_ */

38
arch/blackfin/mach-bf533/include/mach/defBF532.h
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@ -562,44 +562,6 @@
#define ERR_TYP_P0 0x0E
#define ERR_TYP_P1 0x0F
/*/ ****************** PROGRAMMABLE FLAG MASKS ********************* */
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) Masks */
#define PF0 0x0001
#define PF1 0x0002
#define PF2 0x0004
#define PF3 0x0008
#define PF4 0x0010
#define PF5 0x0020
#define PF6 0x0040
#define PF7 0x0080
#define PF8 0x0100
#define PF9 0x0200
#define PF10 0x0400
#define PF11 0x0800
#define PF12 0x1000
#define PF13 0x2000
#define PF14 0x4000
#define PF15 0x8000
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) BIT POSITIONS */
#define PF0_P 0
#define PF1_P 1
#define PF2_P 2
#define PF3_P 3
#define PF4_P 4
#define PF5_P 5
#define PF6_P 6
#define PF7_P 7
#define PF8_P 8
#define PF9_P 9
#define PF10_P 10
#define PF11_P 11
#define PF12_P 12
#define PF13_P 13
#define PF14_P 14
#define PF15_P 15
/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS ************* */
/* AMGCTL Masks */

2
arch/blackfin/mach-bf533/include/mach/gpio.h
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@ -28,4 +28,6 @@
#define PORT_F GPIO_PF0
#include <mach-common/ports-f.h>
#endif /* _MACH_GPIO_H_ */

56
arch/blackfin/mach-bf537/include/mach/defBF534.h
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@ -1095,62 +1095,6 @@
#define EMU_RUN 0x0200 /* Emulation Behavior Select */
#define ERR_TYP 0xC000 /* Error Type */
/* ****************** GPIO PORTS F, G, H MASKS ***********************/
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) Masks */
/* Port F Masks */
#define PF0 0x0001
#define PF1 0x0002
#define PF2 0x0004
#define PF3 0x0008
#define PF4 0x0010
#define PF5 0x0020
#define PF6 0x0040
#define PF7 0x0080
#define PF8 0x0100
#define PF9 0x0200
#define PF10 0x0400
#define PF11 0x0800
#define PF12 0x1000
#define PF13 0x2000
#define PF14 0x4000
#define PF15 0x8000
/* Port G Masks */
#define PG0 0x0001
#define PG1 0x0002
#define PG2 0x0004
#define PG3 0x0008
#define PG4 0x0010
#define PG5 0x0020
#define PG6 0x0040
#define PG7 0x0080
#define PG8 0x0100
#define PG9 0x0200
#define PG10 0x0400
#define PG11 0x0800
#define PG12 0x1000
#define PG13 0x2000
#define PG14 0x4000
#define PG15 0x8000
/* Port H Masks */
#define PH0 0x0001
#define PH1 0x0002
#define PH2 0x0004
#define PH3 0x0008
#define PH4 0x0010
#define PH5 0x0020
#define PH6 0x0040
#define PH7 0x0080
#define PH8 0x0100
#define PH9 0x0200
#define PH10 0x0400
#define PH11 0x0800
#define PH12 0x1000
#define PH13 0x2000
#define PH14 0x4000
#define PH15 0x8000
/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS *************************/
/* EBIU_AMGCTL Masks */
#define AMCKEN 0x0001 /* Enable CLKOUT */

4
arch/blackfin/mach-bf537/include/mach/gpio.h
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@ -62,4 +62,8 @@
#define PORT_G GPIO_PG0
#define PORT_H GPIO_PH0
#include <mach-common/ports-f.h>
#include <mach-common/ports-g.h>
#include <mach-common/ports-h.h>
#endif /* _MACH_GPIO_H_ */

129
arch/blackfin/mach-bf538/include/mach/defBF539.h
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@ -1627,135 +1627,6 @@
#define ERR_TYP_P0 0x0E
#define ERR_TYP_P1 0x0F
/*/ ****************** GENERAL-PURPOSE I/O ********************* */
/* Flag I/O (FIO_) Masks */
#define PF0 0x0001
#define PF1 0x0002
#define PF2 0x0004
#define PF3 0x0008
#define PF4 0x0010
#define PF5 0x0020
#define PF6 0x0040
#define PF7 0x0080
#define PF8 0x0100
#define PF9 0x0200
#define PF10 0x0400
#define PF11 0x0800
#define PF12 0x1000
#define PF13 0x2000
#define PF14 0x4000
#define PF15 0x8000
/* PORT F BIT POSITIONS */
#define PF0_P 0x0
#define PF1_P 0x1
#define PF2_P 0x2
#define PF3_P 0x3
#define PF4_P 0x4
#define PF5_P 0x5
#define PF6_P 0x6
#define PF7_P 0x7
#define PF8_P 0x8
#define PF9_P 0x9
#define PF10_P 0xA
#define PF11_P 0xB
#define PF12_P 0xC
#define PF13_P 0xD
#define PF14_P 0xE
#define PF15_P 0xF
/******************* GPIO MASKS *********************/
/* Port C Masks */
#define PC0 0x0001
#define PC1 0x0002
#define PC4 0x0010
#define PC5 0x0020
#define PC6 0x0040
#define PC7 0x0080
#define PC8 0x0100
#define PC9 0x0200
/* Port C Bit Positions */
#define PC0_P 0x0
#define PC1_P 0x1
#define PC4_P 0x4
#define PC5_P 0x5
#define PC6_P 0x6
#define PC7_P 0x7
#define PC8_P 0x8
#define PC9_P 0x9
/* Port D */
#define PD0 0x0001
#define PD1 0x0002
#define PD2 0x0004
#define PD3 0x0008
#define PD4 0x0010
#define PD5 0x0020
#define PD6 0x0040
#define PD7 0x0080
#define PD8 0x0100
#define PD9 0x0200
#define PD10 0x0400
#define PD11 0x0800
#define PD12 0x1000
#define PD13 0x2000
#define PD14 0x4000
#define PD15 0x8000
/* Port D Bit Positions */
#define PD0_P 0x0
#define PD1_P 0x1
#define PD2_P 0x2
#define PD3_P 0x3
#define PD4_P 0x4
#define PD5_P 0x5
#define PD6_P 0x6
#define PD7_P 0x7
#define PD8_P 0x8
#define PD9_P 0x9
#define PD10_P 0xA
#define PD11_P 0xB
#define PD12_P 0xC
#define PD13_P 0xD
#define PD14_P 0xE
#define PD15_P 0xF
/* Port E */
#define PE0 0x0001
#define PE1 0x0002
#define PE2 0x0004
#define PE3 0x0008
#define PE4 0x0010
#define PE5 0x0020
#define PE6 0x0040
#define PE7 0x0080
#define PE8 0x0100
#define PE9 0x0200
#define PE10 0x0400
#define PE11 0x0800
#define PE12 0x1000
#define PE13 0x2000
#define PE14 0x4000
#define PE15 0x8000
/* Port E Bit Positions */
#define PE0_P 0x0
#define PE1_P 0x1
#define PE2_P 0x2
#define PE3_P 0x3
#define PE4_P 0x4
#define PE5_P 0x5
#define PE6_P 0x6
#define PE7_P 0x7
#define PE8_P 0x8
#define PE9_P 0x9
#define PE10_P 0xA
#define PE11_P 0xB
#define PE12_P 0xC
#define PE13_P 0xD
#define PE14_P 0xE
#define PE15_P 0xF
/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS ************* */
/* EBIU_AMGCTL Masks */
#define AMCKEN 0x0001 /* Enable CLKOUT */

5
arch/blackfin/mach-bf538/include/mach/gpio.h
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@ -70,4 +70,9 @@
#define PORT_D GPIO_PD0
#define PORT_E GPIO_PE0
#include <mach-common/ports-c.h>
#include <mach-common/ports-d.h>
#include <mach-common/ports-e.h>
#include <mach-common/ports-f.h>
#endif /* _MACH_GPIO_H_ */

234
arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
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@ -2231,240 +2231,6 @@
#define PIQ30 0x40000000
#define PIQ31 0x80000000
/* PORT A Bit Definitions for the registers
PORTA, PORTA_SET, PORTA_CLEAR,
PORTA_DIR_SET, PORTA_DIR_CLEAR, PORTA_INEN,
PORTA_FER registers
*/
#define PA0 0x0001
#define PA1 0x0002
#define PA2 0x0004
#define PA3 0x0008
#define PA4 0x0010
#define PA5 0x0020
#define PA6 0x0040
#define PA7 0x0080
#define PA8 0x0100
#define PA9 0x0200
#define PA10 0x0400
#define PA11 0x0800
#define PA12 0x1000
#define PA13 0x2000
#define PA14 0x4000
#define PA15 0x8000
/* PORT B Bit Definitions for the registers
PORTB, PORTB_SET, PORTB_CLEAR,
PORTB_DIR_SET, PORTB_DIR_CLEAR, PORTB_INEN,
PORTB_FER registers
*/
#define PB0 0x0001
#define PB1 0x0002
#define PB2 0x0004
#define PB3 0x0008
#define PB4 0x0010
#define PB5 0x0020
#define PB6 0x0040
#define PB7 0x0080
#define PB8 0x0100
#define PB9 0x0200
#define PB10 0x0400
#define PB11 0x0800
#define PB12 0x1000
#define PB13 0x2000
#define PB14 0x4000
/* PORT C Bit Definitions for the registers
PORTC, PORTC_SET, PORTC_CLEAR,
PORTC_DIR_SET, PORTC_DIR_CLEAR, PORTC_INEN,
PORTC_FER registers
*/
#define PC0 0x0001
#define PC1 0x0002
#define PC2 0x0004
#define PC3 0x0008
#define PC4 0x0010
#define PC5 0x0020
#define PC6 0x0040
#define PC7 0x0080
#define PC8 0x0100
#define PC9 0x0200
#define PC10 0x0400
#define PC11 0x0800
#define PC12 0x1000
#define PC13 0x2000
/* PORT D Bit Definitions for the registers
PORTD, PORTD_SET, PORTD_CLEAR,
PORTD_DIR_SET, PORTD_DIR_CLEAR, PORTD_INEN,
PORTD_FER registers
*/
#define PD0 0x0001
#define PD1 0x0002
#define PD2 0x0004
#define PD3 0x0008
#define PD4 0x0010
#define PD5 0x0020
#define PD6 0x0040
#define PD7 0x0080
#define PD8 0x0100
#define PD9 0x0200
#define PD10 0x0400
#define PD11 0x0800
#define PD12 0x1000
#define PD13 0x2000
#define PD14 0x4000
#define PD15 0x8000
/* PORT E Bit Definitions for the registers
PORTE, PORTE_SET, PORTE_CLEAR,
PORTE_DIR_SET, PORTE_DIR_CLEAR, PORTE_INEN,
PORTE_FER registers
*/
#define PE0 0x0001
#define PE1 0x0002
#define PE2 0x0004
#define PE3 0x0008
#define PE4 0x0010
#define PE5 0x0020
#define PE6 0x0040
#define PE7 0x0080
#define PE8 0x0100
#define PE9 0x0200
#define PE10 0x0400
#define PE11 0x0800
#define PE12 0x1000
#define PE13 0x2000
#define PE14 0x4000
#define PE15 0x8000
/* PORT F Bit Definitions for the registers
PORTF, PORTF_SET, PORTF_CLEAR,
PORTF_DIR_SET, PORTF_DIR_CLEAR, PORTF_INEN,
PORTF_FER registers
*/
#define PF0 0x0001
#define PF1 0x0002
#define PF2 0x0004
#define PF3 0x0008
#define PF4 0x0010
#define PF5 0x0020
#define PF6 0x0040
#define PF7 0x0080
#define PF8 0x0100
#define PF9 0x0200
#define PF10 0x0400
#define PF11 0x0800
#define PF12 0x1000
#define PF13 0x2000
#define PF14 0x4000
#define PF15 0x8000
/* PORT G Bit Definitions for the registers
PORTG, PORTG_SET, PORTG_CLEAR,
PORTG_DIR_SET, PORTG_DIR_CLEAR, PORTG_INEN,
PORTG_FER registers
*/
#define PG0 0x0001
#define PG1 0x0002
#define PG2 0x0004
#define PG3 0x0008
#define PG4 0x0010
#define PG5 0x0020
#define PG6 0x0040
#define PG7 0x0080
#define PG8 0x0100
#define PG9 0x0200
#define PG10 0x0400
#define PG11 0x0800
#define PG12 0x1000
#define PG13 0x2000
#define PG14 0x4000
#define PG15 0x8000
/* PORT H Bit Definitions for the registers
PORTH, PORTH_SET, PORTH_CLEAR,
PORTH_DIR_SET, PORTH_DIR_CLEAR, PORTH_INEN,
PORTH_FER registers
*/
#define PH0 0x0001
#define PH1 0x0002
#define PH2 0x0004
#define PH3 0x0008
#define PH4 0x0010
#define PH5 0x0020
#define PH6 0x0040
#define PH7 0x0080
#define PH8 0x0100
#define PH9 0x0200
#define PH10 0x0400
#define PH11 0x0800
#define PH12 0x1000
#define PH13 0x2000
/* PORT I Bit Definitions for the registers
PORTI, PORTI_SET, PORTI_CLEAR,
PORTI_DIR_SET, PORTI_DIR_CLEAR, PORTI_INEN,
PORTI_FER registers
*/
#define PI0 0x0001
#define PI1 0x0002
#define PI2 0x0004
#define PI3 0x0008
#define PI4 0x0010
#define PI5 0x0020
#define PI6 0x0040
#define PI7 0x0080
#define PI8 0x0100
#define PI9 0x0200
#define PI10 0x0400
#define PI11 0x0800
#define PI12 0x1000
#define PI13 0x2000
#define PI14 0x4000
#define PI15 0x8000
/* PORT J Bit Definitions for the registers
PORTJ, PORTJ_SET, PORTJ_CLEAR,
PORTJ_DIR_SET, PORTJ_DIR_CLEAR, PORTJ_INEN,
PORTJ_FER registers
*/
#define PJ0 0x0001
#define PJ1 0x0002
#define PJ2 0x0004
#define PJ3 0x0008
#define PJ4 0x0010
#define PJ5 0x0020
#define PJ6 0x0040
#define PJ7 0x0080
#define PJ8 0x0100
#define PJ9 0x0200
#define PJ10 0x0400
#define PJ11 0x0800
#define PJ12 0x1000
#define PJ13 0x2000
/* Port Muxing Bit Fields for PORTx_MUX Registers */
#define MUX0 0x00000003

11
arch/blackfin/mach-bf548/include/mach/gpio.h
View File

@ -200,4 +200,15 @@ struct gpio_port_s {
#endif
#include <mach-common/ports-a.h>
#include <mach-common/ports-b.h>
#include <mach-common/ports-c.h>
#include <mach-common/ports-d.h>
#include <mach-common/ports-e.h>
#include <mach-common/ports-f.h>
#include <mach-common/ports-g.h>
#include <mach-common/ports-h.h>
#include <mach-common/ports-i.h>
#include <mach-common/ports-j.h>
#endif /* _MACH_GPIO_H_ */

38
arch/blackfin/mach-bf561/include/mach/defBF561.h
View File

@ -1097,44 +1097,6 @@
#define ERR_TYP_P0 0x0E
#define ERR_TYP_P1 0x0F
/*/ ****************** PROGRAMMABLE FLAG MASKS ********************* */
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) Masks */
#define PF0 0x0001
#define PF1 0x0002
#define PF2 0x0004
#define PF3 0x0008
#define PF4 0x0010
#define PF5 0x0020
#define PF6 0x0040
#define PF7 0x0080
#define PF8 0x0100
#define PF9 0x0200
#define PF10 0x0400
#define PF11 0x0800
#define PF12 0x1000
#define PF13 0x2000
#define PF14 0x4000
#define PF15 0x8000
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) BIT POSITIONS */
#define PF0_P 0
#define PF1_P 1
#define PF2_P 2
#define PF3_P 3
#define PF4_P 4
#define PF5_P 5
#define PF6_P 6
#define PF7_P 7
#define PF8_P 8
#define PF9_P 9
#define PF10_P 10
#define PF11_P 11
#define PF12_P 12
#define PF13_P 13
#define PF14_P 14
#define PF15_P 15
/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS ************* */
/* AMGCTL Masks */

2
arch/blackfin/mach-bf561/include/mach/gpio.h
View File

@ -62,4 +62,6 @@
#define PORT_FIO1 GPIO_16
#define PORT_FIO2 GPIO_32
#include <mach-common/ports-f.h>
#endif /* _MACH_GPIO_H_ */