forked from Minki/linux
thermal: tegra: add support for EDP IRQ
Add support to generate OC (over-current) interrupts to indicate the OC event and print out alarm messages. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
This commit is contained in:
Wei Ni
Eduardo Valentin
parent
5c9d6ac231
commit
4a04beb1bf
@ -23,6 +23,8 @@
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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@ -104,6 +106,16 @@
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#define STATS_CTL_CLR_UP 0x2
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#define STATS_CTL_EN_UP 0x1
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#define OC_INTR_STATUS 0x39c
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#define OC_INTR_ENABLE 0x3a0
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#define OC_INTR_DISABLE 0x3a4
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#define OC_INTR_OC1_MASK BIT(0)
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#define OC_INTR_OC2_MASK BIT(1)
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#define OC_INTR_OC3_MASK BIT(2)
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#define OC_INTR_OC4_MASK BIT(3)
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#define OC_INTR_OC5_MASK BIT(4)
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#define THROT_GLOBAL_CFG 0x400
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#define THROT_GLOBAL_ENB_MASK BIT(0)
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@ -212,9 +224,23 @@ static const int max_high_temp = 127000;
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enum soctherm_throttle_id {
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THROTTLE_LIGHT = 0,
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THROTTLE_HEAVY,
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THROTTLE_OC1,
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THROTTLE_OC2,
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THROTTLE_OC3,
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THROTTLE_OC4,
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THROTTLE_OC5, /* OC5 is reserved */
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THROTTLE_SIZE,
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};
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enum soctherm_oc_irq_id {
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TEGRA_SOC_OC_IRQ_1,
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TEGRA_SOC_OC_IRQ_2,
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TEGRA_SOC_OC_IRQ_3,
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TEGRA_SOC_OC_IRQ_4,
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TEGRA_SOC_OC_IRQ_5,
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TEGRA_SOC_OC_IRQ_MAX,
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};
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enum soctherm_throttle_dev_id {
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THROTTLE_DEV_CPU = 0,
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THROTTLE_DEV_GPU,
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@ -224,6 +250,11 @@ enum soctherm_throttle_dev_id {
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static const char *const throt_names[] = {
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[THROTTLE_LIGHT] = "light",
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[THROTTLE_HEAVY] = "heavy",
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[THROTTLE_OC1] = "oc1",
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[THROTTLE_OC2] = "oc2",
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[THROTTLE_OC3] = "oc3",
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[THROTTLE_OC4] = "oc4",
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[THROTTLE_OC5] = "oc5",
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};
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struct tegra_soctherm;
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@ -255,6 +286,7 @@ struct tegra_soctherm {
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void __iomem *ccroc_regs;
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int thermal_irq;
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int edp_irq;
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u32 *calib;
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struct thermal_zone_device **thermctl_tzs;
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@ -267,6 +299,15 @@ struct tegra_soctherm {
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struct mutex thermctl_lock;
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};
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struct soctherm_oc_irq_chip_data {
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struct mutex irq_lock; /* serialize OC IRQs */
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struct irq_chip irq_chip;
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struct irq_domain *domain;
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int irq_enable;
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};
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static struct soctherm_oc_irq_chip_data soc_irq_cdata;
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/**
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* ccroc_writel() - writes a value to a CCROC register
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* @ts: pointer to a struct tegra_soctherm
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@ -839,6 +880,360 @@ static irqreturn_t soctherm_thermal_isr_thread(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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/**
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* soctherm_oc_intr_enable() - Enables the soctherm over-current interrupt
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* @alarm: The soctherm throttle id
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* @enable: Flag indicating enable the soctherm over-current
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* interrupt or disable it
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*
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* Enables a specific over-current pins @alarm to raise an interrupt if the flag
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* is set and the alarm corresponds to OC1, OC2, OC3, or OC4.
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*/
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static void soctherm_oc_intr_enable(struct tegra_soctherm *ts,
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enum soctherm_throttle_id alarm,
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bool enable)
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{
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u32 r;
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if (!enable)
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return;
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r = readl(ts->regs + OC_INTR_ENABLE);
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switch (alarm) {
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case THROTTLE_OC1:
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r = REG_SET_MASK(r, OC_INTR_OC1_MASK, 1);
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break;
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case THROTTLE_OC2:
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r = REG_SET_MASK(r, OC_INTR_OC2_MASK, 1);
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break;
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case THROTTLE_OC3:
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r = REG_SET_MASK(r, OC_INTR_OC3_MASK, 1);
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break;
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case THROTTLE_OC4:
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r = REG_SET_MASK(r, OC_INTR_OC4_MASK, 1);
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break;
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default:
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r = 0;
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break;
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}
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writel(r, ts->regs + OC_INTR_ENABLE);
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}
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/**
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* soctherm_handle_alarm() - Handles soctherm alarms
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* @alarm: The soctherm throttle id
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*
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* "Handles" over-current alarms (OC1, OC2, OC3, and OC4) by printing
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* a warning or informative message.
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*
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* Return: -EINVAL for @alarm = THROTTLE_OC3, otherwise 0 (success).
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*/
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static int soctherm_handle_alarm(enum soctherm_throttle_id alarm)
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{
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int rv = -EINVAL;
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switch (alarm) {
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case THROTTLE_OC1:
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pr_debug("soctherm: Successfully handled OC1 alarm\n");
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rv = 0;
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break;
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case THROTTLE_OC2:
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pr_debug("soctherm: Successfully handled OC2 alarm\n");
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rv = 0;
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break;
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case THROTTLE_OC3:
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pr_debug("soctherm: Successfully handled OC3 alarm\n");
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rv = 0;
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break;
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case THROTTLE_OC4:
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pr_debug("soctherm: Successfully handled OC4 alarm\n");
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rv = 0;
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break;
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default:
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break;
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}
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if (rv)
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pr_err("soctherm: ERROR in handling %s alarm\n",
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throt_names[alarm]);
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return rv;
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}
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/**
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* soctherm_edp_isr_thread() - log an over-current interrupt request
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* @irq: OC irq number. Currently not being used. See description
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* @arg: a void pointer for callback, currently not being used
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*
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* Over-current events are handled in hardware. This function is called to log
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* and handle any OC events that happened. Additionally, it checks every
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* over-current interrupt registers for registers are set but
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* was not expected (i.e. any discrepancy in interrupt status) by the function,
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* the discrepancy will logged.
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*
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* Return: %IRQ_HANDLED
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*/
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static irqreturn_t soctherm_edp_isr_thread(int irq, void *arg)
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{
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struct tegra_soctherm *ts = arg;
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u32 st, ex, oc1, oc2, oc3, oc4;
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st = readl(ts->regs + OC_INTR_STATUS);
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/* deliberately clear expected interrupts handled in SW */
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oc1 = st & OC_INTR_OC1_MASK;
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oc2 = st & OC_INTR_OC2_MASK;
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oc3 = st & OC_INTR_OC3_MASK;
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oc4 = st & OC_INTR_OC4_MASK;
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ex = oc1 | oc2 | oc3 | oc4;
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pr_err("soctherm: OC ALARM 0x%08x\n", ex);
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if (ex) {
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writel(st, ts->regs + OC_INTR_STATUS);
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st &= ~ex;
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if (oc1 && !soctherm_handle_alarm(THROTTLE_OC1))
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soctherm_oc_intr_enable(ts, THROTTLE_OC1, true);
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if (oc2 && !soctherm_handle_alarm(THROTTLE_OC2))
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soctherm_oc_intr_enable(ts, THROTTLE_OC2, true);
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if (oc3 && !soctherm_handle_alarm(THROTTLE_OC3))
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soctherm_oc_intr_enable(ts, THROTTLE_OC3, true);
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if (oc4 && !soctherm_handle_alarm(THROTTLE_OC4))
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soctherm_oc_intr_enable(ts, THROTTLE_OC4, true);
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if (oc1 && soc_irq_cdata.irq_enable & BIT(0))
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handle_nested_irq(
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irq_find_mapping(soc_irq_cdata.domain, 0));
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if (oc2 && soc_irq_cdata.irq_enable & BIT(1))
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handle_nested_irq(
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irq_find_mapping(soc_irq_cdata.domain, 1));
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if (oc3 && soc_irq_cdata.irq_enable & BIT(2))
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handle_nested_irq(
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irq_find_mapping(soc_irq_cdata.domain, 2));
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if (oc4 && soc_irq_cdata.irq_enable & BIT(3))
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handle_nested_irq(
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irq_find_mapping(soc_irq_cdata.domain, 3));
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}
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if (st) {
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pr_err("soctherm: Ignored unexpected OC ALARM 0x%08x\n", st);
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writel(st, ts->regs + OC_INTR_STATUS);
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}
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return IRQ_HANDLED;
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}
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/**
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* soctherm_edp_isr() - Disables any active interrupts
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* @irq: The interrupt request number
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* @arg: Opaque pointer to an argument
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*
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* Writes to the OC_INTR_DISABLE register the over current interrupt status,
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* masking any asserted interrupts. Doing this prevents the same interrupts
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* from triggering this isr repeatedly. The thread woken by this isr will
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* handle asserted interrupts and subsequently unmask/re-enable them.
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*
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* The OC_INTR_DISABLE register indicates which OC interrupts
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* have been disabled.
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*
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* Return: %IRQ_WAKE_THREAD, handler requests to wake the handler thread
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*/
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static irqreturn_t soctherm_edp_isr(int irq, void *arg)
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{
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struct tegra_soctherm *ts = arg;
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u32 r;
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if (!ts)
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return IRQ_NONE;
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r = readl(ts->regs + OC_INTR_STATUS);
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writel(r, ts->regs + OC_INTR_DISABLE);
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return IRQ_WAKE_THREAD;
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}
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/**
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* soctherm_oc_irq_lock() - locks the over-current interrupt request
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* @data: Interrupt request data
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*
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* Looks up the chip data from @data and locks the mutex associated with
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* a particular over-current interrupt request.
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*/
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static void soctherm_oc_irq_lock(struct irq_data *data)
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{
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struct soctherm_oc_irq_chip_data *d = irq_data_get_irq_chip_data(data);
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mutex_lock(&d->irq_lock);
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}
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/**
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* soctherm_oc_irq_sync_unlock() - Unlocks the OC interrupt request
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* @data: Interrupt request data
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*
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* Looks up the interrupt request data @data and unlocks the mutex associated
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* with a particular over-current interrupt request.
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*/
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static void soctherm_oc_irq_sync_unlock(struct irq_data *data)
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{
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struct soctherm_oc_irq_chip_data *d = irq_data_get_irq_chip_data(data);
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mutex_unlock(&d->irq_lock);
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}
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/**
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* soctherm_oc_irq_enable() - Enables the SOC_THERM over-current interrupt queue
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* @data: irq_data structure of the chip
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*
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* Sets the irq_enable bit of SOC_THERM allowing SOC_THERM
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* to respond to over-current interrupts.
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*
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*/
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static void soctherm_oc_irq_enable(struct irq_data *data)
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{
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struct soctherm_oc_irq_chip_data *d = irq_data_get_irq_chip_data(data);
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d->irq_enable |= BIT(data->hwirq);
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}
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/**
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* soctherm_oc_irq_disable() - Disables overcurrent interrupt requests
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* @irq_data: The interrupt request information
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*
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* Clears the interrupt request enable bit of the overcurrent
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* interrupt request chip data.
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*
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* Return: Nothing is returned (void)
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*/
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static void soctherm_oc_irq_disable(struct irq_data *data)
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{
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struct soctherm_oc_irq_chip_data *d = irq_data_get_irq_chip_data(data);
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d->irq_enable &= ~BIT(data->hwirq);
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}
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static int soctherm_oc_irq_set_type(struct irq_data *data, unsigned int type)
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{
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return 0;
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}
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/**
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* soctherm_oc_irq_map() - SOC_THERM interrupt request domain mapper
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* @h: Interrupt request domain
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* @virq: Virtual interrupt request number
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* @hw: Hardware interrupt request number
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*
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* Mapping callback function for SOC_THERM's irq_domain. When a SOC_THERM
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* interrupt request is called, the irq_domain takes the request's virtual
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* request number (much like a virtual memory address) and maps it to a
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* physical hardware request number.
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*
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* When a mapping doesn't already exist for a virtual request number, the
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* irq_domain calls this function to associate the virtual request number with
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* a hardware request number.
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*
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* Return: 0
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*/
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static int soctherm_oc_irq_map(struct irq_domain *h, unsigned int virq,
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irq_hw_number_t hw)
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{
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struct soctherm_oc_irq_chip_data *data = h->host_data;
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irq_set_chip_data(virq, data);
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irq_set_chip(virq, &data->irq_chip);
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irq_set_nested_thread(virq, 1);
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return 0;
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}
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/**
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* soctherm_irq_domain_xlate_twocell() - xlate for soctherm interrupts
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* @d: Interrupt request domain
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* @intspec: Array of u32s from DTs "interrupt" property
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* @intsize: Number of values inside the intspec array
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* @out_hwirq: HW IRQ value associated with this interrupt
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* @out_type: The IRQ SENSE type for this interrupt.
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*
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* This Device Tree IRQ specifier translation function will translate a
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* specific "interrupt" as defined by 2 DT values where the cell values map
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* the hwirq number + 1 and linux irq flags. Since the output is the hwirq
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* number, this function will subtract 1 from the value listed in DT.
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*
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* Return: 0
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*/
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static int soctherm_irq_domain_xlate_twocell(struct irq_domain *d,
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struct device_node *ctrlr, const u32 *intspec, unsigned int intsize,
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irq_hw_number_t *out_hwirq, unsigned int *out_type)
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{
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if (WARN_ON(intsize < 2))
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return -EINVAL;
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/*
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* The HW value is 1 index less than the DT IRQ values.
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* i.e. OC4 goes to HW index 3.
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*/
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*out_hwirq = intspec[0] - 1;
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*out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
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return 0;
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}
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static const struct irq_domain_ops soctherm_oc_domain_ops = {
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.map = soctherm_oc_irq_map,
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.xlate = soctherm_irq_domain_xlate_twocell,
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};
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/**
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* soctherm_oc_int_init() - Initial enabling of the over
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* current interrupts
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* @np: The devicetree node for soctherm
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* @num_irqs: The number of new interrupt requests
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*
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* Sets the over current interrupt request chip data
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*
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* Return: 0 on success or if overcurrent interrupts are not enabled,
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* -ENOMEM (out of memory), or irq_base if the function failed to
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* allocate the irqs
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*/
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static int soctherm_oc_int_init(struct device_node *np, int num_irqs)
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{
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if (!num_irqs) {
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pr_info("%s(): OC interrupts are not enabled\n", __func__);
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return 0;
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}
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mutex_init(&soc_irq_cdata.irq_lock);
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soc_irq_cdata.irq_enable = 0;
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soc_irq_cdata.irq_chip.name = "soc_therm_oc";
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soc_irq_cdata.irq_chip.irq_bus_lock = soctherm_oc_irq_lock;
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soc_irq_cdata.irq_chip.irq_bus_sync_unlock =
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soctherm_oc_irq_sync_unlock;
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soc_irq_cdata.irq_chip.irq_disable = soctherm_oc_irq_disable;
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soc_irq_cdata.irq_chip.irq_enable = soctherm_oc_irq_enable;
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soc_irq_cdata.irq_chip.irq_set_type = soctherm_oc_irq_set_type;
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soc_irq_cdata.irq_chip.irq_set_wake = NULL;
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soc_irq_cdata.domain = irq_domain_add_linear(np, num_irqs,
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&soctherm_oc_domain_ops,
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&soc_irq_cdata);
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if (!soc_irq_cdata.domain) {
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pr_err("%s: Failed to create IRQ domain\n", __func__);
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return -ENOMEM;
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}
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pr_debug("%s(): OC interrupts enabled successful\n", __func__);
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return 0;
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}
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#ifdef CONFIG_DEBUG_FS
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static int regs_show(struct seq_file *s, void *data)
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{
|
||||
@ -1504,14 +1899,27 @@ static void tegra_soctherm_throttle(struct device *dev)
|
||||
static int soctherm_interrupts_init(struct platform_device *pdev,
|
||||
struct tegra_soctherm *tegra)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
int ret;
|
||||
|
||||
ret = soctherm_oc_int_init(np, TEGRA_SOC_OC_IRQ_MAX);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "soctherm_oc_int_init failed\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
tegra->thermal_irq = platform_get_irq(pdev, 0);
|
||||
if (tegra->thermal_irq < 0) {
|
||||
dev_dbg(&pdev->dev, "get 'thermal_irq' failed.\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
tegra->edp_irq = platform_get_irq(pdev, 1);
|
||||
if (tegra->edp_irq < 0) {
|
||||
dev_dbg(&pdev->dev, "get 'edp_irq' failed.\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
ret = devm_request_threaded_irq(&pdev->dev,
|
||||
tegra->thermal_irq,
|
||||
soctherm_thermal_isr,
|
||||
@ -1524,6 +1932,18 @@ static int soctherm_interrupts_init(struct platform_device *pdev,
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = devm_request_threaded_irq(&pdev->dev,
|
||||
tegra->edp_irq,
|
||||
soctherm_edp_isr,
|
||||
soctherm_edp_isr_thread,
|
||||
IRQF_ONESHOT,
|
||||
"soctherm_edp",
|
||||
tegra);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "request_irq 'edp_irq' failed.\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user