Merge tag 'iommu-fixes-v5.17-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu fixes from Joerg Roedel:
- Fix a double list_add() in Intel VT-d code
- Add missing put_device() in Tegra SMMU driver
- Two AMD IOMMU fixes:
- Memory leak in IO page-table freeing code
- Add missing recovery from event-log overflow
* tag 'iommu-fixes-v5.17-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
iommu/tegra-smmu: Fix missing put_device() call in tegra_smmu_find
iommu/vt-d: Fix double list_add when enabling VMD in scalable mode
iommu/amd: Fix I/O page table memory leak
iommu/amd: Recover from event log overflow
This commit is contained in:
@@ -14,6 +14,7 @@
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extern irqreturn_t amd_iommu_int_thread(int irq, void *data);
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extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
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extern void amd_iommu_apply_erratum_63(u16 devid);
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extern void amd_iommu_restart_event_logging(struct amd_iommu *iommu);
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extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);
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extern int amd_iommu_init_devices(void);
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extern void amd_iommu_uninit_devices(void);
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@@ -110,6 +110,7 @@
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#define PASID_MASK 0x0000ffff
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/* MMIO status bits */
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#define MMIO_STATUS_EVT_OVERFLOW_INT_MASK (1 << 0)
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#define MMIO_STATUS_EVT_INT_MASK (1 << 1)
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#define MMIO_STATUS_COM_WAIT_INT_MASK (1 << 2)
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#define MMIO_STATUS_PPR_INT_MASK (1 << 6)
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@@ -657,6 +657,16 @@ static int __init alloc_command_buffer(struct amd_iommu *iommu)
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return iommu->cmd_buf ? 0 : -ENOMEM;
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}
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/*
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* This function restarts event logging in case the IOMMU experienced
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* an event log buffer overflow.
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*/
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void amd_iommu_restart_event_logging(struct amd_iommu *iommu)
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{
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iommu_feature_disable(iommu, CONTROL_EVT_LOG_EN);
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iommu_feature_enable(iommu, CONTROL_EVT_LOG_EN);
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}
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/*
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* This function resets the command buffer if the IOMMU stopped fetching
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* commands from it.
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@@ -492,18 +492,18 @@ static void v1_free_pgtable(struct io_pgtable *iop)
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dom = container_of(pgtable, struct protection_domain, iop);
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/* Update data structure */
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amd_iommu_domain_clr_pt_root(dom);
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/* Make changes visible to IOMMUs */
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amd_iommu_domain_update(dom);
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/* Page-table is not visible to IOMMU anymore, so free it */
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BUG_ON(pgtable->mode < PAGE_MODE_NONE ||
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pgtable->mode > PAGE_MODE_6_LEVEL);
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free_sub_pt(pgtable->root, pgtable->mode, &freelist);
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/* Update data structure */
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amd_iommu_domain_clr_pt_root(dom);
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/* Make changes visible to IOMMUs */
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amd_iommu_domain_update(dom);
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put_pages_list(&freelist);
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}
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@@ -764,7 +764,8 @@ amd_iommu_set_pci_msi_domain(struct device *dev, struct amd_iommu *iommu) { }
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#endif /* !CONFIG_IRQ_REMAP */
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#define AMD_IOMMU_INT_MASK \
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(MMIO_STATUS_EVT_INT_MASK | \
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(MMIO_STATUS_EVT_OVERFLOW_INT_MASK | \
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MMIO_STATUS_EVT_INT_MASK | \
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MMIO_STATUS_PPR_INT_MASK | \
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MMIO_STATUS_GALOG_INT_MASK)
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@@ -774,7 +775,7 @@ irqreturn_t amd_iommu_int_thread(int irq, void *data)
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u32 status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
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while (status & AMD_IOMMU_INT_MASK) {
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/* Enable EVT and PPR and GA interrupts again */
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/* Enable interrupt sources again */
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writel(AMD_IOMMU_INT_MASK,
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iommu->mmio_base + MMIO_STATUS_OFFSET);
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@@ -795,6 +796,11 @@ irqreturn_t amd_iommu_int_thread(int irq, void *data)
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}
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#endif
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if (status & MMIO_STATUS_EVT_OVERFLOW_INT_MASK) {
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pr_info_ratelimited("IOMMU event log overflow\n");
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amd_iommu_restart_event_logging(iommu);
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}
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/*
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* Hardware bug: ERBT1312
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* When re-enabling interrupt (by writing 1
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@@ -2738,7 +2738,7 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu,
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spin_unlock_irqrestore(&device_domain_lock, flags);
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/* PASID table is mandatory for a PCI device in scalable mode. */
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if (dev && dev_is_pci(dev) && sm_supported(iommu)) {
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if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) {
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ret = intel_pasid_alloc_table(dev);
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if (ret) {
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dev_err(dev, "PASID table allocation failed\n");
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@@ -808,8 +808,10 @@ static struct tegra_smmu *tegra_smmu_find(struct device_node *np)
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return NULL;
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mc = platform_get_drvdata(pdev);
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if (!mc)
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if (!mc) {
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put_device(&pdev->dev);
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return NULL;
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}
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return mc->smmu;
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}
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