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drm/i915: Pass intel_gt to has-reset?

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As we execute GPU resets on a gt/ basis, and use the intel_gt as the
primary for all other reset functions, also use it for the has-reset?
predicates. Gradually simplifying the churn of pointers.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190927211749.2181-1-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson 2019-09-27 22:17:47 +01:00
parent 42b899fb9a
commit 260e6b7127
8 changed files with 31 additions and 27 deletions
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2
drivers/gpu/drm/i915/display/intel_display.c
View File

@ -4273,7 +4273,7 @@ __intel_display_resume(struct drm_device *dev,
static bool gpu_reset_clobbers_display(struct drm_i915_private *dev_priv)
{
return (INTEL_INFO(dev_priv)->gpu_reset_clobbers_display &&
intel_has_gpu_reset(dev_priv));
intel_has_gpu_reset(&dev_priv->gt));
}
void intel_prepare_reset(struct drm_i915_private *dev_priv)

21
drivers/gpu/drm/i915/gt/intel_reset.c
View File

@ -546,8 +546,10 @@ typedef int (*reset_func)(struct intel_gt *,
intel_engine_mask_t engine_mask,
unsigned int retry);
static reset_func intel_get_gpu_reset(struct drm_i915_private *i915)
static reset_func intel_get_gpu_reset(const struct intel_gt *gt)
{
struct drm_i915_private *i915 = gt->i915;
if (INTEL_GEN(i915) >= 8)
return gen8_reset_engines;
else if (INTEL_GEN(i915) >= 6)
@ -571,7 +573,7 @@ int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)
int ret = -ETIMEDOUT;
int retry;
reset = intel_get_gpu_reset(gt->i915);
reset = intel_get_gpu_reset(gt);
if (!reset)
return -ENODEV;
@ -591,17 +593,20 @@ int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)
return ret;
}
bool intel_has_gpu_reset(struct drm_i915_private *i915)
bool intel_has_gpu_reset(const struct intel_gt *gt)
{
if (!i915_modparams.reset)
return NULL;
return intel_get_gpu_reset(i915);
return intel_get_gpu_reset(gt);
}
bool intel_has_reset_engine(struct drm_i915_private *i915)
bool intel_has_reset_engine(const struct intel_gt *gt)
{
return INTEL_INFO(i915)->has_reset_engine && i915_modparams.reset >= 2;
if (i915_modparams.reset < 2)
return false;
return INTEL_INFO(gt->i915)->has_reset_engine;
}
int intel_reset_guc(struct intel_gt *gt)
@ -958,7 +963,7 @@ void intel_gt_reset(struct intel_gt *gt,
awake = reset_prepare(gt);
if (!intel_has_gpu_reset(gt->i915)) {
if (!intel_has_gpu_reset(gt)) {
if (i915_modparams.reset)
dev_err(gt->i915->drm.dev, "GPU reset not supported\n");
else
@ -1179,7 +1184,7 @@ void intel_gt_handle_error(struct intel_gt *gt,
* Try engine reset when available. We fall back to full reset if
* single reset fails.
*/
if (intel_has_reset_engine(gt->i915) && !intel_gt_is_wedged(gt)) {
if (intel_has_reset_engine(gt) && !intel_gt_is_wedged(gt)) {
for_each_engine_masked(engine, gt->i915, engine_mask, tmp) {
BUILD_BUG_ON(I915_RESET_MODESET >= I915_RESET_ENGINE);
if (test_and_set_bit(I915_RESET_ENGINE + engine->id,

5
drivers/gpu/drm/i915/gt/intel_reset.h
View File

@ -14,7 +14,6 @@
#include "intel_engine_types.h"
#include "intel_reset_types.h"
struct drm_i915_private;
struct i915_request;
struct intel_engine_cs;
struct intel_gt;
@ -80,7 +79,7 @@ static inline bool __intel_reset_failed(const struct intel_reset *reset)
return unlikely(test_bit(I915_WEDGED, &reset->flags));
}
bool intel_has_gpu_reset(struct drm_i915_private *i915);
bool intel_has_reset_engine(struct drm_i915_private *i915);
bool intel_has_gpu_reset(const struct intel_gt *gt);
bool intel_has_reset_engine(const struct intel_gt *gt);
#endif /* I915_RESET_H */

12
drivers/gpu/drm/i915/gt/selftest_hangcheck.c
View File

@ -458,7 +458,7 @@ static int igt_reset_nop_engine(void *arg)
/* Check that we can engine-reset during non-user portions */
if (!intel_has_reset_engine(gt->i915))
if (!intel_has_reset_engine(gt))
return 0;
file = mock_file(gt->i915);
@ -559,7 +559,7 @@ static int __igt_reset_engine(struct intel_gt *gt, bool active)
/* Check that we can issue an engine reset on an idle engine (no-op) */
if (!intel_has_reset_engine(gt->i915))
if (!intel_has_reset_engine(gt))
return 0;
if (active) {
@ -791,7 +791,7 @@ static int __igt_reset_engines(struct intel_gt *gt,
* with any other engine.
*/
if (!intel_has_reset_engine(gt->i915))
if (!intel_has_reset_engine(gt))
return 0;
if (flags & TEST_ACTIVE) {
@ -1547,7 +1547,7 @@ static int igt_handle_error(void *arg)
/* Check that we can issue a global GPU and engine reset */
if (!intel_has_reset_engine(gt->i915))
if (!intel_has_reset_engine(gt))
return 0;
if (!engine || !intel_engine_can_store_dword(engine))
@ -1689,7 +1689,7 @@ static int igt_reset_engines_atomic(void *arg)
/* Check that the engines resets are usable from atomic context */
if (!intel_has_reset_engine(gt->i915))
if (!intel_has_reset_engine(gt))
return 0;
if (USES_GUC_SUBMISSION(gt->i915))
@ -1746,7 +1746,7 @@ int intel_hangcheck_live_selftests(struct drm_i915_private *i915)
bool saved_hangcheck;
int err;
if (!intel_has_gpu_reset(gt->i915))
if (!intel_has_gpu_reset(gt))
return 0;
if (intel_gt_is_wedged(gt))

2
drivers/gpu/drm/i915/gt/selftest_lrc.c
View File

@ -1310,7 +1310,7 @@ static int live_preempt_hang(void *arg)
if (!HAS_LOGICAL_RING_PREEMPTION(i915))
return 0;
if (!intel_has_reset_engine(i915))
if (!intel_has_reset_engine(&i915->gt))
return 0;
mutex_lock(&i915->drm.struct_mutex);

4
drivers/gpu/drm/i915/gt/selftest_reset.c
View File

@ -112,7 +112,7 @@ static int igt_atomic_engine_reset(void *arg)
/* Check that the resets are usable from atomic context */
if (!intel_has_reset_engine(gt->i915))
if (!intel_has_reset_engine(gt))
return 0;
if (USES_GUC_SUBMISSION(gt->i915))
@ -170,7 +170,7 @@ int intel_reset_live_selftests(struct drm_i915_private *i915)
};
struct intel_gt *gt = &i915->gt;
if (!intel_has_gpu_reset(gt->i915))
if (!intel_has_gpu_reset(gt))
return 0;
if (intel_gt_is_wedged(gt))

8
drivers/gpu/drm/i915/gt/selftest_workarounds.c
View File

@ -747,7 +747,7 @@ static int live_reset_whitelist(void *arg)
igt_global_reset_lock(&i915->gt);
if (intel_has_reset_engine(i915)) {
if (intel_has_reset_engine(&i915->gt)) {
err = check_whitelist_across_reset(engine,
do_engine_reset,
"engine");
@ -755,7 +755,7 @@ static int live_reset_whitelist(void *arg)
goto out;
}
if (intel_has_gpu_reset(i915)) {
if (intel_has_gpu_reset(&i915->gt)) {
err = check_whitelist_across_reset(engine,
do_device_reset,
"device");
@ -1131,7 +1131,7 @@ live_gpu_reset_workarounds(void *arg)
struct wa_lists lists;
bool ok;
if (!intel_has_gpu_reset(i915))
if (!intel_has_gpu_reset(&i915->gt))
return 0;
ctx = kernel_context(i915);
@ -1178,7 +1178,7 @@ live_engine_reset_workarounds(void *arg)
struct wa_lists lists;
int ret = 0;
if (!intel_has_reset_engine(i915))
if (!intel_has_reset_engine(&i915->gt))
return 0;
ctx = kernel_context(i915);

4
drivers/gpu/drm/i915/i915_getparam.c
View File

@ -79,8 +79,8 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
break;
case I915_PARAM_HAS_GPU_RESET:
value = i915_modparams.enable_hangcheck &&
intel_has_gpu_reset(i915);
if (value && intel_has_reset_engine(i915))
intel_has_gpu_reset(&i915->gt);
if (value && intel_has_reset_engine(&i915->gt))
value = 2;
break;
case I915_PARAM_HAS_RESOURCE_STREAMER: