forked from Minki/linux
pcmcia: use pcmica_{read,write}_config_byte
Use pcmcia_read_config_byte and pcmcia_write_config_byte instead of pcmcia_access_configuration_register. CC: netdev@vger.kernel.org CC: linux-wireless@vger.kernel.org CC: linux-serial@vger.kernel.org CC: Michael Buesch <mb@bu3sch.de> Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
This commit is contained in:
parent
ac8b422838
commit
1d5cc192d4
@ -378,8 +378,7 @@ static int axnet_config(struct pcmcia_device *link)
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/* Maybe PHY is in power down mode. (PPD_SET = 1)
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Bit 2 of CCSR is active low. */
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if (i == 32) {
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conf_reg_t reg = { 0, CS_WRITE, CISREG_CCSR, 0x04 };
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pcmcia_access_configuration_register(link, ®);
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pcmcia_write_config_byte(link, CISREG_CCSR, 0x04);
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for (i = 0; i < 32; i++) {
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j = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 1);
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j2 = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 2);
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@ -757,29 +757,20 @@ static void nmclan_reset(struct net_device *dev)
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#if RESET_XILINX
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struct pcmcia_device *link = &lp->link;
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conf_reg_t reg;
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u_long OrigCorValue;
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u8 OrigCorValue;
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/* Save original COR value */
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reg.Function = 0;
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reg.Action = CS_READ;
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reg.Offset = CISREG_COR;
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reg.Value = 0;
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pcmcia_access_configuration_register(link, ®);
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OrigCorValue = reg.Value;
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pcmcia_read_config_byte(link, CISREG_COR, &OrigCorValue);
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/* Reset Xilinx */
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reg.Action = CS_WRITE;
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reg.Offset = CISREG_COR;
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dev_dbg(&link->dev, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
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dev_dbg(&link->dev, "nmclan_reset: OrigCorValue=0x%x, resetting...\n",
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OrigCorValue);
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reg.Value = COR_SOFT_RESET;
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pcmcia_access_configuration_register(link, ®);
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pcmcia_write_config_byte(link, CISREG_COR, COR_SOFT_RESET);
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/* Need to wait for 20 ms for PCMCIA to finish reset. */
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/* Restore original COR configuration index */
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reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
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pcmcia_access_configuration_register(link, ®);
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pcmcia_write_config_byte(link, CISREG_COR,
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(COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK)));
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/* Xilinx is now completely reset along with the MACE chip. */
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lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
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@ -869,7 +869,6 @@ xirc2ps_config(struct pcmcia_device * link)
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goto config_error;
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if (local->dingo) {
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conf_reg_t reg;
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win_req_t req;
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memreq_t mem;
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@ -878,15 +877,14 @@ xirc2ps_config(struct pcmcia_device * link)
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* the base address of the ethernet port (BasePort1) is written
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* to the BAR registers of the modem.
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*/
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reg.Action = CS_WRITE;
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reg.Offset = CISREG_IOBASE_0;
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reg.Value = link->io.BasePort2 & 0xff;
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if ((err = pcmcia_access_configuration_register(link, ®)))
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err = pcmcia_write_config_byte(link, CISREG_IOBASE_0,
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link->io.BasePort2 & 0xff);
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if (err)
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goto config_error;
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reg.Action = CS_WRITE;
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reg.Offset = CISREG_IOBASE_1;
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reg.Value = (link->io.BasePort2 >> 8) & 0xff;
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if ((err = pcmcia_access_configuration_register(link, ®)))
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err = pcmcia_write_config_byte(link, CISREG_IOBASE_1,
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(link->io.BasePort2 >> 8) & 0xff);
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if (err)
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goto config_error;
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/* There is no config entry for the Ethernet part which
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@ -224,27 +224,18 @@ static int prism2_pccard_card_present(local_info_t *local)
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static void sandisk_set_iobase(local_info_t *local)
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{
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int res;
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conf_reg_t reg;
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struct hostap_cs_priv *hw_priv = local->hw_priv;
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reg.Function = 0;
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reg.Action = CS_WRITE;
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reg.Offset = 0x10; /* 0x3f0 IO base 1 */
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reg.Value = hw_priv->link->io.BasePort1 & 0x00ff;
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res = pcmcia_access_configuration_register(hw_priv->link,
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®);
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res = pcmcia_write_config_byte(hw_priv->link, 0x10,
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hw_priv->link->io.BasePort1 & 0x00ff);
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if (res != 0) {
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printk(KERN_DEBUG "Prism3 SanDisk - failed to set I/O base 0 -"
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" res=%d\n", res);
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}
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udelay(10);
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reg.Function = 0;
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reg.Action = CS_WRITE;
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reg.Offset = 0x12; /* 0x3f2 IO base 2 */
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reg.Value = (hw_priv->link->io.BasePort1 & 0xff00) >> 8;
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res = pcmcia_access_configuration_register(hw_priv->link,
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®);
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res = pcmcia_write_config_byte(hw_priv->link, 0x12,
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(hw_priv->link->io.BasePort1 >> 8) & 0x00ff);
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if (res != 0) {
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printk(KERN_DEBUG "Prism3 SanDisk - failed to set I/O base 1 -"
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" res=%d\n", res);
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@ -270,7 +261,6 @@ static void sandisk_write_hcr(local_info_t *local, int hcr)
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static int sandisk_enable_wireless(struct net_device *dev)
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{
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int res, ret = 0;
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conf_reg_t reg;
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struct hostap_interface *iface = netdev_priv(dev);
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local_info_t *local = iface->local;
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struct hostap_cs_priv *hw_priv = local->hw_priv;
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@ -297,12 +287,8 @@ static int sandisk_enable_wireless(struct net_device *dev)
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" - using vendor-specific initialization\n", dev->name);
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hw_priv->sandisk_connectplus = 1;
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reg.Function = 0;
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reg.Action = CS_WRITE;
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reg.Offset = CISREG_COR;
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reg.Value = COR_SOFT_RESET;
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res = pcmcia_access_configuration_register(hw_priv->link,
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®);
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res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR,
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COR_SOFT_RESET);
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if (res != 0) {
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printk(KERN_DEBUG "%s: SanDisk - COR sreset failed (%d)\n",
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dev->name, res);
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@ -310,16 +296,13 @@ static int sandisk_enable_wireless(struct net_device *dev)
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}
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mdelay(5);
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reg.Function = 0;
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reg.Action = CS_WRITE;
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reg.Offset = CISREG_COR;
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/*
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* Do not enable interrupts here to avoid some bogus events. Interrupts
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* will be enabled during the first cor_sreset call.
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*/
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reg.Value = COR_LEVEL_REQ | 0x8 | COR_ADDR_DECODE | COR_FUNC_ENA;
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res = pcmcia_access_configuration_register(hw_priv->link,
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®);
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res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR,
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(COR_LEVEL_REQ | 0x8 | COR_ADDR_DECODE |
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COR_FUNC_ENA));
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if (res != 0) {
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printk(KERN_DEBUG "%s: SanDisk - COR sreset failed (%d)\n",
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dev->name, res);
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@ -342,30 +325,23 @@ done:
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static void prism2_pccard_cor_sreset(local_info_t *local)
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{
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int res;
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conf_reg_t reg;
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u8 val;
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struct hostap_cs_priv *hw_priv = local->hw_priv;
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if (!prism2_pccard_card_present(local))
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return;
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reg.Function = 0;
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reg.Action = CS_READ;
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reg.Offset = CISREG_COR;
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reg.Value = 0;
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res = pcmcia_access_configuration_register(hw_priv->link,
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®);
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res = pcmcia_read_config_byte(hw_priv->link, CISREG_COR, &val);
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if (res != 0) {
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printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 1 (%d)\n",
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res);
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return;
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}
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printk(KERN_DEBUG "prism2_pccard_cor_sreset: original COR %02x\n",
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reg.Value);
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val);
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reg.Action = CS_WRITE;
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reg.Value |= COR_SOFT_RESET;
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res = pcmcia_access_configuration_register(hw_priv->link,
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®);
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val |= COR_SOFT_RESET;
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res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR, val);
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if (res != 0) {
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printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 2 (%d)\n",
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res);
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@ -374,11 +350,10 @@ static void prism2_pccard_cor_sreset(local_info_t *local)
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mdelay(hw_priv->sandisk_connectplus ? 5 : 2);
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reg.Value &= ~COR_SOFT_RESET;
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val &= ~COR_SOFT_RESET;
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if (hw_priv->sandisk_connectplus)
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reg.Value |= COR_IREQ_ENA;
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res = pcmcia_access_configuration_register(hw_priv->link,
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®);
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val |= COR_IREQ_ENA;
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res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR, val);
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if (res != 0) {
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printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 3 (%d)\n",
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res);
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@ -395,8 +370,7 @@ static void prism2_pccard_cor_sreset(local_info_t *local)
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static void prism2_pccard_genesis_reset(local_info_t *local, int hcr)
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{
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int res;
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conf_reg_t reg;
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int old_cor;
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u8 old_cor;
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struct hostap_cs_priv *hw_priv = local->hw_priv;
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if (!prism2_pccard_card_present(local))
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@ -407,25 +381,17 @@ static void prism2_pccard_genesis_reset(local_info_t *local, int hcr)
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return;
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}
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reg.Function = 0;
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reg.Action = CS_READ;
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reg.Offset = CISREG_COR;
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reg.Value = 0;
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res = pcmcia_access_configuration_register(hw_priv->link,
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®);
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res = pcmcia_read_config_byte(hw_priv->link, CISREG_COR, &old_cor);
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if (res != 0) {
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printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 1 "
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"(%d)\n", res);
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return;
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}
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printk(KERN_DEBUG "prism2_pccard_genesis_sreset: original COR %02x\n",
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reg.Value);
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old_cor = reg.Value;
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old_cor);
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reg.Action = CS_WRITE;
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reg.Value |= COR_SOFT_RESET;
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res = pcmcia_access_configuration_register(hw_priv->link,
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®);
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res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR,
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old_cor | COR_SOFT_RESET);
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if (res != 0) {
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printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 2 "
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"(%d)\n", res);
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@ -435,11 +401,7 @@ static void prism2_pccard_genesis_reset(local_info_t *local, int hcr)
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mdelay(10);
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/* Setup Genesis mode */
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reg.Action = CS_WRITE;
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reg.Value = hcr;
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reg.Offset = CISREG_CCSR;
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res = pcmcia_access_configuration_register(hw_priv->link,
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®);
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res = pcmcia_write_config_byte(hw_priv->link, CISREG_CCSR, hcr);
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if (res != 0) {
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printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 3 "
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"(%d)\n", res);
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@ -447,11 +409,8 @@ static void prism2_pccard_genesis_reset(local_info_t *local, int hcr)
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}
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mdelay(10);
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reg.Action = CS_WRITE;
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reg.Offset = CISREG_COR;
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reg.Value = old_cor & ~COR_SOFT_RESET;
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res = pcmcia_access_configuration_register(hw_priv->link,
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®);
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res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR,
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old_cor & ~COR_SOFT_RESET);
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if (res != 0) {
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printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 4 "
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"(%d)\n", res);
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@ -79,35 +79,27 @@ static int
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spectrum_reset(struct pcmcia_device *link, int idle)
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{
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int ret;
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conf_reg_t reg;
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u_int save_cor;
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u8 save_cor;
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u8 ccsr;
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/* Doing it if hardware is gone is guaranteed crash */
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if (!pcmcia_dev_present(link))
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return -ENODEV;
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/* Save original COR value */
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reg.Function = 0;
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reg.Action = CS_READ;
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reg.Offset = CISREG_COR;
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ret = pcmcia_access_configuration_register(link, ®);
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ret = pcmcia_read_config_byte(link, CISREG_COR, &save_cor);
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if (ret)
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goto failed;
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save_cor = reg.Value;
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/* Soft-Reset card */
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reg.Action = CS_WRITE;
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reg.Offset = CISREG_COR;
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reg.Value = (save_cor | COR_SOFT_RESET);
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ret = pcmcia_access_configuration_register(link, ®);
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ret = pcmcia_write_config_byte(link, CISREG_COR,
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(save_cor | COR_SOFT_RESET));
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if (ret)
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goto failed;
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udelay(1000);
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/* Read CCSR */
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reg.Action = CS_READ;
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reg.Offset = CISREG_CCSR;
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ret = pcmcia_access_configuration_register(link, ®);
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ret = pcmcia_read_config_byte(link, CISREG_CCSR, &ccsr);
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if (ret)
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goto failed;
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@ -115,19 +107,15 @@ spectrum_reset(struct pcmcia_device *link, int idle)
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* Start or stop the firmware. Memory width bit should be
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* preserved from the value we've just read.
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*/
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reg.Action = CS_WRITE;
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reg.Offset = CISREG_CCSR;
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reg.Value = (idle ? HCR_IDLE : HCR_RUN) | (reg.Value & HCR_MEM16);
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ret = pcmcia_access_configuration_register(link, ®);
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ccsr = (idle ? HCR_IDLE : HCR_RUN) | (ccsr & HCR_MEM16);
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ret = pcmcia_write_config_byte(link, CISREG_CCSR, ccsr);
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if (ret)
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goto failed;
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udelay(1000);
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/* Restore original COR configuration index */
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reg.Action = CS_WRITE;
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reg.Offset = CISREG_COR;
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reg.Value = (save_cor & ~COR_SOFT_RESET);
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ret = pcmcia_access_configuration_register(link, ®);
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ret = pcmcia_write_config_byte(link, CISREG_COR,
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(save_cor & ~COR_SOFT_RESET));
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if (ret)
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goto failed;
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udelay(1000);
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@ -209,7 +209,7 @@ int pcmcia_read_cis_mem(struct pcmcia_socket *s, int attr, u_int addr,
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* Probably only useful for writing one-byte registers. Must be called
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* with ops_mutex held.
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*/
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void pcmcia_write_cis_mem(struct pcmcia_socket *s, int attr, u_int addr,
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int pcmcia_write_cis_mem(struct pcmcia_socket *s, int attr, u_int addr,
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u_int len, void *ptr)
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{
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void __iomem *sys, *end;
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@ -231,7 +231,7 @@ void pcmcia_write_cis_mem(struct pcmcia_socket *s, int attr, u_int addr,
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((cis_width) ? MAP_16BIT : 0));
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if (!sys) {
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dev_dbg(&s->dev, "could not map memory\n");
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return; /* FIXME: Error */
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return -EINVAL;
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}
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writeb(flags, sys+CISREG_ICTRL0);
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@ -256,7 +256,7 @@ void pcmcia_write_cis_mem(struct pcmcia_socket *s, int attr, u_int addr,
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sys = set_cis_map(s, card_offset, flags);
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if (!sys) {
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dev_dbg(&s->dev, "could not map memory\n");
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return; /* FIXME: error */
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return -EINVAL;
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}
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end = sys + s->map_size;
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@ -270,6 +270,7 @@ void pcmcia_write_cis_mem(struct pcmcia_socket *s, int attr, u_int addr,
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addr = 0;
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}
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}
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return 0;
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}
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@ -158,8 +158,8 @@ extern struct bin_attribute pccard_cis_attr;
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int pcmcia_read_cis_mem(struct pcmcia_socket *s, int attr,
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u_int addr, u_int len, void *ptr);
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void pcmcia_write_cis_mem(struct pcmcia_socket *s, int attr,
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u_int addr, u_int len, void *ptr);
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int pcmcia_write_cis_mem(struct pcmcia_socket *s, int attr,
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u_int addr, u_int len, void *ptr);
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void release_cis_mem(struct pcmcia_socket *s);
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void destroy_cis_cache(struct pcmcia_socket *s);
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int pccard_read_tuple(struct pcmcia_socket *s, unsigned int function,
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@ -108,25 +108,25 @@ static void release_io_space(struct pcmcia_socket *s, unsigned int base,
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} /* release_io_space */
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/** pccard_access_configuration_register
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/**
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* pcmcia_access_config() - read or write card configuration registers
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*
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* Access_configuration_register() reads and writes configuration
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* registers in attribute memory. Memory window 0 is reserved for
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* this and the tuple reading services.
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* pcmcia_access_config() reads and writes configuration registers in
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* attribute memory. Memory window 0 is reserved for this and the tuple
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* reading services. Drivers must use pcmcia_read_config_byte() or
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* pcmcia_write_config_byte().
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*/
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||||
int pcmcia_access_configuration_register(struct pcmcia_device *p_dev,
|
||||
conf_reg_t *reg)
|
||||
static int pcmcia_access_config(struct pcmcia_device *p_dev,
|
||||
off_t where, u8 *val,
|
||||
int (*accessf) (struct pcmcia_socket *s,
|
||||
int attr, unsigned int addr,
|
||||
unsigned int len, void *ptr))
|
||||
{
|
||||
struct pcmcia_socket *s;
|
||||
config_t *c;
|
||||
int addr;
|
||||
u_char val;
|
||||
int ret = 0;
|
||||
|
||||
if (!p_dev || !p_dev->function_config)
|
||||
return -EINVAL;
|
||||
|
||||
s = p_dev->socket;
|
||||
|
||||
mutex_lock(&s->ops_mutex);
|
||||
@ -138,26 +138,40 @@ int pcmcia_access_configuration_register(struct pcmcia_device *p_dev,
|
||||
return -EACCES;
|
||||
}
|
||||
|
||||
addr = (c->ConfigBase + reg->Offset) >> 1;
|
||||
addr = (c->ConfigBase + where) >> 1;
|
||||
|
||||
ret = accessf(s, 1, addr, 1, val);
|
||||
|
||||
switch (reg->Action) {
|
||||
case CS_READ:
|
||||
ret = pcmcia_read_cis_mem(s, 1, addr, 1, &val);
|
||||
reg->Value = val;
|
||||
break;
|
||||
case CS_WRITE:
|
||||
val = reg->Value;
|
||||
pcmcia_write_cis_mem(s, 1, addr, 1, &val);
|
||||
break;
|
||||
default:
|
||||
dev_dbg(&s->dev, "Invalid conf register request\n");
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
mutex_unlock(&s->ops_mutex);
|
||||
|
||||
return ret;
|
||||
} /* pcmcia_access_configuration_register */
|
||||
EXPORT_SYMBOL(pcmcia_access_configuration_register);
|
||||
} /* pcmcia_access_config */
|
||||
|
||||
|
||||
/**
|
||||
* pcmcia_read_config_byte() - read a byte from a card configuration register
|
||||
*
|
||||
* pcmcia_read_config_byte() reads a byte from a configuration register in
|
||||
* attribute memory.
|
||||
*/
|
||||
int pcmcia_read_config_byte(struct pcmcia_device *p_dev, off_t where, u8 *val)
|
||||
{
|
||||
return pcmcia_access_config(p_dev, where, val, pcmcia_read_cis_mem);
|
||||
}
|
||||
EXPORT_SYMBOL(pcmcia_read_config_byte);
|
||||
|
||||
|
||||
/**
|
||||
* pcmcia_write_config_byte() - write a byte to a card configuration register
|
||||
*
|
||||
* pcmcia_write_config_byte() writes a byte to a configuration register in
|
||||
* attribute memory.
|
||||
*/
|
||||
int pcmcia_write_config_byte(struct pcmcia_device *p_dev, off_t where, u8 val)
|
||||
{
|
||||
return pcmcia_access_config(p_dev, where, &val, pcmcia_write_cis_mem);
|
||||
}
|
||||
EXPORT_SYMBOL(pcmcia_write_config_byte);
|
||||
|
||||
|
||||
int pcmcia_map_mem_page(struct pcmcia_device *p_dev, window_handle_t wh,
|
||||
|
@ -114,16 +114,14 @@ static void quirk_setup_brainboxes_0104(struct pcmcia_device *link, struct uart_
|
||||
|
||||
static int quirk_post_ibm(struct pcmcia_device *link)
|
||||
{
|
||||
conf_reg_t reg = { 0, CS_READ, 0x800, 0 };
|
||||
u8 val;
|
||||
int ret;
|
||||
|
||||
ret = pcmcia_access_configuration_register(link, ®);
|
||||
ret = pcmcia_read_config_byte(link, 0x800, &val);
|
||||
if (ret)
|
||||
goto failed;
|
||||
|
||||
reg.Action = CS_WRITE;
|
||||
reg.Value = reg.Value | 1;
|
||||
ret = pcmcia_access_configuration_register(link, ®);
|
||||
ret = pcmcia_write_config_byte(link, 0x800, val | 1);
|
||||
if (ret)
|
||||
goto failed;
|
||||
return 0;
|
||||
|
@ -71,14 +71,9 @@
|
||||
/* Write to a PCMCIA configuration register. */
|
||||
static int ssb_pcmcia_cfg_write(struct ssb_bus *bus, u8 offset, u8 value)
|
||||
{
|
||||
conf_reg_t reg;
|
||||
int res;
|
||||
|
||||
memset(®, 0, sizeof(reg));
|
||||
reg.Offset = offset;
|
||||
reg.Action = CS_WRITE;
|
||||
reg.Value = value;
|
||||
res = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
|
||||
res = pcmcia_write_config_byte(bus->host_pcmcia, offset, value);
|
||||
if (unlikely(res != 0))
|
||||
return -EBUSY;
|
||||
|
||||
@ -88,16 +83,11 @@ static int ssb_pcmcia_cfg_write(struct ssb_bus *bus, u8 offset, u8 value)
|
||||
/* Read from a PCMCIA configuration register. */
|
||||
static int ssb_pcmcia_cfg_read(struct ssb_bus *bus, u8 offset, u8 *value)
|
||||
{
|
||||
conf_reg_t reg;
|
||||
int res;
|
||||
|
||||
memset(®, 0, sizeof(reg));
|
||||
reg.Offset = offset;
|
||||
reg.Action = CS_READ;
|
||||
res = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
|
||||
res = pcmcia_read_config_byte(bus->host_pcmcia, offset, value);
|
||||
if (unlikely(res != 0))
|
||||
return -EBUSY;
|
||||
*value = reg.Value;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -19,18 +19,6 @@
|
||||
#include <linux/interrupt.h>
|
||||
#endif
|
||||
|
||||
/* For AccessConfigurationRegister */
|
||||
typedef struct conf_reg_t {
|
||||
u_char Function;
|
||||
u_int Action;
|
||||
off_t Offset;
|
||||
u_int Value;
|
||||
} conf_reg_t;
|
||||
|
||||
/* Actions */
|
||||
#define CS_READ 1
|
||||
#define CS_WRITE 2
|
||||
|
||||
/* for AdjustResourceInfo */
|
||||
/* Action field */
|
||||
#define REMOVE_MANAGED_RESOURCE 1
|
||||
|
@ -174,8 +174,8 @@ struct pcmcia_device *pcmcia_dev_present(struct pcmcia_device *p_dev);
|
||||
int pcmcia_reset_card(struct pcmcia_socket *skt);
|
||||
|
||||
/* CIS config */
|
||||
int pcmcia_access_configuration_register(struct pcmcia_device *p_dev,
|
||||
conf_reg_t *reg);
|
||||
int pcmcia_read_config_byte(struct pcmcia_device *p_dev, off_t where, u8 *val);
|
||||
int pcmcia_write_config_byte(struct pcmcia_device *p_dev, off_t where, u8 val);
|
||||
|
||||
/* device configuration */
|
||||
int pcmcia_request_io(struct pcmcia_device *p_dev, io_req_t *req);
|
||||
|
Loading…
Reference in New Issue
Block a user