forked from Minki/linux
usb: musb: remove some register access wrapper functions
The following wrappers were defined because of Blackfin support. Now Blackfin support is removed, these wrappers are no longer needed, so remove them. musb_write_txfifosz musb_write_txfifoadd musb_write_rxfifosz musb_write_rxfifoadd musb_write_ulpi_buscontrol musb_read_txfifosz musb_read_txfifoadd musb_read_rxfifosz musb_read_rxfifoadd musb_read_ulpi_buscontrol musb_read_hwvers Signed-off-by: Bin Liu <b-liu@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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53e1657a1c
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@ -1240,25 +1240,25 @@ fifo_setup(struct musb *musb, struct musb_hw_ep *hw_ep,
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/* REVISIT error check: be sure ep0 can both rx and tx ... */
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switch (cfg->style) {
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case FIFO_TX:
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musb_write_txfifosz(mbase, c_size);
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musb_write_txfifoadd(mbase, c_off);
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musb_writeb(mbase, MUSB_TXFIFOSZ, c_size);
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musb_writew(mbase, MUSB_TXFIFOADD, c_off);
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hw_ep->tx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB);
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hw_ep->max_packet_sz_tx = maxpacket;
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break;
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case FIFO_RX:
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musb_write_rxfifosz(mbase, c_size);
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musb_write_rxfifoadd(mbase, c_off);
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musb_writeb(mbase, MUSB_RXFIFOSZ, c_size);
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musb_writew(mbase, MUSB_RXFIFOADD, c_off);
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hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB);
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hw_ep->max_packet_sz_rx = maxpacket;
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break;
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case FIFO_RXTX:
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musb_write_txfifosz(mbase, c_size);
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musb_write_txfifoadd(mbase, c_off);
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musb_writeb(mbase, MUSB_TXFIFOSZ, c_size);
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musb_writew(mbase, MUSB_TXFIFOADD, c_off);
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hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB);
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hw_ep->max_packet_sz_rx = maxpacket;
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musb_write_rxfifosz(mbase, c_size);
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musb_write_rxfifoadd(mbase, c_off);
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musb_writeb(mbase, MUSB_RXFIFOSZ, c_size);
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musb_writew(mbase, MUSB_RXFIFOADD, c_off);
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hw_ep->tx_double_buffered = hw_ep->rx_double_buffered;
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hw_ep->max_packet_sz_tx = maxpacket;
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@ -1466,7 +1466,7 @@ static int musb_core_init(u16 musb_type, struct musb *musb)
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}
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/* log release info */
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musb->hwvers = musb_read_hwvers(mbase);
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musb->hwvers = musb_readw(mbase, MUSB_HWVERS);
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pr_debug("%s: %sHDRC RTL version %d.%d%s\n",
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musb_driver_name, type, MUSB_HWVERS_MAJOR(musb->hwvers),
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MUSB_HWVERS_MINOR(musb->hwvers),
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@ -2311,9 +2311,9 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
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/* program PHY to use external vBus if required */
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if (plat->extvbus) {
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u8 busctl = musb_read_ulpi_buscontrol(musb->mregs);
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u8 busctl = musb_readb(musb->mregs, MUSB_ULPI_BUSCONTROL);
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busctl |= MUSB_ULPI_USE_EXTVBUS;
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musb_write_ulpi_buscontrol(musb->mregs, busctl);
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musb_writeb(musb->mregs, MUSB_ULPI_BUSCONTROL, busctl);
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}
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if (musb->xceiv->otg->default_a) {
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@ -2482,7 +2482,7 @@ static void musb_save_context(struct musb *musb)
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musb->context.frame = musb_readw(musb_base, MUSB_FRAME);
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musb->context.testmode = musb_readb(musb_base, MUSB_TESTMODE);
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musb->context.busctl = musb_read_ulpi_buscontrol(musb->mregs);
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musb->context.busctl = musb_readb(musb_base, MUSB_ULPI_BUSCONTROL);
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musb->context.power = musb_readb(musb_base, MUSB_POWER);
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musb->context.intrusbe = musb_readb(musb_base, MUSB_INTRUSBE);
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musb->context.index = musb_readb(musb_base, MUSB_INDEX);
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@ -2511,13 +2511,13 @@ static void musb_save_context(struct musb *musb)
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if (musb->dyn_fifo) {
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musb->context.index_regs[i].txfifoadd =
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musb_read_txfifoadd(musb_base);
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musb_readw(musb_base, MUSB_TXFIFOADD);
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musb->context.index_regs[i].rxfifoadd =
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musb_read_rxfifoadd(musb_base);
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musb_readw(musb_base, MUSB_RXFIFOADD);
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musb->context.index_regs[i].txfifosz =
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musb_read_txfifosz(musb_base);
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musb_readb(musb_base, MUSB_TXFIFOSZ);
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musb->context.index_regs[i].rxfifosz =
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musb_read_rxfifosz(musb_base);
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musb_readb(musb_base, MUSB_RXFIFOSZ);
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}
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musb->context.index_regs[i].txtype =
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@ -2554,7 +2554,7 @@ static void musb_restore_context(struct musb *musb)
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musb_writew(musb_base, MUSB_FRAME, musb->context.frame);
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musb_writeb(musb_base, MUSB_TESTMODE, musb->context.testmode);
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musb_write_ulpi_buscontrol(musb->mregs, musb->context.busctl);
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musb_writeb(musb_base, MUSB_ULPI_BUSCONTROL, musb->context.busctl);
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/* Don't affect SUSPENDM/RESUME bits in POWER reg */
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power = musb_readb(musb_base, MUSB_POWER);
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@ -2591,13 +2591,13 @@ static void musb_restore_context(struct musb *musb)
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musb->context.index_regs[i].rxcsr);
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if (musb->dyn_fifo) {
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musb_write_txfifosz(musb_base,
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musb_writeb(musb_base, MUSB_TXFIFOSZ,
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musb->context.index_regs[i].txfifosz);
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musb_write_rxfifosz(musb_base,
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musb_writeb(musb_base, MUSB_RXFIFOSZ,
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musb->context.index_regs[i].rxfifosz);
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musb_write_txfifoadd(musb_base,
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musb_writew(musb_base, MUSB_TXFIFOADD,
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musb->context.index_regs[i].txfifoadd);
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musb_write_rxfifoadd(musb_base,
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musb_writew(musb_base, MUSB_RXFIFOADD,
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musb->context.index_regs[i].rxfifoadd);
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}
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@ -273,67 +273,12 @@
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#define MUSB_RXHUBADDR 0x06
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#define MUSB_RXHUBPORT 0x07
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static inline void musb_write_txfifosz(void __iomem *mbase, u8 c_size)
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{
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musb_writeb(mbase, MUSB_TXFIFOSZ, c_size);
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}
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static inline void musb_write_txfifoadd(void __iomem *mbase, u16 c_off)
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{
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musb_writew(mbase, MUSB_TXFIFOADD, c_off);
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}
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static inline void musb_write_rxfifosz(void __iomem *mbase, u8 c_size)
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{
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musb_writeb(mbase, MUSB_RXFIFOSZ, c_size);
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}
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static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)
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{
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musb_writew(mbase, MUSB_RXFIFOADD, c_off);
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}
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static inline void musb_write_ulpi_buscontrol(void __iomem *mbase, u8 val)
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{
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musb_writeb(mbase, MUSB_ULPI_BUSCONTROL, val);
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}
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static inline u8 musb_read_txfifosz(void __iomem *mbase)
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{
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return musb_readb(mbase, MUSB_TXFIFOSZ);
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}
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static inline u16 musb_read_txfifoadd(void __iomem *mbase)
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{
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return musb_readw(mbase, MUSB_TXFIFOADD);
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}
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static inline u8 musb_read_rxfifosz(void __iomem *mbase)
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{
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return musb_readb(mbase, MUSB_RXFIFOSZ);
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}
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static inline u16 musb_read_rxfifoadd(void __iomem *mbase)
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{
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return musb_readw(mbase, MUSB_RXFIFOADD);
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}
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static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase)
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{
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return musb_readb(mbase, MUSB_ULPI_BUSCONTROL);
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}
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static inline u8 musb_read_configdata(void __iomem *mbase)
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{
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musb_writeb(mbase, MUSB_INDEX, 0);
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return musb_readb(mbase, 0x10 + MUSB_CONFIGDATA);
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}
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static inline u16 musb_read_hwvers(void __iomem *mbase)
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{
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return musb_readw(mbase, MUSB_HWVERS);
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}
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static inline void musb_write_rxfunaddr(struct musb *musb, u8 epnum,
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u8 qh_addr_reg)
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{
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