arm64: tegra: Describe display controller outputs for Tegra210

Both display controllers can drive both DSI and both SOR outputs on
Tegra210. Describe this in device tree so that the operating system
doesn't have to guess.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding
2020-08-06 17:41:11 +02:00
parent da415b71cd
commit 0cc6ba3ce8

View File

@@ -194,6 +194,7 @@
iommus = <&mc TEGRA_SWGROUP_DC>;
nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
nvidia,head = <0>;
};
@@ -208,10 +209,11 @@
iommus = <&mc TEGRA_SWGROUP_DCB>;
nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
nvidia,head = <1>;
};
dsi@54300000 {
dsia: dsi@54300000 {
compatible = "nvidia,tegra210-dsi";
reg = <0x0 0x54300000 0x0 0x00040000>;
clocks = <&tegra_car TEGRA210_CLK_DSIA>,
@@ -248,7 +250,7 @@
status = "disabled";
};
dsi@54400000 {
dsib: dsi@54400000 {
compatible = "nvidia,tegra210-dsi";
reg = <0x0 0x54400000 0x0 0x00040000>;
clocks = <&tegra_car TEGRA210_CLK_DSIB>,
@@ -284,7 +286,7 @@
status = "disabled";
};
sor@54540000 {
sor0: sor@54540000 {
compatible = "nvidia,tegra210-sor";
reg = <0x0 0x54540000 0x0 0x00040000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
@@ -304,7 +306,7 @@
status = "disabled";
};
sor@54580000 {
sor1: sor@54580000 {
compatible = "nvidia,tegra210-sor1";
reg = <0x0 0x54580000 0x0 0x00040000>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;