leandrof/linux
1
0
Fork 0
forked from Minki/linux
Code Issues Pull Requests Packages Projects Releases Wiki Activity

ARM: debug: add support for word accesses to debug/8250.S

Browse Source 
Add 32-bit word access support to debug/8250.S and convert Picoxcell
and SoCFPGA to this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2013-07-07 11:42:46 +01:00
parent 2facbc8873
commit 0b4cccbec6
5 changed files with 33 additions and 72 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
arch/arm/Kconfig.debug
View File

@ -451,6 +451,7 @@ choice
config DEBUG_PICOXCELL_UART
depends on ARCH_PICOXCELL
bool "Use PicoXcell UART for low-level debug"
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
on PicoXcell based platforms.
@ -593,6 +594,7 @@ choice
config DEBUG_SOCFPGA_UART
depends on ARCH_SOCFPGA
bool "Use SOCFPGA UART for low-level debug"
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
on SOCFPGA based platforms.
@ -851,9 +853,7 @@ config DEBUG_LL_INCLUDE
default "debug/nomadik.S" if DEBUG_NOMADIK_UART
default "debug/nspire.S" if DEBUG_NSPIRE_CX_UART
default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
default "debug/sti.S" if DEBUG_STI_UART
default "debug/tegra.S" if DEBUG_TEGRA_UART
default "debug/u300.S" if DEBUG_U300_UART
@ -886,6 +886,7 @@ config DEBUG_UART_PHYS
default 0x40100000 if DEBUG_PXA_UART1
default 0x42000000 if ARCH_GEMINI
default 0x7c0003f8 if FOOTBRIDGE
default 0x80230000 if DEBUG_PICOXCELL_UART
default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART
default 0xc8000000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
default 0xc8000003 if ARCH_IXP4XX && CPU_BIG_ENDIAN
@ -897,6 +898,7 @@ config DEBUG_UART_PHYS
default 0xf1012000 if ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || \
ARCH_ORION5X
default 0xfe800000 if ARCH_IOP32X
default 0xffc02000 if DEBUG_SOCFPGA_UART
default 0xffd82340 if ARCH_IOP13XX
default 0xfffff700 if ARCH_IOP33X
depends on DEBUG_UART_8250
@ -915,6 +917,7 @@ config DEBUG_UART_VIRT
default 0xfe012000 if ARCH_ORION5X
default 0xfe017000 if DEBUG_MMP_UART2
default 0xfe018000 if DEBUG_MMP_UART3
default 0xfe230000 if DEBUG_PICOXCELL_UART
default 0xfe800000 if ARCH_IOP32X
default 0xfeb24000 if DEBUG_RK3X_UART0
default 0xfeb26000 if DEBUG_RK3X_UART1
@ -922,6 +925,7 @@ config DEBUG_UART_VIRT
default 0xfed60000 if DEBUG_RK29_UART0
default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
default 0xfec02000 if DEBUG_SOCFPGA_UART
default 0xfed12000 if ARCH_KIRKWOOD
default 0xfee003f8 if FOOTBRIDGE
default 0xfee20000 if DEBUG_NSPIRE_CLASSIC_UART
@ -937,6 +941,12 @@ config DEBUG_UART_8250_SHIFT
default 0 if FOOTBRIDGE || ARCH_IOP32X
default 2
config DEBUG_UART_8250_WORD
bool "Use 32-bit accesses for 8250 UART"
depends on DEBUG_UART_8250
depends on DEBUG_UART_8250_SHIFT >= 2
default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART
config DEBUG_UART_8250_FLOW_CONTROL
bool "Enable flow control for 8250 UART"
depends on DEBUG_UART_8250

24
arch/arm/include/debug/8250.S
View File

@ -14,14 +14,32 @@
ldr \rv, =CONFIG_DEBUG_UART_VIRT
.endm
#ifdef CONFIG_DEBUG_UART_8250_WORD
.macro store, rd, rx:vararg
str \rd, \rx
.endm
.macro load, rd, rx:vararg
ldr \rd, \rx
.endm
#else
.macro store, rd, rx:vararg
strb \rd, \rx
.endm
.macro load, rd, rx:vararg
ldrb \rd, \rx
.endm
#endif
#define UART_SHIFT CONFIG_DEBUG_UART_8250_SHIFT
.macro senduart,rd,rx
strb \rd, [\rx, #UART_TX << UART_SHIFT]
store \rd, [\rx, #UART_TX << UART_SHIFT]
.endm
.macro busyuart,rd,rx
1002: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
1002: load \rd, [\rx, #UART_LSR << UART_SHIFT]
and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
bne 1002b
@ -29,7 +47,7 @@
.macro waituart,rd,rx
#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL
1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
1001: load \rd, [\rx, #UART_MSR << UART_SHIFT]
tst \rd, #UART_MSR_CTS
beq 1001b
#endif

27
arch/arm/include/debug/8250_32.S
View File

@ -1,27 +0,0 @@
/*
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit
* accesses to the 8250.
*/
#include <linux/serial_reg.h>
.macro senduart,rd,rx
str \rd, [\rx, #UART_TX << UART_SHIFT]
.endm
.macro busyuart,rd,rx
1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT]
and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
bne 1002b
.endm
/* The UART's don't have any flow control IO's wired up. */
.macro waituart,rd,rx
.endm

19
arch/arm/include/debug/picoxcell.S
View File

@ -1,19 +0,0 @@
/*
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#define UART_SHIFT 2
#define PICOXCELL_UART1_BASE 0x80230000
#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000)
.macro addruart, rp, rv, tmp
ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE)
ldr \rp, =PICOXCELL_UART1_BASE
.endm
#include "8250_32.S"

21
arch/arm/include/debug/socfpga.S
View File

@ -1,21 +0,0 @@
/*
* Copyright (C) 1994-1999 Russell King
* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define UART_SHIFT 2
#define DEBUG_LL_UART_OFFSET 0x00002000
.macro addruart, rp, rv, tmp
mov \rp, #DEBUG_LL_UART_OFFSET
orr \rp, \rp, #0x00c00000
orr \rv, \rp, #0xfe000000 @ virtual base
orr \rp, \rp, #0xff000000 @ physical base
.endm
#include "8250_32.S"