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drm/nouveau/fifo/gf100-: switch static mmu fault id list to type+inst

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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs 2021-02-06 21:47:44 +10:00
parent c6198d3465
commit 088bfe43f0
5 changed files with 13 additions and 11 deletions
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1
drivers/gpu/drm/nouveau/include/nvkm/core/enum.h
View File

@ -8,6 +8,7 @@ struct nvkm_enum {
const char *name;
const void *data;
u32 data2;
int inst;
};
const struct nvkm_enum *nvkm_enum_find(const struct nvkm_enum *, u32 value);

2
drivers/gpu/drm/nouveau/include/nvkm/subdev/top.h
View File

@ -25,7 +25,7 @@ struct nvkm_top_device {
u32 nvkm_top_addr(struct nvkm_device *, enum nvkm_subdev_type, int);
u32 nvkm_top_reset(struct nvkm_device *, enum nvkm_subdev_type, int);
u32 nvkm_top_intr_mask(struct nvkm_device *, enum nvkm_subdev_type, int);
int nvkm_top_fault_id(struct nvkm_device *, enum nvkm_devidx);
int nvkm_top_fault_id(struct nvkm_device *, enum nvkm_subdev_type, int);
enum nvkm_devidx nvkm_top_fault(struct nvkm_device *, int fault);
int gk104_top_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_top **);

6
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
View File

@ -205,8 +205,8 @@ gf100_fifo_fault_engine[] = {
{ 0x11, "PMSPPP", NULL, NVKM_ENGINE_MSPPP },
{ 0x13, "PCOUNTER" },
{ 0x14, "PMSPDEC", NULL, NVKM_ENGINE_MSPDEC },
{ 0x15, "PCE0", NULL, NVKM_ENGINE_CE0 },
{ 0x16, "PCE1", NULL, NVKM_ENGINE_CE1 },
{ 0x15, "PCE0", NULL, NVKM_ENGINE_CE, 0 },
{ 0x16, "PCE1", NULL, NVKM_ENGINE_CE, 1 },
{ 0x17, "PMU" },
{}
};
@ -286,7 +286,7 @@ gf100_fifo_fault(struct nvkm_fifo *base, struct nvkm_fault_data *info)
nvkm_mask(device, 0x001718, 0x00000000, 0x00000000);
break;
default:
engine = nvkm_device_engine(device, eu->data2, 0);
engine = nvkm_device_engine(device, eu->data2, eu->inst);
break;
}
}

11
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
View File

@ -433,11 +433,12 @@ gk104_fifo_recover_engn(struct gk104_fifo *fifo, int engn)
* called from the fault handler already.
*/
if (!status.faulted && engine) {
mmui = nvkm_top_fault_id(device, engine->subdev.index);
mmui = nvkm_top_fault_id(device, engine->subdev.type, engine->subdev.inst);
if (mmui < 0) {
const struct nvkm_enum *en = fifo->func->fault.engine;
for (; en && en->name; en++) {
if (en->data2 == engine->subdev.index) {
if (en->data2 == engine->subdev.type &&
en->inst == engine->subdev.inst) {
mmui = en->value;
break;
}
@ -1111,12 +1112,12 @@ gk104_fifo_fault_engine[] = {
{ 0x11, "MSPPP", NULL, NVKM_ENGINE_MSPPP },
{ 0x13, "PERF" },
{ 0x14, "MSPDEC", NULL, NVKM_ENGINE_MSPDEC },
{ 0x15, "CE0", NULL, NVKM_ENGINE_CE0 },
{ 0x16, "CE1", NULL, NVKM_ENGINE_CE1 },
{ 0x15, "CE0", NULL, NVKM_ENGINE_CE, 0 },
{ 0x16, "CE1", NULL, NVKM_ENGINE_CE, 1 },
{ 0x17, "PMU" },
{ 0x18, "PTP" },
{ 0x19, "MSENC", NULL, NVKM_ENGINE_MSENC },
{ 0x1b, "CE2", NULL, NVKM_ENGINE_CE2 },
{ 0x1b, "CE2", NULL, NVKM_ENGINE_CE, 2 },
{}
};

4
drivers/gpu/drm/nouveau/nvkm/subdev/top/base.c
View File

@ -91,13 +91,13 @@ nvkm_top_intr_mask(struct nvkm_device *device, enum nvkm_subdev_type type, int i
}
int
nvkm_top_fault_id(struct nvkm_device *device, enum nvkm_devidx devidx)
nvkm_top_fault_id(struct nvkm_device *device, enum nvkm_subdev_type type, int inst)
{
struct nvkm_top *top = device->top;
struct nvkm_top_device *info;
list_for_each_entry(info, &top->device, head) {
if (info->index == devidx && info->fault >= 0)
if (info->type == type && info->inst == inst && info->fault >= 0)
return info->fault;
}