2013-09-14 19:38:00 +00:00
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/*
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* tcs3472.c - Support for TAOS TCS3472 color light-to-digital converter
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*
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* Copyright (c) 2013 Peter Meerwald <pmeerw@pmeerw.net>
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*
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* This file is subject to the terms and conditions of version 2 of
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* the GNU General Public License. See the file COPYING in the main
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* directory of this archive for more details.
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*
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* Color light sensor with 16-bit channels for red, green, blue, clear);
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* 7-bit I2C slave address 0x39 (TCS34721, TCS34723) or 0x29 (TCS34725,
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* TCS34727)
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*
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2017-06-26 15:44:54 +00:00
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* Datasheet: http://ams.com/eng/content/download/319364/1117183/file/TCS3472_Datasheet_EN_v2.pdf
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*
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2017-06-26 15:44:55 +00:00
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* TODO: wait time
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2013-09-14 19:38:00 +00:00
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*/
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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2017-06-26 15:44:55 +00:00
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#include <linux/iio/events.h>
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2013-09-14 19:38:00 +00:00
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/triggered_buffer.h>
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#define TCS3472_DRV_NAME "tcs3472"
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#define TCS3472_COMMAND BIT(7)
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#define TCS3472_AUTO_INCR BIT(5)
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2017-06-26 15:44:55 +00:00
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#define TCS3472_SPECIAL_FUNC (BIT(5) | BIT(6))
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#define TCS3472_INTR_CLEAR (TCS3472_COMMAND | TCS3472_SPECIAL_FUNC | 0x06)
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2013-09-14 19:38:00 +00:00
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#define TCS3472_ENABLE (TCS3472_COMMAND | 0x00)
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#define TCS3472_ATIME (TCS3472_COMMAND | 0x01)
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#define TCS3472_WTIME (TCS3472_COMMAND | 0x03)
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2017-06-26 15:44:55 +00:00
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#define TCS3472_AILT (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x04)
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#define TCS3472_AIHT (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x06)
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2013-09-14 19:38:00 +00:00
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#define TCS3472_PERS (TCS3472_COMMAND | 0x0c)
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#define TCS3472_CONFIG (TCS3472_COMMAND | 0x0d)
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#define TCS3472_CONTROL (TCS3472_COMMAND | 0x0f)
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#define TCS3472_ID (TCS3472_COMMAND | 0x12)
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#define TCS3472_STATUS (TCS3472_COMMAND | 0x13)
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#define TCS3472_CDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x14)
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#define TCS3472_RDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x16)
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#define TCS3472_GDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x18)
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#define TCS3472_BDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x1a)
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2017-06-26 15:44:55 +00:00
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#define TCS3472_STATUS_AINT BIT(4)
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2013-09-14 19:38:00 +00:00
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#define TCS3472_STATUS_AVALID BIT(0)
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2017-06-26 15:44:55 +00:00
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#define TCS3472_ENABLE_AIEN BIT(4)
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2013-09-14 19:38:00 +00:00
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#define TCS3472_ENABLE_AEN BIT(1)
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#define TCS3472_ENABLE_PON BIT(0)
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#define TCS3472_CONTROL_AGAIN_MASK (BIT(0) | BIT(1))
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struct tcs3472_data {
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struct i2c_client *client;
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2017-06-26 15:44:55 +00:00
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struct mutex lock;
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u16 low_thresh;
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u16 high_thresh;
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2013-09-14 19:38:00 +00:00
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u8 enable;
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u8 control;
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u8 atime;
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2017-06-26 15:44:55 +00:00
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u8 apers;
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2013-09-15 15:52:00 +00:00
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u16 buffer[8]; /* 4 16-bit channels + 64-bit timestamp */
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2013-09-14 19:38:00 +00:00
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};
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2017-06-26 15:44:55 +00:00
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static const struct iio_event_spec tcs3472_events[] = {
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{
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.type = IIO_EV_TYPE_THRESH,
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.dir = IIO_EV_DIR_RISING,
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.mask_separate = BIT(IIO_EV_INFO_VALUE),
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}, {
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.type = IIO_EV_TYPE_THRESH,
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.dir = IIO_EV_DIR_FALLING,
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.mask_separate = BIT(IIO_EV_INFO_VALUE),
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}, {
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.type = IIO_EV_TYPE_THRESH,
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.dir = IIO_EV_DIR_EITHER,
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.mask_separate = BIT(IIO_EV_INFO_ENABLE) |
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BIT(IIO_EV_INFO_PERIOD),
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},
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};
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2013-09-14 19:38:00 +00:00
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#define TCS3472_CHANNEL(_color, _si, _addr) { \
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.type = IIO_INTENSITY, \
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.modified = 1, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBSCALE) | \
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BIT(IIO_CHAN_INFO_INT_TIME), \
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.channel2 = IIO_MOD_LIGHT_##_color, \
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.address = _addr, \
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.scan_index = _si, \
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2013-12-11 18:45:00 +00:00
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.scan_type = { \
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.sign = 'u', \
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.realbits = 16, \
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.storagebits = 16, \
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.endianness = IIO_CPU, \
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}, \
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2017-06-26 15:44:55 +00:00
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.event_spec = _si ? NULL : tcs3472_events, \
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.num_event_specs = _si ? 0 : ARRAY_SIZE(tcs3472_events), \
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2013-09-14 19:38:00 +00:00
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}
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static const int tcs3472_agains[] = { 1, 4, 16, 60 };
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static const struct iio_chan_spec tcs3472_channels[] = {
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TCS3472_CHANNEL(CLEAR, 0, TCS3472_CDATA),
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TCS3472_CHANNEL(RED, 1, TCS3472_RDATA),
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TCS3472_CHANNEL(GREEN, 2, TCS3472_GDATA),
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TCS3472_CHANNEL(BLUE, 3, TCS3472_BDATA),
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IIO_CHAN_SOFT_TIMESTAMP(4),
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};
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static int tcs3472_req_data(struct tcs3472_data *data)
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{
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int tries = 50;
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int ret;
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while (tries--) {
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ret = i2c_smbus_read_byte_data(data->client, TCS3472_STATUS);
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if (ret < 0)
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return ret;
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if (ret & TCS3472_STATUS_AVALID)
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break;
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msleep(20);
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}
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if (tries < 0) {
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dev_err(&data->client->dev, "data not ready\n");
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return -EIO;
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}
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return 0;
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}
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static int tcs3472_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct tcs3472_data *data = iio_priv(indio_dev);
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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2016-06-07 05:10:23 +00:00
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret)
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return ret;
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2013-09-14 19:38:00 +00:00
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ret = tcs3472_req_data(data);
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2014-05-07 12:38:00 +00:00
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if (ret < 0) {
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2016-06-07 05:10:23 +00:00
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iio_device_release_direct_mode(indio_dev);
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2013-09-14 19:38:00 +00:00
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return ret;
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2014-05-07 12:38:00 +00:00
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}
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2013-09-14 19:38:00 +00:00
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ret = i2c_smbus_read_word_data(data->client, chan->address);
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2016-06-07 05:10:23 +00:00
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iio_device_release_direct_mode(indio_dev);
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2013-09-14 19:38:00 +00:00
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if (ret < 0)
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return ret;
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*val = ret;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_CALIBSCALE:
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*val = tcs3472_agains[data->control &
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TCS3472_CONTROL_AGAIN_MASK];
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_INT_TIME:
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*val = 0;
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*val2 = (256 - data->atime) * 2400;
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return IIO_VAL_INT_PLUS_MICRO;
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}
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return -EINVAL;
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}
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static int tcs3472_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct tcs3472_data *data = iio_priv(indio_dev);
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int i;
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switch (mask) {
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case IIO_CHAN_INFO_CALIBSCALE:
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if (val2 != 0)
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return -EINVAL;
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for (i = 0; i < ARRAY_SIZE(tcs3472_agains); i++) {
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if (val == tcs3472_agains[i]) {
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data->control &= ~TCS3472_CONTROL_AGAIN_MASK;
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data->control |= i;
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return i2c_smbus_write_byte_data(
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data->client, TCS3472_CONTROL,
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data->control);
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}
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}
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return -EINVAL;
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case IIO_CHAN_INFO_INT_TIME:
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if (val != 0)
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return -EINVAL;
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for (i = 0; i < 256; i++) {
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if (val2 == (256 - i) * 2400) {
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data->atime = i;
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2017-06-12 15:05:08 +00:00
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return i2c_smbus_write_byte_data(
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2013-09-14 19:38:00 +00:00
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data->client, TCS3472_ATIME,
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data->atime);
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}
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}
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return -EINVAL;
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}
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return -EINVAL;
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}
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2017-06-26 15:44:55 +00:00
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/*
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* Translation from APERS field value to the number of consecutive out-of-range
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* clear channel values before an interrupt is generated
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*/
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static const int tcs3472_intr_pers[] = {
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0, 1, 2, 3, 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60
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};
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static int tcs3472_read_event(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, enum iio_event_type type,
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enum iio_event_direction dir, enum iio_event_info info, int *val,
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int *val2)
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{
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struct tcs3472_data *data = iio_priv(indio_dev);
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int ret;
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unsigned int period;
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mutex_lock(&data->lock);
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switch (info) {
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case IIO_EV_INFO_VALUE:
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*val = (dir == IIO_EV_DIR_RISING) ?
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data->high_thresh : data->low_thresh;
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ret = IIO_VAL_INT;
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break;
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case IIO_EV_INFO_PERIOD:
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period = (256 - data->atime) * 2400 *
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tcs3472_intr_pers[data->apers];
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*val = period / USEC_PER_SEC;
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*val2 = period % USEC_PER_SEC;
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ret = IIO_VAL_INT_PLUS_MICRO;
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break;
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default:
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ret = -EINVAL;
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break;
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}
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mutex_unlock(&data->lock);
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return ret;
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}
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static int tcs3472_write_event(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, enum iio_event_type type,
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enum iio_event_direction dir, enum iio_event_info info, int val,
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int val2)
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{
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struct tcs3472_data *data = iio_priv(indio_dev);
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int ret;
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u8 command;
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int period;
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int i;
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mutex_lock(&data->lock);
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switch (info) {
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case IIO_EV_INFO_VALUE:
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switch (dir) {
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case IIO_EV_DIR_RISING:
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command = TCS3472_AIHT;
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break;
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case IIO_EV_DIR_FALLING:
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command = TCS3472_AILT;
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break;
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default:
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ret = -EINVAL;
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goto error;
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}
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ret = i2c_smbus_write_word_data(data->client, command, val);
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if (ret)
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goto error;
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if (dir == IIO_EV_DIR_RISING)
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data->high_thresh = val;
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else
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data->low_thresh = val;
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break;
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case IIO_EV_INFO_PERIOD:
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period = val * USEC_PER_SEC + val2;
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for (i = 1; i < ARRAY_SIZE(tcs3472_intr_pers) - 1; i++) {
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if (period <= (256 - data->atime) * 2400 *
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tcs3472_intr_pers[i])
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break;
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}
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ret = i2c_smbus_write_byte_data(data->client, TCS3472_PERS, i);
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if (ret)
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goto error;
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data->apers = i;
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break;
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default:
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ret = -EINVAL;
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break;
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}
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error:
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mutex_unlock(&data->lock);
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return ret;
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}
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static int tcs3472_read_event_config(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, enum iio_event_type type,
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enum iio_event_direction dir)
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{
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struct tcs3472_data *data = iio_priv(indio_dev);
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int ret;
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mutex_lock(&data->lock);
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ret = !!(data->enable & TCS3472_ENABLE_AIEN);
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mutex_unlock(&data->lock);
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return ret;
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}
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static int tcs3472_write_event_config(struct iio_dev *indio_dev,
|
|
|
|
const struct iio_chan_spec *chan, enum iio_event_type type,
|
|
|
|
enum iio_event_direction dir, int state)
|
|
|
|
{
|
|
|
|
struct tcs3472_data *data = iio_priv(indio_dev);
|
|
|
|
int ret = 0;
|
|
|
|
u8 enable_old;
|
|
|
|
|
|
|
|
mutex_lock(&data->lock);
|
|
|
|
|
|
|
|
enable_old = data->enable;
|
|
|
|
|
|
|
|
if (state)
|
|
|
|
data->enable |= TCS3472_ENABLE_AIEN;
|
|
|
|
else
|
|
|
|
data->enable &= ~TCS3472_ENABLE_AIEN;
|
|
|
|
|
|
|
|
if (enable_old != data->enable) {
|
|
|
|
ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
|
|
|
|
data->enable);
|
|
|
|
if (ret)
|
|
|
|
data->enable = enable_old;
|
|
|
|
}
|
|
|
|
mutex_unlock(&data->lock);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t tcs3472_event_handler(int irq, void *priv)
|
|
|
|
{
|
|
|
|
struct iio_dev *indio_dev = priv;
|
|
|
|
struct tcs3472_data *data = iio_priv(indio_dev);
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = i2c_smbus_read_byte_data(data->client, TCS3472_STATUS);
|
|
|
|
if (ret >= 0 && (ret & TCS3472_STATUS_AINT)) {
|
|
|
|
iio_push_event(indio_dev, IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
|
|
|
|
IIO_EV_TYPE_THRESH,
|
|
|
|
IIO_EV_DIR_EITHER),
|
|
|
|
iio_get_time_ns(indio_dev));
|
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|
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|
|
|
|
i2c_smbus_read_byte_data(data->client, TCS3472_INTR_CLEAR);
|
|
|
|
}
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
2013-09-14 19:38:00 +00:00
|
|
|
static irqreturn_t tcs3472_trigger_handler(int irq, void *p)
|
|
|
|
{
|
|
|
|
struct iio_poll_func *pf = p;
|
|
|
|
struct iio_dev *indio_dev = pf->indio_dev;
|
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|
|
struct tcs3472_data *data = iio_priv(indio_dev);
|
|
|
|
int i, j = 0;
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|
|
|
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|
|
|
int ret = tcs3472_req_data(data);
|
|
|
|
if (ret < 0)
|
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|
|
goto done;
|
|
|
|
|
|
|
|
for_each_set_bit(i, indio_dev->active_scan_mask,
|
|
|
|
indio_dev->masklength) {
|
|
|
|
ret = i2c_smbus_read_word_data(data->client,
|
|
|
|
TCS3472_CDATA + 2*i);
|
|
|
|
if (ret < 0)
|
|
|
|
goto done;
|
|
|
|
|
|
|
|
data->buffer[j++] = ret;
|
|
|
|
}
|
|
|
|
|
2013-09-19 12:59:00 +00:00
|
|
|
iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
|
2016-03-09 18:05:49 +00:00
|
|
|
iio_get_time_ns(indio_dev));
|
2013-09-14 19:38:00 +00:00
|
|
|
|
|
|
|
done:
|
|
|
|
iio_trigger_notify_done(indio_dev->trig);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t tcs3472_show_int_time_available(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
size_t len = 0;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 1; i <= 256; i++)
|
|
|
|
len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06d ",
|
|
|
|
2400 * i);
|
|
|
|
|
|
|
|
/* replace trailing space by newline */
|
|
|
|
buf[len - 1] = '\n';
|
|
|
|
|
|
|
|
return len;
|
|
|
|
}
|
|
|
|
|
|
|
|
static IIO_CONST_ATTR(calibscale_available, "1 4 16 60");
|
|
|
|
static IIO_DEV_ATTR_INT_TIME_AVAIL(tcs3472_show_int_time_available);
|
|
|
|
|
|
|
|
static struct attribute *tcs3472_attributes[] = {
|
|
|
|
&iio_const_attr_calibscale_available.dev_attr.attr,
|
|
|
|
&iio_dev_attr_integration_time_available.dev_attr.attr,
|
|
|
|
NULL
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct attribute_group tcs3472_attribute_group = {
|
|
|
|
.attrs = tcs3472_attributes,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct iio_info tcs3472_info = {
|
|
|
|
.read_raw = tcs3472_read_raw,
|
|
|
|
.write_raw = tcs3472_write_raw,
|
2017-06-26 15:44:55 +00:00
|
|
|
.read_event_value = tcs3472_read_event,
|
|
|
|
.write_event_value = tcs3472_write_event,
|
|
|
|
.read_event_config = tcs3472_read_event_config,
|
|
|
|
.write_event_config = tcs3472_write_event_config,
|
2013-09-14 19:38:00 +00:00
|
|
|
.attrs = &tcs3472_attribute_group,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int tcs3472_probe(struct i2c_client *client,
|
|
|
|
const struct i2c_device_id *id)
|
|
|
|
{
|
|
|
|
struct tcs3472_data *data;
|
|
|
|
struct iio_dev *indio_dev;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
|
|
|
|
if (indio_dev == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
data = iio_priv(indio_dev);
|
|
|
|
i2c_set_clientdata(client, indio_dev);
|
|
|
|
data->client = client;
|
2017-06-26 15:44:55 +00:00
|
|
|
mutex_init(&data->lock);
|
2013-09-14 19:38:00 +00:00
|
|
|
|
|
|
|
indio_dev->dev.parent = &client->dev;
|
|
|
|
indio_dev->info = &tcs3472_info;
|
|
|
|
indio_dev->name = TCS3472_DRV_NAME;
|
|
|
|
indio_dev->channels = tcs3472_channels;
|
|
|
|
indio_dev->num_channels = ARRAY_SIZE(tcs3472_channels);
|
|
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
|
|
|
|
|
|
ret = i2c_smbus_read_byte_data(data->client, TCS3472_ID);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
if (ret == 0x44)
|
|
|
|
dev_info(&client->dev, "TCS34721/34725 found\n");
|
|
|
|
else if (ret == 0x4d)
|
|
|
|
dev_info(&client->dev, "TCS34723/34727 found\n");
|
|
|
|
else
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
ret = i2c_smbus_read_byte_data(data->client, TCS3472_CONTROL);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
data->control = ret;
|
|
|
|
|
|
|
|
ret = i2c_smbus_read_byte_data(data->client, TCS3472_ATIME);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
data->atime = ret;
|
|
|
|
|
2017-06-26 15:44:55 +00:00
|
|
|
ret = i2c_smbus_read_word_data(data->client, TCS3472_AILT);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
data->low_thresh = ret;
|
|
|
|
|
|
|
|
ret = i2c_smbus_read_word_data(data->client, TCS3472_AIHT);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
data->high_thresh = ret;
|
|
|
|
|
|
|
|
data->apers = 1;
|
|
|
|
ret = i2c_smbus_write_byte_data(data->client, TCS3472_PERS,
|
|
|
|
data->apers);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
2013-09-14 19:38:00 +00:00
|
|
|
ret = i2c_smbus_read_byte_data(data->client, TCS3472_ENABLE);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
/* enable device */
|
|
|
|
data->enable = ret | TCS3472_ENABLE_PON | TCS3472_ENABLE_AEN;
|
2017-06-26 15:44:55 +00:00
|
|
|
data->enable &= ~TCS3472_ENABLE_AIEN;
|
2013-09-14 19:38:00 +00:00
|
|
|
ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
|
|
|
|
data->enable);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = iio_triggered_buffer_setup(indio_dev, NULL,
|
|
|
|
tcs3472_trigger_handler, NULL);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
2017-06-26 15:44:55 +00:00
|
|
|
if (client->irq) {
|
|
|
|
ret = request_threaded_irq(client->irq, NULL,
|
|
|
|
tcs3472_event_handler,
|
|
|
|
IRQF_TRIGGER_FALLING | IRQF_SHARED |
|
|
|
|
IRQF_ONESHOT,
|
|
|
|
client->name, indio_dev);
|
|
|
|
if (ret)
|
|
|
|
goto buffer_cleanup;
|
|
|
|
}
|
|
|
|
|
2013-09-14 19:38:00 +00:00
|
|
|
ret = iio_device_register(indio_dev);
|
|
|
|
if (ret < 0)
|
2017-06-26 15:44:55 +00:00
|
|
|
goto free_irq;
|
2013-09-14 19:38:00 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
2017-06-26 15:44:55 +00:00
|
|
|
free_irq:
|
|
|
|
free_irq(client->irq, indio_dev);
|
2013-09-14 19:38:00 +00:00
|
|
|
buffer_cleanup:
|
|
|
|
iio_triggered_buffer_cleanup(indio_dev);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tcs3472_powerdown(struct tcs3472_data *data)
|
|
|
|
{
|
2017-06-26 15:44:55 +00:00
|
|
|
int ret;
|
|
|
|
u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON;
|
|
|
|
|
|
|
|
mutex_lock(&data->lock);
|
|
|
|
|
|
|
|
ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
|
|
|
|
data->enable & ~enable_mask);
|
|
|
|
if (!ret)
|
|
|
|
data->enable &= ~enable_mask;
|
|
|
|
|
|
|
|
mutex_unlock(&data->lock);
|
|
|
|
|
|
|
|
return ret;
|
2013-09-14 19:38:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int tcs3472_remove(struct i2c_client *client)
|
|
|
|
{
|
|
|
|
struct iio_dev *indio_dev = i2c_get_clientdata(client);
|
|
|
|
|
|
|
|
iio_device_unregister(indio_dev);
|
2017-06-26 15:44:55 +00:00
|
|
|
free_irq(client->irq, indio_dev);
|
2013-09-14 19:38:00 +00:00
|
|
|
iio_triggered_buffer_cleanup(indio_dev);
|
|
|
|
tcs3472_powerdown(iio_priv(indio_dev));
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
static int tcs3472_suspend(struct device *dev)
|
|
|
|
{
|
2013-09-18 21:47:00 +00:00
|
|
|
struct tcs3472_data *data = iio_priv(i2c_get_clientdata(
|
|
|
|
to_i2c_client(dev)));
|
|
|
|
return tcs3472_powerdown(data);
|
2013-09-14 19:38:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int tcs3472_resume(struct device *dev)
|
|
|
|
{
|
2013-09-18 21:47:00 +00:00
|
|
|
struct tcs3472_data *data = iio_priv(i2c_get_clientdata(
|
|
|
|
to_i2c_client(dev)));
|
2017-06-26 15:44:55 +00:00
|
|
|
int ret;
|
|
|
|
u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON;
|
|
|
|
|
|
|
|
mutex_lock(&data->lock);
|
|
|
|
|
|
|
|
ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
|
|
|
|
data->enable | enable_mask);
|
|
|
|
if (!ret)
|
|
|
|
data->enable |= enable_mask;
|
|
|
|
|
|
|
|
mutex_unlock(&data->lock);
|
|
|
|
|
|
|
|
return ret;
|
2013-09-14 19:38:00 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static SIMPLE_DEV_PM_OPS(tcs3472_pm_ops, tcs3472_suspend, tcs3472_resume);
|
|
|
|
|
|
|
|
static const struct i2c_device_id tcs3472_id[] = {
|
|
|
|
{ "tcs3472", 0 },
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, tcs3472_id);
|
|
|
|
|
|
|
|
static struct i2c_driver tcs3472_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = TCS3472_DRV_NAME,
|
|
|
|
.pm = &tcs3472_pm_ops,
|
|
|
|
},
|
|
|
|
.probe = tcs3472_probe,
|
|
|
|
.remove = tcs3472_remove,
|
|
|
|
.id_table = tcs3472_id,
|
|
|
|
};
|
|
|
|
module_i2c_driver(tcs3472_driver);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
|
|
|
|
MODULE_DESCRIPTION("TCS3472 color light sensors driver");
|
|
|
|
MODULE_LICENSE("GPL");
|