2012-07-05 21:36:43 +00:00
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/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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2015-01-14 05:35:00 +00:00
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#include "priv.h"
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#include "acpi.h"
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2012-07-05 21:36:43 +00:00
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2015-01-14 05:35:00 +00:00
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#include <core/notify.h>
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2015-08-20 04:54:15 +00:00
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#include <core/option.h>
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2014-08-09 18:10:21 +00:00
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2015-08-20 04:54:15 +00:00
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#include <subdev/bios.h>
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2012-07-05 21:36:43 +00:00
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static DEFINE_MUTEX(nv_devices_mutex);
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static LIST_HEAD(nv_devices);
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2015-08-20 04:54:17 +00:00
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static struct nvkm_device *
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nvkm_device_find_locked(u64 handle)
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2012-07-05 21:36:43 +00:00
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{
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2015-08-20 04:54:17 +00:00
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struct nvkm_device *device;
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2012-07-05 21:36:43 +00:00
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list_for_each_entry(device, &nv_devices, head) {
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2015-08-20 04:54:17 +00:00
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if (device->handle == handle)
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return device;
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2012-07-05 21:36:43 +00:00
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}
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2015-08-20 04:54:17 +00:00
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return NULL;
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}
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struct nvkm_device *
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nvkm_device_find(u64 handle)
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{
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struct nvkm_device *device;
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mutex_lock(&nv_devices_mutex);
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device = nvkm_device_find_locked(handle);
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2012-07-05 21:36:43 +00:00
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mutex_unlock(&nv_devices_mutex);
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2015-08-20 04:54:17 +00:00
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return device;
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2012-07-05 21:36:43 +00:00
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}
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2014-08-09 18:10:21 +00:00
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int
|
2015-01-14 05:35:00 +00:00
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nvkm_device_list(u64 *name, int size)
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2014-08-09 18:10:21 +00:00
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{
|
2015-01-14 05:35:00 +00:00
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struct nvkm_device *device;
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2014-08-09 18:10:21 +00:00
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int nr = 0;
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mutex_lock(&nv_devices_mutex);
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list_for_each_entry(device, &nv_devices, head) {
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if (nr++ < size)
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name[nr - 1] = device->handle;
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}
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mutex_unlock(&nv_devices_mutex);
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return nr;
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}
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|
2015-08-20 04:54:15 +00:00
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#include <core/parent.h>
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2015-08-20 04:54:17 +00:00
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#include <core/client.h>
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2015-08-20 04:54:15 +00:00
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|
2015-01-14 05:35:00 +00:00
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struct nvkm_device *
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2014-12-05 01:20:19 +00:00
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nv_device(void *obj)
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{
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2015-01-14 05:35:00 +00:00
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struct nvkm_object *device = nv_object(obj);
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2015-08-20 04:54:15 +00:00
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2014-12-05 02:21:34 +00:00
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if (device->engine == NULL) {
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2015-08-20 04:54:15 +00:00
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while (device && device->parent) {
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2015-08-20 04:54:17 +00:00
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if (!nv_iclass(device, NV_SUBDEV_CLASS) &&
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device->parent == &nvkm_client(device)->namedb.parent.object) {
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2015-08-20 04:54:15 +00:00
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struct {
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struct nvkm_parent base;
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struct nvkm_device *device;
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} *udevice = (void *)device;
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return udevice->device;
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}
|
2014-12-05 02:21:34 +00:00
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device = device->parent;
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2015-08-20 04:54:15 +00:00
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}
|
2014-12-05 02:21:34 +00:00
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} else {
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2014-12-05 02:37:19 +00:00
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device = &nv_object(obj)->engine->subdev.object;
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2014-12-05 01:26:23 +00:00
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if (device && device->parent)
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device = device->parent;
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2014-12-05 01:20:19 +00:00
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}
|
2014-12-05 01:26:23 +00:00
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#if CONFIG_NOUVEAU_DEBUG >= NV_DBG_PARANOIA
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2015-08-20 04:54:13 +00:00
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BUG_ON(!device);
|
2014-12-05 01:20:19 +00:00
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#endif
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return (void *)device;
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}
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2014-08-09 18:10:20 +00:00
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static int
|
2015-01-14 05:35:00 +00:00
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nvkm_device_event_ctor(struct nvkm_object *object, void *data, u32 size,
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struct nvkm_notify *notify)
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2014-08-09 18:10:20 +00:00
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{
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if (!WARN_ON(size != 0)) {
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notify->size = 0;
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notify->types = 1;
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notify->index = 0;
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return 0;
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}
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return -EINVAL;
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}
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static const struct nvkm_event_func
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2015-01-14 05:35:00 +00:00
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nvkm_device_event_func = {
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.ctor = nvkm_device_event_ctor,
|
2014-08-09 18:10:20 +00:00
|
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};
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|
2015-08-20 04:54:15 +00:00
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int
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nvkm_device_fini(struct nvkm_device *device, bool suspend)
|
2013-04-25 01:35:18 +00:00
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|
{
|
2015-01-14 05:35:00 +00:00
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struct nvkm_object *subdev;
|
2013-04-25 01:43:54 +00:00
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int ret, i;
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for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) {
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if ((subdev = device->subdev[i])) {
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if (!nv_iclass(subdev, NV_ENGINE_CLASS)) {
|
2015-01-14 05:35:00 +00:00
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ret = nvkm_object_dec(subdev, suspend);
|
2013-04-25 01:43:54 +00:00
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if (ret && suspend)
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goto fail;
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}
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}
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}
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|
2014-06-13 02:42:21 +00:00
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ret = nvkm_acpi_fini(device, suspend);
|
2015-08-20 04:54:17 +00:00
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if (device->func->fini)
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device->func->fini(device, suspend);
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2013-04-25 01:43:54 +00:00
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fail:
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for (; ret && i < NVDEV_SUBDEV_NR; i++) {
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if ((subdev = device->subdev[i])) {
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if (!nv_iclass(subdev, NV_ENGINE_CLASS)) {
|
2015-01-14 05:35:00 +00:00
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ret = nvkm_object_inc(subdev);
|
2013-04-25 01:43:54 +00:00
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if (ret) {
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/* XXX */
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}
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}
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}
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}
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return ret;
|
2013-04-25 01:35:18 +00:00
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}
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|
2015-08-20 04:54:17 +00:00
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int
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nvkm_device_preinit(struct nvkm_device *device)
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{
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int ret;
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s64 time;
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nvdev_trace(device, "preinit running...\n");
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time = ktime_to_us(ktime_get());
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if (device->func->preinit) {
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ret = device->func->preinit(device);
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if (ret)
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|
goto fail;
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}
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time = ktime_to_us(ktime_get()) - time;
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nvdev_trace(device, "preinit completed in %lldus\n", time);
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return 0;
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fail:
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|
|
nvdev_error(device, "preinit failed with %d\n", ret);
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|
|
return ret;
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|
|
}
|
|
|
|
|
2015-08-20 04:54:15 +00:00
|
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|
int
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|
|
nvkm_device_init(struct nvkm_device *device)
|
2013-04-25 01:35:18 +00:00
|
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{
|
2015-01-14 05:35:00 +00:00
|
|
|
struct nvkm_object *subdev;
|
2015-08-20 04:54:15 +00:00
|
|
|
int ret, i = 0, c;
|
2014-06-13 02:42:21 +00:00
|
|
|
|
2015-08-20 04:54:17 +00:00
|
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|
ret = nvkm_device_preinit(device);
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|
|
if (ret)
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|
|
return ret;
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|
|
|
|
2014-06-13 02:42:21 +00:00
|
|
|
ret = nvkm_acpi_init(device);
|
|
|
|
if (ret)
|
|
|
|
goto fail;
|
2013-04-25 01:43:54 +00:00
|
|
|
|
2015-08-20 04:54:15 +00:00
|
|
|
for (i = 0, c = 0; i < NVDEV_SUBDEV_NR; i++) {
|
2015-08-20 04:54:15 +00:00
|
|
|
#define _(s,m) case s: if (device->oclass[s] && !device->subdev[s]) { \
|
2015-08-20 04:54:16 +00:00
|
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|
ret = nvkm_object_old(nv_object(device), NULL, \
|
2015-08-20 04:54:15 +00:00
|
|
|
device->oclass[s], NULL, (s), \
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|
|
(struct nvkm_object **)&device->m); \
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|
|
if (ret == -ENODEV) { \
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|
device->oclass[s] = NULL; \
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|
continue; \
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|
|
|
} \
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|
|
if (ret) \
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|
goto fail; \
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|
|
|
device->subdev[s] = (struct nvkm_object *)device->m; \
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|
|
|
} break
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|
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switch (i) {
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|
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_(NVDEV_SUBDEV_BAR , bar);
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|
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_(NVDEV_SUBDEV_VBIOS , bios);
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_(NVDEV_SUBDEV_BUS , bus);
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|
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_(NVDEV_SUBDEV_CLK , clk);
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|
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_(NVDEV_SUBDEV_DEVINIT, devinit);
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|
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_(NVDEV_SUBDEV_FB , fb);
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|
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_(NVDEV_SUBDEV_FUSE , fuse);
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|
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_(NVDEV_SUBDEV_GPIO , gpio);
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|
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_(NVDEV_SUBDEV_I2C , i2c);
|
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|
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_(NVDEV_SUBDEV_IBUS , ibus);
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|
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_(NVDEV_SUBDEV_INSTMEM, imem);
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|
|
_(NVDEV_SUBDEV_LTC , ltc);
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|
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_(NVDEV_SUBDEV_MC , mc);
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|
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_(NVDEV_SUBDEV_MMU , mmu);
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|
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_(NVDEV_SUBDEV_MXM , mxm);
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|
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_(NVDEV_SUBDEV_PMU , pmu);
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|
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_(NVDEV_SUBDEV_THERM , therm);
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|
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_(NVDEV_SUBDEV_TIMER , timer);
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|
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_(NVDEV_SUBDEV_VOLT , volt);
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|
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_(NVDEV_ENGINE_BSP , bsp);
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|
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_(NVDEV_ENGINE_CE0 , ce[0]);
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|
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_(NVDEV_ENGINE_CE1 , ce[1]);
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_(NVDEV_ENGINE_CE2 , ce[2]);
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|
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_(NVDEV_ENGINE_CIPHER , cipher);
|
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|
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_(NVDEV_ENGINE_DISP , disp);
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|
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_(NVDEV_ENGINE_DMAOBJ , dma);
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|
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_(NVDEV_ENGINE_FIFO , fifo);
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|
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_(NVDEV_ENGINE_GR , gr);
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|
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_(NVDEV_ENGINE_IFB , ifb);
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|
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_(NVDEV_ENGINE_ME , me);
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|
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_(NVDEV_ENGINE_MPEG , mpeg);
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|
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_(NVDEV_ENGINE_MSENC , msenc);
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|
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_(NVDEV_ENGINE_MSPDEC , mspdec);
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|
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_(NVDEV_ENGINE_MSPPP , msppp);
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|
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_(NVDEV_ENGINE_MSVLD , msvld);
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|
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_(NVDEV_ENGINE_PM , pm);
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|
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_(NVDEV_ENGINE_SEC , sec);
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|
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_(NVDEV_ENGINE_SW , sw);
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|
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_(NVDEV_ENGINE_VIC , vic);
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|
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_(NVDEV_ENGINE_VP , vp);
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|
|
default:
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|
|
|
WARN_ON(1);
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|
|
continue;
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|
|
|
}
|
|
|
|
#undef _
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|
|
|
|
|
|
|
/* note: can't init *any* subdevs until devinit has been run
|
|
|
|
* due to not knowing exactly what the vbios init tables will
|
|
|
|
* mess with. devinit also can't be run until all of its
|
|
|
|
* dependencies have been created.
|
|
|
|
*
|
|
|
|
* this code delays init of any subdev until all of devinit's
|
|
|
|
* dependencies have been created, and then initialises each
|
|
|
|
* subdev in turn as they're created.
|
|
|
|
*/
|
|
|
|
while (i >= NVDEV_SUBDEV_DEVINIT_LAST && c <= i) {
|
|
|
|
struct nvkm_object *subdev = device->subdev[c++];
|
|
|
|
if (subdev && !nv_iclass(subdev, NV_ENGINE_CLASS)) {
|
2015-01-14 05:35:00 +00:00
|
|
|
ret = nvkm_object_inc(subdev);
|
2013-04-25 01:43:54 +00:00
|
|
|
if (ret)
|
|
|
|
goto fail;
|
2015-08-20 04:54:15 +00:00
|
|
|
} else
|
|
|
|
if (subdev) {
|
2015-01-14 05:35:00 +00:00
|
|
|
nvkm_subdev_reset(subdev);
|
2013-04-25 01:43:54 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = 0;
|
|
|
|
fail:
|
|
|
|
for (--i; ret && i >= 0; i--) {
|
|
|
|
if ((subdev = device->subdev[i])) {
|
|
|
|
if (!nv_iclass(subdev, NV_ENGINE_CLASS))
|
2015-01-14 05:35:00 +00:00
|
|
|
nvkm_object_dec(subdev, false);
|
2013-04-25 01:43:54 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-06-13 02:42:21 +00:00
|
|
|
if (ret)
|
|
|
|
nvkm_acpi_fini(device, false);
|
2013-04-25 01:43:54 +00:00
|
|
|
return ret;
|
2013-04-25 01:35:18 +00:00
|
|
|
}
|
|
|
|
|
2014-02-17 06:17:26 +00:00
|
|
|
resource_size_t
|
2015-01-14 05:35:00 +00:00
|
|
|
nv_device_resource_start(struct nvkm_device *device, unsigned int bar)
|
2014-02-17 06:17:26 +00:00
|
|
|
{
|
|
|
|
if (nv_device_is_pci(device)) {
|
|
|
|
return pci_resource_start(device->pdev, bar);
|
|
|
|
} else {
|
|
|
|
struct resource *res;
|
|
|
|
res = platform_get_resource(device->platformdev,
|
|
|
|
IORESOURCE_MEM, bar);
|
|
|
|
if (!res)
|
|
|
|
return 0;
|
|
|
|
return res->start;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
resource_size_t
|
2015-01-14 05:35:00 +00:00
|
|
|
nv_device_resource_len(struct nvkm_device *device, unsigned int bar)
|
2014-02-17 06:17:26 +00:00
|
|
|
{
|
|
|
|
if (nv_device_is_pci(device)) {
|
|
|
|
return pci_resource_len(device->pdev, bar);
|
|
|
|
} else {
|
|
|
|
struct resource *res;
|
|
|
|
res = platform_get_resource(device->platformdev,
|
|
|
|
IORESOURCE_MEM, bar);
|
|
|
|
if (!res)
|
|
|
|
return 0;
|
|
|
|
return resource_size(res);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2015-01-14 05:35:00 +00:00
|
|
|
nv_device_get_irq(struct nvkm_device *device, bool stall)
|
2014-02-17 06:17:26 +00:00
|
|
|
{
|
|
|
|
if (nv_device_is_pci(device)) {
|
|
|
|
return device->pdev->irq;
|
|
|
|
} else {
|
|
|
|
return platform_get_irq_byname(device->platformdev,
|
|
|
|
stall ? "stall" : "nonstall");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-08-20 04:54:15 +00:00
|
|
|
void
|
|
|
|
nvkm_device_del(struct nvkm_device **pdevice)
|
|
|
|
{
|
|
|
|
struct nvkm_device *device = *pdevice;
|
2015-08-20 04:54:15 +00:00
|
|
|
int i;
|
2015-08-20 04:54:15 +00:00
|
|
|
if (device) {
|
|
|
|
mutex_lock(&nv_devices_mutex);
|
2015-08-20 04:54:15 +00:00
|
|
|
for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--)
|
|
|
|
nvkm_object_ref(NULL, &device->subdev[i]);
|
|
|
|
|
|
|
|
nvkm_event_fini(&device->event);
|
2015-08-20 04:54:15 +00:00
|
|
|
|
|
|
|
if (device->pri)
|
|
|
|
iounmap(device->pri);
|
2015-08-20 04:54:15 +00:00
|
|
|
list_del(&device->head);
|
2015-08-20 04:54:17 +00:00
|
|
|
|
|
|
|
if (device->func->dtor)
|
|
|
|
*pdevice = device->func->dtor(device);
|
2015-08-20 04:54:15 +00:00
|
|
|
mutex_unlock(&nv_devices_mutex);
|
2015-08-20 04:54:15 +00:00
|
|
|
|
2015-08-20 04:54:17 +00:00
|
|
|
kfree(*pdevice);
|
2015-08-20 04:54:15 +00:00
|
|
|
*pdevice = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-08-20 04:54:17 +00:00
|
|
|
static const struct nvkm_engine_func
|
|
|
|
nvkm_device_func = {
|
|
|
|
};
|
|
|
|
|
2012-07-05 21:36:43 +00:00
|
|
|
int
|
2015-08-20 04:54:17 +00:00
|
|
|
nvkm_device_ctor(const struct nvkm_device_func *func,
|
|
|
|
const struct nvkm_device_quirk *quirk,
|
|
|
|
void *dev, enum nv_bus_type type, u64 handle,
|
|
|
|
const char *name, const char *cfg, const char *dbg,
|
|
|
|
bool detect, bool mmio, u64 subdev_mask,
|
|
|
|
struct nvkm_device *device)
|
2012-07-05 21:36:43 +00:00
|
|
|
{
|
2015-08-20 04:54:15 +00:00
|
|
|
u64 mmio_base, mmio_size;
|
|
|
|
u32 boot0, strap;
|
|
|
|
void __iomem *map;
|
2012-07-05 21:36:43 +00:00
|
|
|
int ret = -EEXIST;
|
2015-08-20 04:54:15 +00:00
|
|
|
int i;
|
2012-07-05 21:36:43 +00:00
|
|
|
|
|
|
|
mutex_lock(&nv_devices_mutex);
|
2015-08-20 04:54:17 +00:00
|
|
|
if (nvkm_device_find_locked(handle))
|
|
|
|
goto done;
|
2012-07-05 21:36:43 +00:00
|
|
|
|
2015-08-20 04:54:17 +00:00
|
|
|
ret = nvkm_engine_ctor(&nvkm_device_func, device, 0, 0,
|
|
|
|
true, &device->engine);
|
|
|
|
device->engine.subdev.object.parent = NULL;
|
|
|
|
device->func = func;
|
2012-07-05 21:36:43 +00:00
|
|
|
if (ret)
|
|
|
|
goto done;
|
|
|
|
|
2015-08-20 04:54:17 +00:00
|
|
|
device->quirk = quirk;
|
2014-02-17 06:17:26 +00:00
|
|
|
switch (type) {
|
2015-01-14 05:35:00 +00:00
|
|
|
case NVKM_BUS_PCI:
|
2014-02-17 06:17:26 +00:00
|
|
|
device->pdev = dev;
|
2015-08-20 04:54:06 +00:00
|
|
|
device->dev = &device->pdev->dev;
|
2014-02-17 06:17:26 +00:00
|
|
|
break;
|
2015-01-14 05:35:00 +00:00
|
|
|
case NVKM_BUS_PLATFORM:
|
2014-02-17 06:17:26 +00:00
|
|
|
device->platformdev = dev;
|
2015-08-20 04:54:06 +00:00
|
|
|
device->dev = &device->platformdev->dev;
|
2014-02-17 06:17:26 +00:00
|
|
|
break;
|
|
|
|
}
|
2015-08-20 04:54:17 +00:00
|
|
|
device->handle = handle;
|
2012-07-05 21:36:43 +00:00
|
|
|
device->cfgopt = cfg;
|
|
|
|
device->dbgopt = dbg;
|
2015-08-20 04:54:17 +00:00
|
|
|
device->name = name;
|
2012-07-05 21:36:43 +00:00
|
|
|
|
2015-08-20 04:54:05 +00:00
|
|
|
list_add_tail(&device->head, &nv_devices);
|
2014-06-13 02:42:21 +00:00
|
|
|
|
2015-01-14 05:35:00 +00:00
|
|
|
ret = nvkm_event_init(&nvkm_device_event_func, 1, 1, &device->event);
|
2015-08-20 04:54:15 +00:00
|
|
|
if (ret)
|
|
|
|
goto done;
|
|
|
|
|
|
|
|
mmio_base = nv_device_resource_start(device, 0);
|
|
|
|
mmio_size = nv_device_resource_len(device, 0);
|
|
|
|
|
|
|
|
/* identify the chipset, and determine classes of subdev/engines */
|
|
|
|
if (detect) {
|
|
|
|
map = ioremap(mmio_base, 0x102000);
|
|
|
|
if (ret = -ENOMEM, map == NULL)
|
|
|
|
goto done;
|
|
|
|
|
|
|
|
/* switch mmio to cpu's native endianness */
|
|
|
|
#ifndef __BIG_ENDIAN
|
|
|
|
if (ioread32_native(map + 0x000004) != 0x00000000) {
|
|
|
|
#else
|
|
|
|
if (ioread32_native(map + 0x000004) == 0x00000000) {
|
|
|
|
#endif
|
|
|
|
iowrite32_native(0x01000001, map + 0x000004);
|
|
|
|
ioread32_native(map);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* read boot0 and strapping information */
|
|
|
|
boot0 = ioread32_native(map + 0x000000);
|
|
|
|
strap = ioread32_native(map + 0x101000);
|
|
|
|
iounmap(map);
|
|
|
|
|
|
|
|
/* determine chipset and derive architecture from it */
|
|
|
|
if ((boot0 & 0x1f000000) > 0) {
|
|
|
|
device->chipset = (boot0 & 0x1ff00000) >> 20;
|
|
|
|
device->chiprev = (boot0 & 0x000000ff);
|
|
|
|
switch (device->chipset & 0x1f0) {
|
|
|
|
case 0x010: {
|
|
|
|
if (0x461 & (1 << (device->chipset & 0xf)))
|
|
|
|
device->card_type = NV_10;
|
|
|
|
else
|
|
|
|
device->card_type = NV_11;
|
|
|
|
device->chiprev = 0x00;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case 0x020: device->card_type = NV_20; break;
|
|
|
|
case 0x030: device->card_type = NV_30; break;
|
|
|
|
case 0x040:
|
|
|
|
case 0x060: device->card_type = NV_40; break;
|
|
|
|
case 0x050:
|
|
|
|
case 0x080:
|
|
|
|
case 0x090:
|
|
|
|
case 0x0a0: device->card_type = NV_50; break;
|
|
|
|
case 0x0c0:
|
|
|
|
case 0x0d0: device->card_type = NV_C0; break;
|
|
|
|
case 0x0e0:
|
|
|
|
case 0x0f0:
|
|
|
|
case 0x100: device->card_type = NV_E0; break;
|
|
|
|
case 0x110:
|
|
|
|
case 0x120: device->card_type = GM100; break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else
|
|
|
|
if ((boot0 & 0xff00fff0) == 0x20004000) {
|
|
|
|
if (boot0 & 0x00f00000)
|
|
|
|
device->chipset = 0x05;
|
|
|
|
else
|
|
|
|
device->chipset = 0x04;
|
|
|
|
device->card_type = NV_04;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (device->card_type) {
|
|
|
|
case NV_04: ret = nv04_identify(device); break;
|
|
|
|
case NV_10:
|
|
|
|
case NV_11: ret = nv10_identify(device); break;
|
|
|
|
case NV_20: ret = nv20_identify(device); break;
|
|
|
|
case NV_30: ret = nv30_identify(device); break;
|
|
|
|
case NV_40: ret = nv40_identify(device); break;
|
|
|
|
case NV_50: ret = nv50_identify(device); break;
|
|
|
|
case NV_C0: ret = gf100_identify(device); break;
|
|
|
|
case NV_E0: ret = gk104_identify(device); break;
|
|
|
|
case GM100: ret = gm100_identify(device); break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ret) {
|
|
|
|
nvdev_error(device, "unknown chipset (%08x)\n", boot0);
|
|
|
|
goto done;
|
|
|
|
}
|
|
|
|
|
|
|
|
nvdev_info(device, "NVIDIA %s (%08x)\n", device->cname, boot0);
|
|
|
|
|
|
|
|
/* determine frequency of timing crystal */
|
|
|
|
if ( device->card_type <= NV_10 || device->chipset < 0x17 ||
|
|
|
|
(device->chipset >= 0x20 && device->chipset < 0x25))
|
|
|
|
strap &= 0x00000040;
|
|
|
|
else
|
|
|
|
strap &= 0x00400040;
|
|
|
|
|
|
|
|
switch (strap) {
|
|
|
|
case 0x00000000: device->crystal = 13500; break;
|
|
|
|
case 0x00000040: device->crystal = 14318; break;
|
|
|
|
case 0x00400000: device->crystal = 27000; break;
|
|
|
|
case 0x00400040: device->crystal = 25000; break;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
device->cname = "NULL";
|
|
|
|
device->oclass[NVDEV_SUBDEV_VBIOS] = &nvkm_bios_oclass;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mmio) {
|
|
|
|
device->pri = ioremap(mmio_base, mmio_size);
|
|
|
|
if (!device->pri) {
|
|
|
|
nvdev_error(device, "unable to map PRI\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* disable subdevs that aren't required (used by tools) */
|
|
|
|
for (i = 0; i < NVDEV_SUBDEV_NR; i++) {
|
|
|
|
if (!(subdev_mask & (1ULL << i)))
|
|
|
|
device->oclass[i] = NULL;
|
|
|
|
}
|
|
|
|
|
2015-08-20 04:54:15 +00:00
|
|
|
atomic_set(&device->engine.subdev.object.usecount, 2);
|
|
|
|
mutex_init(&device->mutex);
|
2012-07-05 21:36:43 +00:00
|
|
|
done:
|
|
|
|
mutex_unlock(&nv_devices_mutex);
|
|
|
|
return ret;
|
|
|
|
}
|